FR2312820A1 - METHOD AND DEVICE FOR TRANSLATION OF ADDRESSES IN A MULTIPROCESSOR WITH VIRTUAL ADDRESSING - Google Patents

METHOD AND DEVICE FOR TRANSLATION OF ADDRESSES IN A MULTIPROCESSOR WITH VIRTUAL ADDRESSING

Info

Publication number
FR2312820A1
FR2312820A1 FR7615636A FR7615636A FR2312820A1 FR 2312820 A1 FR2312820 A1 FR 2312820A1 FR 7615636 A FR7615636 A FR 7615636A FR 7615636 A FR7615636 A FR 7615636A FR 2312820 A1 FR2312820 A1 FR 2312820A1
Authority
FR
France
Prior art keywords
multiprocessor
addresses
translation
virtual addressing
addressing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7615636A
Other languages
French (fr)
Other versions
FR2312820B3 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2312820A1 publication Critical patent/FR2312820A1/en
Application granted granted Critical
Publication of FR2312820B3 publication Critical patent/FR2312820B3/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1072—Decentralised address translation, e.g. in distributed shared memory systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
FR7615636A 1975-05-28 1976-05-24 METHOD AND DEVICE FOR TRANSLATION OF ADDRESSES IN A MULTIPROCESSOR WITH VIRTUAL ADDRESSING Granted FR2312820A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19752523686 DE2523686A1 (en) 1975-05-28 1975-05-28 DEVICE AND PROCEDURE FOR ADDRESS TRANSLATION IN A MULTIPROCESSOR SYSTEM WITH VIRTUAL ADDRESSING

Publications (2)

Publication Number Publication Date
FR2312820A1 true FR2312820A1 (en) 1976-12-24
FR2312820B3 FR2312820B3 (en) 1979-02-16

Family

ID=5947671

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7615636A Granted FR2312820A1 (en) 1975-05-28 1976-05-24 METHOD AND DEVICE FOR TRANSLATION OF ADDRESSES IN A MULTIPROCESSOR WITH VIRTUAL ADDRESSING

Country Status (8)

Country Link
AT (1) AT360254B (en)
BE (1) BE842320A (en)
CH (1) CH601858A5 (en)
DE (1) DE2523686A1 (en)
FR (1) FR2312820A1 (en)
GB (1) GB1567772A (en)
IT (1) IT1081081B (en)
NL (1) NL7605610A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4218741A (en) * 1978-06-23 1980-08-19 International Business Machines Corporation Paging mechanism
US4170039A (en) * 1978-07-17 1979-10-02 International Business Machines Corporation Virtual address translation speed up technique
US4710868A (en) * 1984-06-29 1987-12-01 International Business Machines Corporation Interconnect scheme for shared memory local networks

Also Published As

Publication number Publication date
FR2312820B3 (en) 1979-02-16
AT360254B (en) 1980-12-29
IT1081081B (en) 1985-05-16
GB1567772A (en) 1980-05-21
DE2523686A1 (en) 1976-12-02
CH601858A5 (en) 1978-07-14
BE842320A (en) 1976-11-29
NL7605610A (en) 1976-11-30
ATA332776A (en) 1980-05-15

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Legal Events

Date Code Title Description
ST Notification of lapse