FR2284927A2 - Interface pour connecter des unites peripheriques a un ordinateur munie de mecanismes pour signaler les erreurs et distinguer entre les differents types d'erreurs - Google Patents
Interface pour connecter des unites peripheriques a un ordinateur munie de mecanismes pour signaler les erreurs et distinguer entre les differents types d'erreursInfo
- Publication number
- FR2284927A2 FR2284927A2 FR7527284A FR7527284A FR2284927A2 FR 2284927 A2 FR2284927 A2 FR 2284927A2 FR 7527284 A FR7527284 A FR 7527284A FR 7527284 A FR7527284 A FR 7527284A FR 2284927 A2 FR2284927 A2 FR 2284927A2
- Authority
- FR
- France
- Prior art keywords
- errors
- distinguish
- mechanisms
- interface
- different types
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/0745—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0781—Error filtering or prioritizing based on a policy defined by the user or on a policy defined by a hardware/software module, e.g. according to a severity level
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT22812/74A IT1012440B (it) | 1974-05-16 | 1974-05-16 | Apparato di controllo dei canali di ingresso e uscita delle informa zioni di un calcolatore |
IT27258/74A IT1046598B (it) | 1974-05-16 | 1974-09-13 | Interfaccia di connessione di apparecchiature periferiche a un calcolatore provvista di meccanismi di segnalazione e di distinzione tradiversi tipi di errore |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2284927A2 true FR2284927A2 (fr) | 1976-04-09 |
FR2284927B2 FR2284927B2 (fr) | 1981-03-27 |
Family
ID=11221287
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7527284A Granted FR2284927A2 (fr) | 1974-05-16 | 1975-09-05 | Interface pour connecter des unites peripheriques a un ordinateur munie de mecanismes pour signaler les erreurs et distinguer entre les differents types d'erreurs |
Country Status (6)
Country | Link |
---|---|
US (1) | US3988714A (fr) |
FR (1) | FR2284927A2 (fr) |
GB (1) | GB1515163A (fr) |
HK (1) | HK61781A (fr) |
IT (1) | IT1046598B (fr) |
MY (1) | MY8200127A (fr) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0115454A2 (fr) * | 1983-01-28 | 1984-08-08 | Digital Equipment Corporation | Bus pour système de traitement de données à opération avec cycle d'erreur |
EP0155403A2 (fr) * | 1984-03-20 | 1985-09-25 | Robert Bosch Gmbh | Dispositif de commande pour véhicules à moteur |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
IT1052738B (it) * | 1975-12-24 | 1981-07-20 | Cselt Centro Studi Lab Telecom | Dispositivo per il caricamento automatico della memoria centrale di calcolatori elettronici |
US4085448A (en) * | 1976-10-04 | 1978-04-18 | International Business Machines Corporation | Data communication bus structure |
US4360917A (en) * | 1979-02-07 | 1982-11-23 | The Warner & Swasey Company | Parity fault locating means |
DE3036926C2 (de) * | 1980-09-30 | 1984-07-26 | Siemens AG, 1000 Berlin und 8000 München | Verfahren und Anordnung zur Steuerung des Arbeitsablaufes in Datenverarbeitungsanlagen mit Mikroprogrammsteuerung |
DE3272316D1 (en) * | 1982-08-30 | 1986-09-04 | Ibm | Device to signal to the central control unit of a data processing equipment the errors occurring in the adapters |
US4499581A (en) * | 1982-09-21 | 1985-02-12 | Xerox Corporation | Self testing system for reproduction machine |
JPS59116858A (ja) * | 1982-12-23 | 1984-07-05 | Fujitsu Ltd | マシンチエツク割込み処理方式 |
US4538265A (en) * | 1983-03-24 | 1985-08-27 | International Business Machines Corporation | Method and apparatus for instruction parity error recovery |
US4745605A (en) * | 1986-08-19 | 1988-05-17 | Amadahl Corporation | Control word error detection and classification |
US4916697A (en) * | 1988-06-24 | 1990-04-10 | International Business Machines Corporation | Apparatus for partitioned clock stopping in response to classified processor errors |
US4962501A (en) * | 1988-09-13 | 1990-10-09 | Unisys Corporation | Bus data transmission verification system |
US5285456A (en) * | 1991-05-15 | 1994-02-08 | International Business Machines Corporation | System and method for improving the integrity of control information |
US6611877B2 (en) * | 1998-06-30 | 2003-08-26 | Sun Microsystems, Inc. | System and method for aggregating registration of entities for notifications of events |
US20040225814A1 (en) * | 2001-05-29 | 2004-11-11 | Ervin Joseph J. | Method and apparatus for constructing wired-AND bus systems |
US7149838B2 (en) * | 2001-05-29 | 2006-12-12 | Sun Microsystems, Inc. | Method and apparatus for configuring multiple segment wired-AND bus systems |
US6842806B2 (en) * | 2001-05-29 | 2005-01-11 | Sun Microsystems, Inc. | Method and apparatus for interconnecting wired-AND buses |
US7143222B2 (en) * | 2004-09-21 | 2006-11-28 | International Business Machines Corporation | Adaptive message delivery system |
US10922203B1 (en) * | 2018-09-21 | 2021-02-16 | Nvidia Corporation | Fault injection architecture for resilient GPU computing |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3303476A (en) * | 1964-04-06 | 1967-02-07 | Ibm | Input/output control |
FR2242910A5 (fr) * | 1973-09-03 | 1975-03-28 | Honeywell Bull Soc Ind |
-
1974
- 1974-09-13 IT IT27258/74A patent/IT1046598B/it active
-
1975
- 1975-09-05 FR FR7527284A patent/FR2284927A2/fr active Granted
- 1975-09-09 US US05/611,721 patent/US3988714A/en not_active Expired - Lifetime
- 1975-09-11 GB GB37375/75A patent/GB1515163A/en not_active Expired
-
1981
- 1981-12-10 HK HK617/81A patent/HK61781A/xx unknown
-
1982
- 1982-12-30 MY MY127/82A patent/MY8200127A/xx unknown
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0115454A2 (fr) * | 1983-01-28 | 1984-08-08 | Digital Equipment Corporation | Bus pour système de traitement de données à opération avec cycle d'erreur |
EP0115454A3 (en) * | 1983-01-28 | 1988-01-27 | Digital Equipment Corporation | Bus for data processing system with fault cycle operation |
EP0155403A2 (fr) * | 1984-03-20 | 1985-09-25 | Robert Bosch Gmbh | Dispositif de commande pour véhicules à moteur |
EP0155403A3 (en) * | 1984-03-20 | 1988-04-20 | Robert Bosch Gmbh | Control device for motor vehicles |
Also Published As
Publication number | Publication date |
---|---|
MY8200127A (en) | 1982-12-31 |
HK61781A (en) | 1981-12-18 |
IT1046598B (it) | 1980-07-31 |
GB1515163A (en) | 1978-06-21 |
US3988714A (en) | 1976-10-26 |
FR2284927B2 (fr) | 1981-03-27 |
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