FR2237316A1 - - Google Patents
Info
- Publication number
- FR2237316A1 FR2237316A1 FR7418504A FR7418504A FR2237316A1 FR 2237316 A1 FR2237316 A1 FR 2237316A1 FR 7418504 A FR7418504 A FR 7418504A FR 7418504 A FR7418504 A FR 7418504A FR 2237316 A1 FR2237316 A1 FR 2237316A1
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/84—Combinations of enhancement-mode IGFETs and depletion-mode IGFETs
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- H10W10/0125—
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- H10W10/13—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/043—Dual dielectric
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/053—Field effect transistors fets
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/114—Nitrides of silicon
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US377851A US3873372A (en) | 1973-07-09 | 1973-07-09 | Method for producing improved transistor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FR2237316A1 true FR2237316A1 (enExample) | 1975-02-07 |
| FR2237316B1 FR2237316B1 (enExample) | 1978-03-31 |
Family
ID=23490756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7418504A Expired FR2237316B1 (enExample) | 1973-07-09 | 1974-05-21 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US3873372A (enExample) |
| JP (1) | JPS5039881A (enExample) |
| DE (1) | DE2430023A1 (enExample) |
| FR (1) | FR2237316B1 (enExample) |
| GB (1) | GB1459040A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2415878A1 (fr) * | 1978-01-25 | 1979-08-24 | Western Electric Co | Resistance en circuit integre a haute stabilite |
| EP0076147A3 (en) * | 1981-09-30 | 1985-09-25 | Fujitsu Limited | Method of producing a semiconductor device comprising an isolation region |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3868274A (en) * | 1974-01-02 | 1975-02-25 | Gen Instrument Corp | Method for fabricating MOS devices with a multiplicity of thresholds on a semiconductor substrate |
| US4001048A (en) * | 1974-06-26 | 1977-01-04 | Signetics Corporation | Method of making metal oxide semiconductor structures using ion implantation |
| JPS51111085A (en) * | 1975-03-26 | 1976-10-01 | Hitachi Ltd | Semiconductor manufucturing process |
| JPS51124384A (en) * | 1975-04-19 | 1976-10-29 | Mostek Corp | Method of producing ic |
| JPS5851427B2 (ja) * | 1975-09-04 | 1983-11-16 | 株式会社日立製作所 | 絶縁ゲ−ト型リ−ド・オンリ−・メモリの製造方法 |
| US3975220A (en) * | 1975-09-05 | 1976-08-17 | International Business Machines Corporation | Diffusion control for controlling parasitic capacitor effects in single FET structure arrays |
| US4078947A (en) * | 1976-08-05 | 1978-03-14 | International Business Machines Corporation | Method for forming a narrow channel length MOS field effect transistor |
| US4064527A (en) * | 1976-09-20 | 1977-12-20 | Intersil, Inc. | Integrated circuit having a buried load device |
| NL185376C (nl) * | 1976-10-25 | 1990-03-16 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
| US4080718A (en) * | 1976-12-14 | 1978-03-28 | Smc Standard Microsystems Corporation | Method of modifying electrical characteristics of MOS devices using ion implantation |
| US4135289A (en) * | 1977-08-23 | 1979-01-23 | Bell Telephone Laboratories, Incorporated | Method for producing a buried junction memory device |
| US4145233A (en) * | 1978-05-26 | 1979-03-20 | Ncr Corporation | Method for making narrow channel FET by masking and ion-implantation |
| DE2832388C2 (de) * | 1978-07-24 | 1986-08-14 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zum Herstellen von MNOS- und MOS-Transistoren in Silizium-Gate-Technologie auf einem Halbleitersubstrat |
| US4319260A (en) * | 1979-09-05 | 1982-03-09 | Texas Instruments Incorporated | Multilevel interconnect system for high density silicon gate field effect transistors |
| US4333227A (en) * | 1979-11-29 | 1982-06-08 | International Business Machines Corporation | Process for fabricating a self-aligned micrometer bipolar transistor device |
| US4303933A (en) * | 1979-11-29 | 1981-12-01 | International Business Machines Corporation | Self-aligned micrometer bipolar transistor device and process |
| US4315781A (en) * | 1980-04-23 | 1982-02-16 | Hughes Aircraft Company | Method of controlling MOSFET threshold voltage with self-aligned channel stop |
| US4575746A (en) * | 1983-11-28 | 1986-03-11 | Rca Corporation | Crossunders for high density SOS integrated circuits |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3479237A (en) * | 1966-04-08 | 1969-11-18 | Bell Telephone Labor Inc | Etch masks on semiconductor surfaces |
| GB1233545A (enExample) * | 1967-08-18 | 1971-05-26 | ||
| GB1261723A (en) * | 1968-03-11 | 1972-01-26 | Associated Semiconductor Mft | Improvements in and relating to semiconductor devices |
| US3717507A (en) * | 1969-06-19 | 1973-02-20 | Shibaura Electric Co Ltd | Method of manufacturing semiconductor devices utilizing ion-implantation and arsenic diffusion |
| BE759057A (enExample) * | 1969-11-19 | 1971-05-17 | Philips Nv | |
| US3634738A (en) * | 1970-10-06 | 1972-01-11 | Kev Electronics Corp | Diode having a voltage variable capacitance characteristic and method of making same |
-
1973
- 1973-07-09 US US377851A patent/US3873372A/en not_active Expired - Lifetime
-
1974
- 1974-05-21 FR FR7418504A patent/FR2237316B1/fr not_active Expired
- 1974-06-13 JP JP49066604A patent/JPS5039881A/ja active Pending
- 1974-06-22 DE DE2430023A patent/DE2430023A1/de active Pending
- 1974-06-24 GB GB2786774A patent/GB1459040A/en not_active Expired
Non-Patent Citations (4)
| Title |
|---|
| 3 "ION IMPLANTATION IN MOS PROCESING" M.L. SHOPBELL,PAGES 1-4. * |
| BOB CRAWFORD, PAGES 85-90.) * |
| UE US 1972 WESCON TECHNICAL PAPERS, VOL. 16, "PRESENTED AT THE WESTERN ELECTRONIC SHOW AND CONVENTION" 19-22 SEPTEMBRE 1972, SESIN 19 * |
| UE US ELECRONICS, VOL. 45, NO. 9, 24 AVRIL 1972. "IMPLANTED DEPLETION LOADS, BOOST MOS ARRAYPERFOMANCE * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2415878A1 (fr) * | 1978-01-25 | 1979-08-24 | Western Electric Co | Resistance en circuit integre a haute stabilite |
| EP0076147A3 (en) * | 1981-09-30 | 1985-09-25 | Fujitsu Limited | Method of producing a semiconductor device comprising an isolation region |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5039881A (enExample) | 1975-04-12 |
| DE2430023A1 (de) | 1975-01-30 |
| FR2237316B1 (enExample) | 1978-03-31 |
| US3873372A (en) | 1975-03-25 |
| GB1459040A (en) | 1976-12-22 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |