FR2222698A1 - Interlaced addressing system for computers - involves modification of binary numbers only of block part of address by inversion of numbers - Google Patents
Interlaced addressing system for computers - involves modification of binary numbers only of block part of address by inversion of numbersInfo
- Publication number
- FR2222698A1 FR2222698A1 FR7408634A FR7408634A FR2222698A1 FR 2222698 A1 FR2222698 A1 FR 2222698A1 FR 7408634 A FR7408634 A FR 7408634A FR 7408634 A FR7408634 A FR 7408634A FR 2222698 A1 FR2222698 A1 FR 2222698A1
- Authority
- FR
- France
- Prior art keywords
- numbers
- inversion
- computers
- address
- block part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0607—Interleaved addressing
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
RO7426573A RO58199A2 (nl) | 1973-03-22 | 1973-03-22 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2222698A1 true FR2222698A1 (en) | 1974-10-18 |
FR2222698B3 FR2222698B3 (nl) | 1976-12-24 |
Family
ID=20092038
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7408634A Granted FR2222698A1 (en) | 1973-03-22 | 1974-03-14 | Interlaced addressing system for computers - involves modification of binary numbers only of block part of address by inversion of numbers |
Country Status (2)
Country | Link |
---|---|
FR (1) | FR2222698A1 (nl) |
RO (1) | RO58199A2 (nl) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2421424A1 (fr) * | 1978-03-29 | 1979-10-26 | Siemens Ag | Procede et dispositif pour modifier des adresses pour la commande de selection de memoire d'un microcalculateur a une microplaquette comportant une memoire pouvant etre developpee exterieurement |
EP0244037A1 (en) * | 1986-04-28 | 1987-11-04 | Group 2000 Nederland B.V. | System for transmitting and/or switching signals |
EP0282070A2 (en) * | 1987-03-13 | 1988-09-14 | Fujitsu Limited | Vector access to memories |
-
1973
- 1973-03-22 RO RO7426573A patent/RO58199A2/ro unknown
-
1974
- 1974-03-14 FR FR7408634A patent/FR2222698A1/fr active Granted
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2421424A1 (fr) * | 1978-03-29 | 1979-10-26 | Siemens Ag | Procede et dispositif pour modifier des adresses pour la commande de selection de memoire d'un microcalculateur a une microplaquette comportant une memoire pouvant etre developpee exterieurement |
EP0244037A1 (en) * | 1986-04-28 | 1987-11-04 | Group 2000 Nederland B.V. | System for transmitting and/or switching signals |
EP0282070A2 (en) * | 1987-03-13 | 1988-09-14 | Fujitsu Limited | Vector access to memories |
EP0282070A3 (en) * | 1987-03-13 | 1990-10-10 | Fujitsu Limited | Vector access to memories |
Also Published As
Publication number | Publication date |
---|---|
FR2222698B3 (nl) | 1976-12-24 |
RO58199A2 (nl) | 1975-07-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |