FR2136373A5 - - Google Patents
Info
- Publication number
- FR2136373A5 FR2136373A5 FR7212965A FR7212965A FR2136373A5 FR 2136373 A5 FR2136373 A5 FR 2136373A5 FR 7212965 A FR7212965 A FR 7212965A FR 7212965 A FR7212965 A FR 7212965A FR 2136373 A5 FR2136373 A5 FR 2136373A5
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/324—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address using program counter relative addressing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/321—Program or instruction counter, e.g. incrementing
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13365471A | 1971-04-13 | 1971-04-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
FR2136373A5 true FR2136373A5 (fr) | 1972-12-22 |
Family
ID=22459697
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7212965A Expired FR2136373A5 (fr) | 1971-04-13 | 1972-04-13 |
Country Status (6)
Country | Link |
---|---|
US (1) | US3731283A (fr) |
AU (1) | AU459811B2 (fr) |
DE (1) | DE2217565A1 (fr) |
FR (1) | FR2136373A5 (fr) |
GB (1) | GB1391701A (fr) |
IT (1) | IT957182B (fr) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3815101A (en) * | 1972-11-08 | 1974-06-04 | Sperry Rand Corp | Processor state and storage limits register auto-switch |
US3833889A (en) * | 1973-03-08 | 1974-09-03 | Control Data Corp | Multi-mode data processing system |
US3828316A (en) * | 1973-05-30 | 1974-08-06 | Sperry Rand Corp | Character addressing in a word oriented computer system |
FR122199A (fr) * | 1973-12-17 | |||
US4251860A (en) * | 1978-10-23 | 1981-02-17 | International Business Machines Corporation | Virtual addressing apparatus employing separate data paths for segment and offset portions of a virtual address and utilizing only the offset portion to calculate virtual address |
CA1223079A (fr) * | 1984-06-27 | 1987-06-16 | William C. Moyer | Processeur de donnees a point d'arret reglable pour minimiser le temps systeme |
US5611065A (en) * | 1994-09-14 | 1997-03-11 | Unisys Corporation | Address prediction for relative-to-absolute addressing |
US5819056A (en) * | 1995-10-06 | 1998-10-06 | Advanced Micro Devices, Inc. | Instruction buffer organization method and system |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1181461B (de) * | 1963-10-08 | 1964-11-12 | Telefunken Patent | Adressenaddierwerk einer programm-gesteuerten Rechenmaschine |
US3470537A (en) * | 1966-11-25 | 1969-09-30 | Gen Electric | Information processing system using relative addressing |
US3461433A (en) * | 1967-01-27 | 1969-08-12 | Sperry Rand Corp | Relative addressing system for memories |
US3510847A (en) * | 1967-09-25 | 1970-05-05 | Burroughs Corp | Address manipulation circuitry for a digital computer |
-
1971
- 1971-04-13 US US00133654A patent/US3731283A/en not_active Expired - Lifetime
-
1972
- 1972-04-07 AU AU40906/72A patent/AU459811B2/en not_active Expired
- 1972-04-12 GB GB1679572A patent/GB1391701A/en not_active Expired
- 1972-04-12 IT IT7232/72A patent/IT957182B/it active
- 1972-04-12 DE DE19722217565 patent/DE2217565A1/de not_active Ceased
- 1972-04-13 FR FR7212965A patent/FR2136373A5/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
GB1391701A (en) | 1975-04-23 |
DE2217565A1 (de) | 1972-12-14 |
AU459811B2 (en) | 1975-03-19 |
IT957182B (it) | 1973-10-10 |
US3731283A (en) | 1973-05-01 |
AU4090672A (en) | 1973-10-11 |
Similar Documents
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |