FR2112280B1 - - Google Patents

Info

Publication number
FR2112280B1
FR2112280B1 FR7136217A FR7136217A FR2112280B1 FR 2112280 B1 FR2112280 B1 FR 2112280B1 FR 7136217 A FR7136217 A FR 7136217A FR 7136217 A FR7136217 A FR 7136217A FR 2112280 B1 FR2112280 B1 FR 2112280B1
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7136217A
Other versions
FR2112280A1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of FR2112280A1 publication Critical patent/FR2112280A1/fr
Application granted granted Critical
Publication of FR2112280B1 publication Critical patent/FR2112280B1/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/117—Oxidation, selective
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/118—Oxide films
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S252/00—Compositions
    • Y10S252/95—Doping agent source material
    • Y10S252/951—Doping agent source material for vapor transport

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
FR7136217A 1970-10-09 1971-10-08 Expired FR2112280B1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP45088967A JPS4926747B1 (fr) 1970-10-09 1970-10-09

Publications (2)

Publication Number Publication Date
FR2112280A1 FR2112280A1 (fr) 1972-06-16
FR2112280B1 true FR2112280B1 (fr) 1977-03-18

Family

ID=13957574

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7136217A Expired FR2112280B1 (fr) 1970-10-09 1971-10-08

Country Status (5)

Country Link
US (1) US3767484A (fr)
JP (1) JPS4926747B1 (fr)
DE (1) DE2148431C3 (fr)
FR (1) FR2112280B1 (fr)
GB (1) GB1358715A (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4006046A (en) * 1975-04-21 1977-02-01 Trw Inc. Method for compensating for emitter-push effect in the fabrication of transistors
DE2846671C2 (de) * 1977-10-26 1982-09-09 Tokyo Shibaura Denki K.K., Kawasaki, Kanagawa Verfahren zur Herstellung einer Halbleitervorrichtung
EP0030798B1 (fr) * 1979-12-17 1983-12-28 Hughes Aircraft Company Procédé pour déposer des couches d'oxyde par dépôt photochimique de vapeur à basse température
US4263066A (en) * 1980-06-09 1981-04-21 Varian Associates, Inc. Process for concurrent formation of base diffusion and p+ profile from single source predeposition
JPS58122724A (ja) * 1982-01-18 1983-07-21 Toshiba Corp 半導体素子の製造方法
US5126281A (en) * 1990-09-11 1992-06-30 Hewlett-Packard Company Diffusion using a solid state source
US6333245B1 (en) 1999-12-21 2001-12-25 International Business Machines Corporation Method for introducing dopants into semiconductor devices using a germanium oxide sacrificial layer

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL302323A (fr) * 1963-02-08
US3640782A (en) * 1967-10-13 1972-02-08 Gen Electric Diffusion masking in semiconductor preparation
US3574010A (en) * 1968-12-30 1971-04-06 Texas Instruments Inc Fabrication of metal insulator semiconductor field effect transistors

Also Published As

Publication number Publication date
DE2148431A1 (de) 1972-04-13
JPS4926747B1 (fr) 1974-07-11
DE2148431C3 (de) 1978-11-23
FR2112280A1 (fr) 1972-06-16
DE2148431B2 (de) 1976-11-04
GB1358715A (en) 1974-07-03
US3767484A (en) 1973-10-23

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Legal Events

Date Code Title Description
ST Notification of lapse