FR2105862A5 - - Google Patents
Info
- Publication number
- FR2105862A5 FR2105862A5 FR7129451A FR7129451A FR2105862A5 FR 2105862 A5 FR2105862 A5 FR 2105862A5 FR 7129451 A FR7129451 A FR 7129451A FR 7129451 A FR7129451 A FR 7129451A FR 2105862 A5 FR2105862 A5 FR 2105862A5
- Authority
- FR
- France
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/14—Digital recording or reproducing using self-clocking codes
- G11B20/1403—Digital recording or reproducing using self-clocking codes characterised by the use of two levels
- G11B20/1407—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol
- G11B20/1419—Digital recording or reproducing using self-clocking codes characterised by the use of two levels code representation depending on a single bit, i.e. where a one is always represented by a first code symbol while a zero is always represented by a second code symbol to or from biphase level coding, i.e. to or from codes where a one is coded as a transition from a high to a low level during the middle of a bit cell and a zero is encoded as a transition from a low to a high level during the middle of a bit cell or vice versa, e.g. split phase code, Manchester code conversion to or from biphase space or mark coding, i.e. to or from codes where there is a transition at the beginning of every bit cell and a one has no second transition and a zero has a second transition one half of a bit period later or vice versa, e.g. double frequency code, FM code
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Making Paper Articles (AREA)
- Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)
- Analogue/Digital Conversion (AREA)
- Manipulation Of Pulses (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Dc Digital Transmission (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US7614570A | 1970-09-28 | 1970-09-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| FR2105862A5 true FR2105862A5 (enExample) | 1972-04-28 |
Family
ID=22130192
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FR7129451A Expired FR2105862A5 (enExample) | 1970-09-28 | 1971-07-30 |
Country Status (3)
| Country | Link |
|---|---|
| JP (2) | JPS5240555B1 (enExample) |
| FR (1) | FR2105862A5 (enExample) |
| GB (1) | GB1311078A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2408891A1 (fr) * | 1977-11-14 | 1979-06-08 | Cii Honeywell Bull | Dispositif d'integration d'une suite de signaux electriques |
-
1971
- 1971-07-30 FR FR7129451A patent/FR2105862A5/fr not_active Expired
- 1971-08-16 JP JP46061706A patent/JPS5240555B1/ja active Pending
- 1971-08-25 GB GB3985771A patent/GB1311078A/en not_active Expired
-
1977
- 1977-10-18 JP JP1977139911U patent/JPS5623072Y2/ja not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2408891A1 (fr) * | 1977-11-14 | 1979-06-08 | Cii Honeywell Bull | Dispositif d'integration d'une suite de signaux electriques |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5623072Y2 (enExample) | 1981-05-29 |
| JPS5240555B1 (enExample) | 1977-10-13 |
| DE2141714A1 (de) | 1972-04-06 |
| JPS5371883U (enExample) | 1978-06-15 |
| GB1311078A (en) | 1973-03-21 |
| DE2141714B2 (de) | 1977-01-27 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ST | Notification of lapse |