FR1587656A - - Google Patents

Info

Publication number
FR1587656A
FR1587656A FR1587656DA FR1587656A FR 1587656 A FR1587656 A FR 1587656A FR 1587656D A FR1587656D A FR 1587656DA FR 1587656 A FR1587656 A FR 1587656A
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
French (fr)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Application granted granted Critical
Publication of FR1587656A publication Critical patent/FR1587656A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30018—Bit or string instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/015—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising having at least two separately controlled shifting levels, e.g. using shifting matrices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54533—Configuration data, translation, passwords, databases

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Databases & Information Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Executing Machine-Instructions (AREA)
FR1587656D 1968-08-01 1968-08-01 Expired FR1587656A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR161442 1968-08-01

Publications (1)

Publication Number Publication Date
FR1587656A true FR1587656A (ja) 1970-03-27

Family

ID=8653310

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1587656D Expired FR1587656A (ja) 1968-08-01 1968-08-01

Country Status (5)

Country Link
JP (1) JPS512771B1 (ja)
BE (1) BE736922A (ja)
CH (1) CH520980A (ja)
DE (1) DE1938348A1 (ja)
FR (1) FR1587656A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2445982A1 (fr) * 1979-01-02 1980-08-01 Honeywell Inf Systems Circuit pour recomposer un nombre binaire pur dans un systeme de traitement de donnees
EP0018911A1 (fr) * 1979-05-04 1980-11-12 COMPAGNIE INDUSTRIELLE DES TELECOMMUNICATIONS CIT-ALCATEL S.A. dite: Unité logique de gestion de messages

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5330062A (en) * 1976-09-01 1978-03-20 Maeda Tetsukoushiyo Kk Liquid storage heat exchanger
JPH0665760U (ja) * 1993-01-27 1994-09-16 株式会社三浦研究所 過冷却水用熱交換器の水管形状
US9003170B2 (en) * 2009-12-22 2015-04-07 Intel Corporation Bit range isolation instructions, methods, and apparatus
US9207942B2 (en) * 2013-03-15 2015-12-08 Intel Corporation Systems, apparatuses,and methods for zeroing of bits in a data element

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2445982A1 (fr) * 1979-01-02 1980-08-01 Honeywell Inf Systems Circuit pour recomposer un nombre binaire pur dans un systeme de traitement de donnees
EP0018911A1 (fr) * 1979-05-04 1980-11-12 COMPAGNIE INDUSTRIELLE DES TELECOMMUNICATIONS CIT-ALCATEL S.A. dite: Unité logique de gestion de messages
FR2455825A1 (fr) * 1979-05-04 1980-11-28 Cit Alcatel Unite logique de gestion de messages

Also Published As

Publication number Publication date
CH520980A (fr) 1972-03-31
DE1938348A1 (de) 1970-04-09
JPS512771B1 (ja) 1976-01-28
BE736922A (ja) 1970-02-02

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Legal Events

Date Code Title Description
ST Notification of lapse