FR1506074A - Dispositif d'adressage pour l'emmagasinage de blocs de données contigus - Google Patents

Dispositif d'adressage pour l'emmagasinage de blocs de données contigus

Info

Publication number
FR1506074A
FR1506074A FR8229A FR06008229A FR1506074A FR 1506074 A FR1506074 A FR 1506074A FR 8229 A FR8229 A FR 8229A FR 06008229 A FR06008229 A FR 06008229A FR 1506074 A FR1506074 A FR 1506074A
Authority
FR
France
Prior art keywords
data blocks
contiguous data
addressing device
storing contiguous
storing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR8229A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of FR1506074A publication Critical patent/FR1506074A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Error Detection And Correction (AREA)
  • Static Random-Access Memory (AREA)
  • Memory System (AREA)
FR8229A 1966-01-03 1966-12-15 Dispositif d'adressage pour l'emmagasinage de blocs de données contigus Expired FR1506074A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US51814966A 1966-01-03 1966-01-03

Publications (1)

Publication Number Publication Date
FR1506074A true FR1506074A (fr) 1967-12-15

Family

ID=27734865

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8229A Expired FR1506074A (fr) 1966-01-03 1966-12-15 Dispositif d'adressage pour l'emmagasinage de blocs de données contigus

Country Status (4)

Country Link
US (1) US3435420A (fr)
DE (1) DE1524184B1 (fr)
FR (1) FR1506074A (fr)
GB (1) GB1112510A (fr)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3533077A (en) * 1967-11-08 1970-10-06 Ibm Address modification
US3581291A (en) * 1968-10-31 1971-05-25 Hitachi Ltd Memory control system in multiprocessing system
FR10582E (fr) * 1970-06-29 1909-07-30 Paul Alexis Victor Lerolle Jeu de serrures avec passe-partout
US4285040A (en) * 1977-11-04 1981-08-18 Sperry Corporation Dual mode virtual-to-real address translation mechanism
US4195342A (en) * 1977-12-22 1980-03-25 Honeywell Information Systems Inc. Multi-configurable cache store system
US4779187A (en) * 1985-04-10 1988-10-18 Microsoft Corporation Method and operating system for executing programs in a multi-mode microprocessor
CA1234224A (fr) * 1985-05-28 1988-03-15 Boleslav Sykora Systeme de gestion de memoire d'ordinateur
US5455919A (en) * 1992-11-03 1995-10-03 International Business Machines Corporation Installation and use of plural expanded memory managers

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3202970A (en) * 1958-08-29 1965-08-24 Ibm Scatter read/write operation using plural control words
USRE26087E (en) * 1959-12-30 1966-09-20 Multi-computer system including multiplexed memories. lookahead, and address interleaving features
GB976499A (en) * 1960-03-16 1964-11-25 Nat Res Dev Improvements in or relating to electronic digital computing machines
BE621075A (fr) * 1961-08-17
US3292151A (en) * 1962-06-04 1966-12-13 Ibm Memory expansion
US3248709A (en) * 1962-11-06 1966-04-26 Honeywell Inc Electrical data handling apparatus including selective substitution of addressable input-output devices
US3319226A (en) * 1962-11-30 1967-05-09 Burroughs Corp Data processor module for a modular data processing system for operation with a time-shared memory in the simultaneous execution of multi-tasks and multi-programs
US3290658A (en) * 1963-12-11 1966-12-06 Rca Corp Electronic computer with interrupt facility
US3323109A (en) * 1963-12-30 1967-05-30 North American Aviation Inc Multiple computer-multiple memory system

Also Published As

Publication number Publication date
DE1524184B1 (de) 1970-10-08
GB1112510A (en) 1968-05-08
US3435420A (en) 1969-03-25

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