FR1497278A - Circuit de correction d'erreur pour dispositif d'enregistrement digital - Google Patents
Circuit de correction d'erreur pour dispositif d'enregistrement digitalInfo
- Publication number
- FR1497278A FR1497278A FR81115A FR81115A FR1497278A FR 1497278 A FR1497278 A FR 1497278A FR 81115 A FR81115 A FR 81115A FR 81115 A FR81115 A FR 81115A FR 1497278 A FR1497278 A FR 1497278A
- Authority
- FR
- France
- Prior art keywords
- error correction
- recording device
- correction circuit
- digital recording
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
- G06F11/1032—Simple parity
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/88—Masking faults in memories by using spares or by reconfiguring with partially good memories
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Signal Processing (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Current Or Voltage (AREA)
- Detection And Correction Of Errors (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US49944065A | 1965-10-21 | 1965-10-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
FR1497278A true FR1497278A (fr) | 1967-10-06 |
Family
ID=23985264
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR81115A Expired FR1497278A (fr) | 1965-10-21 | 1966-10-21 | Circuit de correction d'erreur pour dispositif d'enregistrement digital |
Country Status (5)
Country | Link |
---|---|
US (1) | US3430197A (fr) |
DE (1) | DE1524173A1 (fr) |
FR (1) | FR1497278A (fr) |
GB (1) | GB1155858A (fr) |
NL (1) | NL6614859A (fr) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3573727A (en) * | 1968-11-04 | 1971-04-06 | Bell Telephone Labor Inc | Feedback arrangement for minimizing a system parameter |
US3670304A (en) * | 1970-09-28 | 1972-06-13 | Ibm | Method and apparatus for detecting errors read from moving-magnetic-storage device with digital interface |
US3753236A (en) * | 1972-03-31 | 1973-08-14 | Honeywell Inf Systems | Microprogrammable peripheral controller |
US4024498A (en) * | 1975-08-04 | 1977-05-17 | Mcintosh Billy L | Apparatus for dead track recovery |
JPS59112783A (ja) * | 1982-12-20 | 1984-06-29 | Sony Corp | デジタルデ−タ受信機 |
JP2835107B2 (ja) * | 1989-11-16 | 1998-12-14 | 沖電気工業株式会社 | 不揮発性半導体記憶装置のエラー訂正回路及びそのエラー訂正方法 |
US6720812B2 (en) | 1995-06-02 | 2004-04-13 | Nova R&D, Inc. | Multi-channel integrated circuit |
US6150849A (en) * | 1995-06-02 | 2000-11-21 | Tuemer; Tuemay O. | Readout chip for nuclear applications |
US5696458A (en) * | 1995-06-02 | 1997-12-09 | Nova R&D, Inc. | Front end data readout chip |
US7126386B2 (en) * | 2001-10-25 | 2006-10-24 | Nova R&D, Inc. | Multi-channel integrated circuit |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA561797A (fr) * | 1958-08-12 | W. Hutchinson George | Trieur de pulsations | |
US3098994A (en) * | 1956-10-26 | 1963-07-23 | Itt | Self checking digital computer system |
US2991372A (en) * | 1960-02-08 | 1961-07-04 | Westinghouse Air Brake Co | Voltage signal comparison means with storage means |
US3214700A (en) * | 1961-03-17 | 1965-10-26 | Trw Inc | Variable threshold signal detection system |
-
1965
- 1965-10-21 US US499440A patent/US3430197A/en not_active Expired - Lifetime
-
1966
- 1966-10-14 GB GB45942/66A patent/GB1155858A/en not_active Expired
- 1966-10-18 DE DE19661524173 patent/DE1524173A1/de active Pending
- 1966-10-21 NL NL6614859A patent/NL6614859A/xx unknown
- 1966-10-21 FR FR81115A patent/FR1497278A/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
US3430197A (en) | 1969-02-25 |
NL6614859A (fr) | 1967-04-24 |
DE1524173A1 (de) | 1970-07-02 |
GB1155858A (en) | 1969-06-25 |
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