FR1454587A - Dispositif symétrique d'attaque de ligne - Google Patents

Dispositif symétrique d'attaque de ligne

Info

Publication number
FR1454587A
FR1454587A FR33382A FR33382A FR1454587A FR 1454587 A FR1454587 A FR 1454587A FR 33382 A FR33382 A FR 33382A FR 33382 A FR33382 A FR 33382A FR 1454587 A FR1454587 A FR 1454587A
Authority
FR
France
Prior art keywords
symmetrical line
attack device
line attack
symmetrical
line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR33382A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of FR1454587A publication Critical patent/FR1454587A/fr
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/018—Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806—Interface arrangements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/02—Shaping pulses by amplifying

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Nonlinear Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
FR33382A 1964-10-01 1965-10-01 Dispositif symétrique d'attaque de ligne Expired FR1454587A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US400768A US3381090A (en) 1964-10-01 1964-10-01 Balanced line driver

Publications (1)

Publication Number Publication Date
FR1454587A true FR1454587A (fr) 1966-02-11

Family

ID=23584919

Family Applications (1)

Application Number Title Priority Date Filing Date
FR33382A Expired FR1454587A (fr) 1964-10-01 1965-10-01 Dispositif symétrique d'attaque de ligne

Country Status (4)

Country Link
US (1) US3381090A (fr)
DE (1) DE1228664B (fr)
FR (1) FR1454587A (fr)
GB (1) GB1101855A (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4841722B1 (fr) * 1969-06-13 1973-12-08
US3825682A (en) * 1973-06-27 1974-07-23 Rca Corp Balanced line driver, line receiver system
EP0116603A4 (fr) * 1982-08-09 1984-11-22 Advanced Micro Devices Inc Appareil de transmission et de reception de signaux numeriques.

Also Published As

Publication number Publication date
GB1101855A (en) 1968-01-31
DE1228664B (de) 1966-11-17
US3381090A (en) 1968-04-30

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