FR1320034A - Dispositifs de calcul numérique utilisant un seul type de circuit logique - Google Patents

Dispositifs de calcul numérique utilisant un seul type de circuit logique

Info

Publication number
FR1320034A
FR1320034A FR881927A FR881927A FR1320034A FR 1320034 A FR1320034 A FR 1320034A FR 881927 A FR881927 A FR 881927A FR 881927 A FR881927 A FR 881927A FR 1320034 A FR1320034 A FR 1320034A
Authority
FR
France
Prior art keywords
computing devices
logic circuit
single type
digital computing
digital
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR881927A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US76641A external-priority patent/US3075093A/en
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of FR1320034A publication Critical patent/FR1320034A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G06F7/502—Half adders; Full adders consisting of two cascaded half adders
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/212—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
FR881927A 1960-12-19 1961-12-14 Dispositifs de calcul numérique utilisant un seul type de circuit logique Expired FR1320034A (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US76641A US3075093A (en) 1960-12-19 1960-12-19 Exclusive or circuit using nor logic
US164640A US3094614A (en) 1960-12-19 1961-12-14 Full adder and subtractor using nor logic

Publications (1)

Publication Number Publication Date
FR1320034A true FR1320034A (fr) 1963-03-08

Family

ID=26758321

Family Applications (1)

Application Number Title Priority Date Filing Date
FR881927A Expired FR1320034A (fr) 1960-12-19 1961-12-14 Dispositifs de calcul numérique utilisant un seul type de circuit logique

Country Status (2)

Country Link
US (1) US3094614A (fr)
FR (1) FR1320034A (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3226565A (en) * 1961-03-28 1965-12-28 Ibm Logic tree comprising nor or nand logic blocks
US3237159A (en) * 1961-12-07 1966-02-22 Martin Marietta Corp High speed comparator
US3291973A (en) * 1964-09-22 1966-12-13 Sperry Rand Corp Binary serial adders utilizing nor gates
US3340388A (en) * 1965-07-12 1967-09-05 Ibm Latched carry save adder circuit for multipliers
US3454751A (en) * 1966-01-20 1969-07-08 Westinghouse Electric Corp Binary adder circuit using denial logic
US3535546A (en) * 1968-02-12 1970-10-20 Control Data Corp Current mode logic
US3576984A (en) * 1968-08-09 1971-05-04 Bunker Ramo Multifunction logic network

Also Published As

Publication number Publication date
US3094614A (en) 1963-06-18

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