FR1211554A - Perfectionnements aux dispositifs constitués en matrices - Google Patents

Perfectionnements aux dispositifs constitués en matrices

Info

Publication number
FR1211554A
FR1211554A FR1211554DA FR1211554A FR 1211554 A FR1211554 A FR 1211554A FR 1211554D A FR1211554D A FR 1211554DA FR 1211554 A FR1211554 A FR 1211554A
Authority
FR
France
Prior art keywords
matrices
devices made
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
Inventor
Nikolaus Fries
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Application granted granted Critical
Publication of FR1211554A publication Critical patent/FR1211554A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/498—Computations with decimal numbers radix 12 or 20. using counter-type accumulators
    • G06F7/4983—Multiplying; Dividing
    • G06F7/4988—Multiplying; Dividing by table look-up
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H63/00—Details of electrically-operated selector switches
    • H01H63/36—Circuit arrangements for ensuring correct or desired operation and not adapted to a particular application of the selector switch
    • H01H63/38—Circuit arrangements for ensuring correct or desired operation and not adapted to a particular application of the selector switch for multi-position wiper switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/60—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being bipolar transistors
    • H03K17/62—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors
    • H03K17/6221—Switching arrangements with several input- output-terminals, e.g. multiplexers, distributors combined with selecting means

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
FR1211554D 1957-08-28 1958-08-18 Perfectionnements aux dispositifs constitués en matrices Expired FR1211554A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DEST12913A DE1089199B (de) 1957-08-28 1957-08-28 Waehlerschaltung

Publications (1)

Publication Number Publication Date
FR1211554A true FR1211554A (fr) 1960-03-17

Family

ID=7455867

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1211554D Expired FR1211554A (fr) 1957-08-28 1958-08-18 Perfectionnements aux dispositifs constitués en matrices

Country Status (5)

Country Link
US (1) US3115617A (fr)
BE (1) BE570715A (fr)
CH (1) CH362552A (fr)
DE (1) DE1089199B (fr)
FR (1) FR1211554A (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3317897A (en) * 1963-08-13 1967-05-02 Joseph A Ceonzo Multi-stage switching network
US3496545A (en) * 1966-04-18 1970-02-17 Sperry Rand Corp Switching matrix
US3875392A (en) * 1973-06-18 1975-04-01 Ii Miner S Keeler Electrical computing system for simultaneously performing a plurality of operations on two or more operands

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2476066A (en) * 1948-05-06 1949-07-12 Sylvania Electric Prod Crystal matrix
US2844811A (en) * 1952-08-20 1958-07-22 Monroe Calculating Machine Switching circuits
US2889537A (en) * 1955-10-28 1959-06-02 Gen Dynamics Corp Electronic selector switch

Also Published As

Publication number Publication date
CH362552A (de) 1962-06-15
DE1089199B (de) 1960-09-15
BE570715A (fr)
US3115617A (en) 1963-12-24

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