FR1170318A - Perfectionnements aux dispositifs additionneurs - Google Patents

Perfectionnements aux dispositifs additionneurs

Info

Publication number
FR1170318A
FR1170318A FR1170318DA FR1170318A FR 1170318 A FR1170318 A FR 1170318A FR 1170318D A FR1170318D A FR 1170318DA FR 1170318 A FR1170318 A FR 1170318A
Authority
FR
France
Prior art keywords
adding devices
devices
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
Inventor
J Robin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Compagnie IBM France SAS
Original Assignee
Compagnie IBM France SAS
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Compagnie IBM France SAS filed Critical Compagnie IBM France SAS
Application granted granted Critical
Publication of FR1170318A publication Critical patent/FR1170318A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
FR1170318D 1957-03-26 1957-03-26 Perfectionnements aux dispositifs additionneurs Expired FR1170318A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1170318T 1957-03-26

Publications (1)

Publication Number Publication Date
FR1170318A true FR1170318A (fr) 1959-01-13

Family

ID=9656971

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1170318D Expired FR1170318A (fr) 1957-03-26 1957-03-26 Perfectionnements aux dispositifs additionneurs

Country Status (1)

Country Link
FR (1) FR1170318A (fr)

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