FI990375A0 - Menetelmä piirilevykiinnitysten testaamiseksi ja piirilevy - Google Patents

Menetelmä piirilevykiinnitysten testaamiseksi ja piirilevy

Info

Publication number
FI990375A0
FI990375A0 FI990375A FI990375A FI990375A0 FI 990375 A0 FI990375 A0 FI 990375A0 FI 990375 A FI990375 A FI 990375A FI 990375 A FI990375 A FI 990375A FI 990375 A0 FI990375 A0 FI 990375A0
Authority
FI
Finland
Prior art keywords
circuit board
procedure
mounts
testing circuit
testing
Prior art date
Application number
FI990375A
Other languages
English (en)
Swedish (sv)
Other versions
FI990375A (fi
Inventor
Timo Pinola
Original Assignee
Nokia Telecommunications Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Telecommunications Oy filed Critical Nokia Telecommunications Oy
Priority to FI990375A priority Critical patent/FI990375A/fi
Publication of FI990375A0 publication Critical patent/FI990375A0/fi
Priority to PCT/FI2000/000133 priority patent/WO2000050909A1/en
Priority to EP00906392A priority patent/EP1181566B1/en
Priority to AU28078/00A priority patent/AU2807800A/en
Priority to US09/913,969 priority patent/US6552558B1/en
Priority to DE60030108T priority patent/DE60030108T2/de
Publication of FI990375A publication Critical patent/FI990375A/fi

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/66—Testing of connections, e.g. of plugs or non-disconnectable joints
    • G01R31/70—Testing of connections between components and printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3421—Leaded components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
FI990375A 1999-02-22 1999-02-22 Menetelmä piirilevykiinnitysten testaamiseksi ja piirilevy FI990375A (fi)

Priority Applications (6)

Application Number Priority Date Filing Date Title
FI990375A FI990375A (fi) 1999-02-22 1999-02-22 Menetelmä piirilevykiinnitysten testaamiseksi ja piirilevy
PCT/FI2000/000133 WO2000050909A1 (en) 1999-02-22 2000-02-21 Testing fastenings of printed circuit board
EP00906392A EP1181566B1 (en) 1999-02-22 2000-02-21 Testing fastenings of printed circuit board
AU28078/00A AU2807800A (en) 1999-02-22 2000-02-21 Testing fastenings of printed circuit board
US09/913,969 US6552558B1 (en) 1999-02-22 2000-02-21 Testing fastenings of printed circuit board
DE60030108T DE60030108T2 (de) 1999-02-22 2000-02-21 Verfahren zur prüfung von leiterplattenbefestigungen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FI990375A FI990375A (fi) 1999-02-22 1999-02-22 Menetelmä piirilevykiinnitysten testaamiseksi ja piirilevy

Publications (2)

Publication Number Publication Date
FI990375A0 true FI990375A0 (fi) 1999-02-22
FI990375A FI990375A (fi) 2000-12-07

Family

ID=8553891

Family Applications (1)

Application Number Title Priority Date Filing Date
FI990375A FI990375A (fi) 1999-02-22 1999-02-22 Menetelmä piirilevykiinnitysten testaamiseksi ja piirilevy

Country Status (6)

Country Link
US (1) US6552558B1 (fi)
EP (1) EP1181566B1 (fi)
AU (1) AU2807800A (fi)
DE (1) DE60030108T2 (fi)
FI (1) FI990375A (fi)
WO (1) WO2000050909A1 (fi)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE458382T1 (de) * 2003-10-06 2010-03-15 Microsemi Corp Stromteilungsschema und einrichtung für mehrfach- ccf-lampenbetrieb
GB0601543D0 (en) * 2006-01-26 2006-03-08 Pace Micro Tech Plc Solder test apparatus and method of use thereof
US20110140730A1 (en) * 2008-05-30 2011-06-16 Nxp B.V. Detection circuitry for detecting bonding conditions on bond pads

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DK291184D0 (da) * 1984-06-13 1984-06-13 Boeegh Petersen Allan Fremgangsmaade og indretning til test af kredsloebsplader
JPH06181400A (ja) * 1992-12-11 1994-06-28 Fanuc Ltd Ｉｃ実装、及び回路、機能の種類の判断方法
EP0693784B1 (en) 1994-06-24 2000-09-06 STMicroelectronics S.r.l. Safeguard for integrated output power stages employing multiple bond-wires
EP0720023B1 (en) 1994-12-30 2003-05-07 STMicroelectronics S.r.l. Test method for power integrated devices
EP0747930B1 (en) * 1995-05-19 2000-09-27 STMicroelectronics S.r.l. Electronic device with multiple bonding wires, method of fabrication and method of testing bonding wire integrity
JPH09102665A (ja) * 1995-10-04 1997-04-15 Omron Corp 回路基板
US5918107A (en) * 1998-04-13 1999-06-29 Micron Technology, Inc. Method and system for fabricating and testing assemblies containing wire bonded semiconductor dice

Also Published As

Publication number Publication date
AU2807800A (en) 2000-09-14
DE60030108T2 (de) 2007-03-08
EP1181566B1 (en) 2006-08-16
WO2000050909A1 (en) 2000-08-31
DE60030108D1 (de) 2006-09-28
FI990375A (fi) 2000-12-07
EP1181566A1 (en) 2002-02-27
US6552558B1 (en) 2003-04-22

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