FI942853A0 - Styrbar multiplexer avsedd för en digital kopplare - Google Patents

Styrbar multiplexer avsedd för en digital kopplare

Info

Publication number
FI942853A0
FI942853A0 FI942853A FI942853A FI942853A0 FI 942853 A0 FI942853 A0 FI 942853A0 FI 942853 A FI942853 A FI 942853A FI 942853 A FI942853 A FI 942853A FI 942853 A0 FI942853 A0 FI 942853A0
Authority
FI
Finland
Prior art keywords
digital switch
controllable multiplexer
multiplexer
controllable
digital
Prior art date
Application number
FI942853A
Other languages
English (en)
Finnish (fi)
Other versions
FI942853A (sv
Inventor
Erik Oscar Abefelt
Anders Karl Bjenne
Peter Carl Birger Lundh
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Publication of FI942853A publication Critical patent/FI942853A/sv
Publication of FI942853A0 publication Critical patent/FI942853A0/sv

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Communication Control (AREA)
  • Electronic Switches (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
FI942853A 1991-12-16 1994-06-15 Styrbar multiplexer avsedd för en digital kopplare FI942853A0 (sv)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9103715A SE469618B (sv) 1991-12-16 1991-12-16 Multiplexor vid en digital vaeljare
PCT/SE1992/000808 WO1993012602A1 (en) 1991-12-16 1992-11-25 Controllable multiplexer for a digital switch

Publications (2)

Publication Number Publication Date
FI942853A FI942853A (sv) 1994-06-15
FI942853A0 true FI942853A0 (sv) 1994-06-15

Family

ID=20384616

Family Applications (1)

Application Number Title Priority Date Filing Date
FI942853A FI942853A0 (sv) 1991-12-16 1994-06-15 Styrbar multiplexer avsedd för en digital kopplare

Country Status (13)

Country Link
US (1) US5327422A (sv)
EP (1) EP0617867B1 (sv)
JP (1) JPH07501916A (sv)
AU (1) AU661882B2 (sv)
CA (1) CA2125277C (sv)
DE (1) DE69229877T2 (sv)
DK (1) DK0617867T3 (sv)
ES (1) ES2135456T3 (sv)
FI (1) FI942853A0 (sv)
GR (1) GR3031608T3 (sv)
NO (1) NO942226D0 (sv)
SE (1) SE469618B (sv)
WO (1) WO1993012602A1 (sv)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5602994A (en) * 1992-09-25 1997-02-11 The United States Of America As Represented By The United States Department Of Energy Method and apparatus for high speed data acquisition and processing
JP2906361B2 (ja) * 1993-09-01 1999-06-21 富士通株式会社 多重化制御方式
DE4329733A1 (de) * 1993-09-03 1995-03-09 Sel Alcatel Ag Zeitmultiplex-Verfahren
SE503703C2 (sv) * 1993-10-12 1996-08-05 Ericsson Telefon Ab L M Multiplexerande/demultiplexerande enhet
US5596725A (en) * 1994-02-14 1997-01-21 Compaq Computer Corporation Fifo queue having replaceable entries
US6115748A (en) 1995-07-19 2000-09-05 Fujitsu Network Communications, Inc. Prioritized access to shared buffers
US5907717A (en) * 1996-02-23 1999-05-25 Lsi Logic Corporation Cross-connected memory system for allocating pool buffers in each frame buffer and providing addresses thereof
SE9603908L (sv) * 1996-10-25 1998-04-26 Ericsson Telefon Ab L M Omkonfigurering av multiplexor
US20040037558A1 (en) * 2002-08-20 2004-02-26 Nortel Networks Limited Modular high-capacity switch

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4499576A (en) * 1982-08-13 1985-02-12 At&T Bell Laboratories Multiplexed first-in, first-out queues
US4649234A (en) * 1984-07-26 1987-03-10 Siemens Aktiengesellschaft Circuit arrangement for telecommunications exchange systems, particularly telephone exchange systems, comprising information processing sequential logic systems and traffic measuring devices
US4612636A (en) * 1984-12-31 1986-09-16 Northern Telecom Limited Multiple channel depacketizer
US4809166A (en) * 1986-08-27 1989-02-28 Advanced Micro Devices, Inc. Data assembly apparatus and method
GB8623923D0 (en) * 1986-10-06 1986-11-12 Gen Electric Co Plc Digital data transmission system
JPS63171051A (ja) * 1987-01-09 1988-07-14 Hitachi Ltd 装置診断方法
US4910731A (en) * 1987-07-15 1990-03-20 Hitachi, Ltd. Switching system and method of construction thereof
US4855999A (en) * 1987-11-10 1989-08-08 Bell Communications Research, Inc. DTDM multiplexer with cross-point switch
US5058104A (en) * 1988-07-26 1991-10-15 Nec Corporation Tdm demultiplexer with dedicated maintenance channels to indicate high-speed line faults to low speed circuits
JPH0785592B2 (ja) * 1989-01-27 1995-09-13 富士通株式会社 交換機におけるデータ線切替方式
US5046000A (en) * 1989-01-27 1991-09-03 International Business Machines Corporation Single-FIFO high speed combining switch
US4939723A (en) * 1989-06-07 1990-07-03 Ford Aerospace Corporation Bit-channel multiplexer/demultiplexer
US5191578A (en) * 1990-06-14 1993-03-02 Bell Communications Research, Inc. Packet parallel interconnection network

Also Published As

Publication number Publication date
ES2135456T3 (es) 1999-11-01
AU3174993A (en) 1993-07-19
US5327422A (en) 1994-07-05
SE469618B (sv) 1993-08-02
EP0617867B1 (en) 1999-08-25
GR3031608T3 (en) 2000-01-31
NO942226L (no) 1994-06-14
JPH07501916A (ja) 1995-02-23
DE69229877T2 (de) 2000-01-13
CA2125277A1 (en) 1993-06-24
EP0617867A1 (en) 1994-10-05
WO1993012602A1 (en) 1993-06-24
SE9103715D0 (sv) 1991-12-16
DK0617867T3 (da) 2000-03-13
CA2125277C (en) 2000-07-04
FI942853A (sv) 1994-06-15
NO942226D0 (no) 1994-06-14
AU661882B2 (en) 1995-08-10
SE9103715L (sv) 1993-06-17
DE69229877D1 (de) 1999-09-30

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