FI90708B - Method and system for transmitting digital signals between a digital signal processor and side circuits connected thereto - Google Patents

Description

Method and system for transmitting digital signals between a digital signal processor and peripherals connected thereto 1 90708 5

The present invention relates to a method for transmitting digital signals between a digital signal processor, i.e. a DSP circuit, and peripheral circuits connected thereto, wherein the peripheral circuit transmits signals to the DSP circuit or receives signals from the DSP circuit relatively frequently compared to the latter operating speed. The invention also relates to a system for carrying out the method in question.

In the following, the invention will be described in the case where the peripheral circuit is an A / D converter or a D / A converter, respectively, but it will be understood that the invention can also be applied when the peripheral circuit is another circuit sending signals to or from the DSP circuit. signal receiving circuit. In other words, the peripheral circuit may in fact also be another 20 DSP circuit.

Such circuits are usually connected to each other by means of a serial interface or serial interfaces, in which case the transmission method is most often synchronous transmission. In this case, depending on the case, one or two conductors are required for the signals to be processed, a clock signal and generally at least one frame signal indicating a significant point of the signal to be transmitted, such as a starting point.

Figure 1 below shows an example of a conventional connection between a DSP circuit and an A / D converter, respectively. The A / D converter 1 converts the incoming analog signal into a sampled digital signal (Data 1), which is passed on to the DSP circuit 3 at a rate determined by the clock and frame signals. After processing the digital signal, the DSP circuit forwards the signal (Data 2) to the D / A converter 2, from which the analog signal is output. Both the incoming signal 90708 and the outgoing signal Data 2 pass through the serial interface 4 of the DSP circuit.

Figure 2 shows the signal cha-5 of the connection according to Figure 1. The signals Data 1 and Data 2 are each transmitted in the form of frames comprising 16 data bits, the moments between the frames being the times when Data 1 is available to the DSP circuit and when Data 2 must be available to the D / A converter. The diagram is somewhat simplified, but it 10 is relevant to the present case.

Problems with the prior art arrangement occur when a DSP circuit receives and transmits signals relatively often compared to the operating speed of the circuit itself.

15 In this case, sending and receiving signals often interrupts other operations of the DSP circuit and makes it difficult to write a program.

In the traditional connection method, the DSP circuit has to interrupt its other operation evenly, i.e. every 20 samples, receive data from the A / D converter and provide data to the D / A converter. If the application is such that (as it often is) the DSP circuit provides and receives data from sources other than converters, the interruption caused by this operation will be in addition to the previous one. The result is that the DSP circuit does not have a uniform time interval longer than the display interval at all, so that it would be known that the calculation can be performed without interruption.

Often, in addition to the actual signal processing calculation, other tasks need to be performed, such as message exchange between the DSP circuits or between the DSP circuit and the unit's main processor. It’s tricky if this task has to be broken down into parts and done a little at a time.

It is an object of the present invention to provide a method and system which are suitable for such cases and which avoid the interruption of the operation of the DSP circuit too often.

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90708 In order to achieve this object, the method according to the invention is characterized by what is stated in the appended claim 1. The features of the system according to the invention appear correspondingly from claim 4.

5

Thus, it is essential in the invention that a switching field is connected between the DSP circuits and the peripheral circuit, which is able to change the timing of incoming and outgoing signals or messages so that several consecutive signals are combined in time, so that the signal time slots can be summed into a single longer time slot. during which the DSP circuit can perform signal processing.

In the exemplary case where the signals consist of successive frames, a certain number of frames are preferably collected for transmission as a cluster to the DSP circuit and out of the DSP circuit, respectively, via the switching field.

The invention and its other features and advantages will be described in more detail below by way of example and with reference to the accompanying drawings, in which Figures 1 and 2 show the circuit and signal diagram already described, Figure 3 shows a system according to the invention and Figures 4 and 5 show the system of Figure 3. operational signal diagrams.

In the example case of Figure 3, the peripheral circuits of the DSP circuit are the A / D converter 1 and the D / A converter 2 in exactly the same way as. . 30 in the example of Figure 1. However, the signals from the A / D and D / A converters do not go directly to the DSP circuit, but to the switching field 5, which is still in signal exchange with the DSP circuit 3. The signal from the A / D converter 1 comprises evenly spaced 16-bit samples, which in this example are transmitted in a time divided 2 35 Mbit / s serial bus in its time slots. The frame comprises 32 8-bit time slots TS0 to TS31, with one sample corresponding to two time slots. The frame structure of the serial buses is shown in Figure 4.

4 90708 It is assumed here that the switching field has two Mbit / s serial buses, bus 1 and bus 2. In practice, there may be more buses in the switching field, but in the example case this is not necessary. In addition, it is assumed that the converters and the DSP circuit 5 all use the same clock signal of 2.048 MHz. The incoming and outgoing direction of the marking in Figure 5 always refer to the switching field. As can be seen in Figure 4 and Figure 5, the switching field in each case collects four 16-bit samples into one cluster, passing this on to the DSP circuit. Similarly, the time slots are summed into a uniform counting time during which no samples are received and each time is thus available to the DSP circuit for signal processing.

Here, the cases 15 of Figures 1-2 and 3-5, respectively, are compared with each other.

• It can be seen from the time diagram of Fig. 2 that according to the prior art, the moments when the data is available to the DSP circuit are evenly distributed. In many cases, it is also the case that the data must be read from the internal register of the DSP circuit very quickly after it reaches it, because otherwise the next data will either be overwritten by the previous one or will not be received. In audio signal processing, the sampling frequency in modern systems is up to 48 kHz (DAT recorder, full tape speed). The sample interval for Täl-25 strokes is about 20.8 μβ. However, to simplify the examples, the sampling frequency is assumed to be 32 kHz. In this case, the sample interval is 31.25 μβ. This is equivalent to half the speed of the DAT operation.

30 Thus, in the conventional connection method, the DSP circuit must interrupt its other operations at equal intervals of 31.25 μβ and receive data from the A / D converter and provide data to the D / A converter.

The arrangement according to the invention, i.e. according to Figures 3-5, gives the following time values in the example case: - frame length 125 μβ, li.

5 90708 - read / write time of samples (8/32) x 125 με = 31.25 με, - uniform time available for Ia8field (24/32) x 125 με = 93.75 μδ · 5 The DSP circuit thus has a triple uniform calculation time compared to the situation without switching field.

As an additional advantage, the switching field according to the invention brings with it excellent flexibility in signal processing. In larger devices, where several different circuits are connected to the DSP circuits, the switching field can be used to change the circuit that switches to the time slots used by the DSP circuit. This would still be possible today in principle with DSP circuits without a switching field, but then it is required that the DSP circuit itself changes its 15 switching moments to a common serial bus. When a switching field is used, the change can be made by the main processor of the unit, and the DSP circuit does not necessarily even need to receive information about the switching change.

The arrangement according to the invention, of course, requires a little more hardware, because a switching field is required. In addition, the switching field requires control to the correct state, i.e. requires a program in the unit's main processor.

25 It should be noted, however, that commercial switching field circuits are now available at low prices which are suitable for the connections according to the example given.

If a sampling frequency is used that is not subharmonic to the clock frequency of the 30 switching fields, the switching signal of the switching field and the clock signal of the A / D and D / A converters must be separated and the clock frequencies must be matched by a matching circuit between the converters and the switching field. This is the case, for example, if the sampling frequency is 48 to 35 kHz and the clock frequency of the switching field is 2.048 MHz. However, the use of the matching circuit does not alter the above procedure of the invention and does not affect the advantages obtained.

Claims (6)

6. O 7 O 8 1. For example, a digital signal processor with a digital signal processor or a DSP-chip (3) and an account with a multi-channel link (1, 2), a color signal signal with a digital signal processor or a DSP-chip with a relative relationship of: :: 25 The system function is limited to a number of digital signaling devices with a side-by-side connection (1, 2) and: DSP settings (3) via the copying board (5), colors and copying pads in the same signal mode and the best signaling device in the enclosure. sammanställning till / frän DSP-kretsen, och pä ... 30 motsvarande sätt mellan de sälunda samlade signalerna städse uppstär en längre sammanhängande tid för DSP-kretsen i och för behandling av signalerna. A method for transmitting digital signals between a digital signal processor, i.e. a DSP circuit (3), and peripheral circuits (1, 2) connected thereto, wherein signals are transmitted between the peripheral circuits and the DSP circuit relatively frequently compared to the latter operating speed, characterized in that the digital the signals are transmitted between the peripheral circuits (1, 2) and the DSP circuit (3) via the switching field (5), whereby a predetermined number of signals are collected in the switching field and 10 are transmitted as one cluster to / from the DSP circuit, respectively; a longer uniform time for the DSP circuit to process the signals. 2. For the purposes of claim 1, the wording of Figs. 35 signals are provided with a side-by-side connection (1, 2) and a DSP screen (3) under the same time interval and at the same time as the same time interval. β 90708 Method according to Claim 1, characterized in that the signals are transmitted between the peripheral circuits (1, 2) and the DSP circuit (3) in the time slots of the frames and a certain number of time slots are collected in the cluster in each case. 3. A fitting according to claims 1 or 2, which can be connected to the DSP circuit (3) by means of an A / D component (1) and an D / A component (2), which can be connected to the copying surface (5) from the A / D-omvandlaren (1) command and to D / A-om- 5 vandlaren (2) for signal signal to bus and to DSP screen (3) for signal and signal to bus and bus. A method according to claim 1 or 2, wherein an A / D converter (1) and a D / A converter (2) are connected to the DSP circuit (3), characterized in that the switching field (5) transmits from the A / D converter (1) signals to and from the D / A converter (2) on the second bus and signals to and from the DSP circuit (3) on the second bus. 4. A system for copying a digital signal processor or a DSP receiver (3) and to an additional signal enclosure (1, 2), 10 exempt A / D components and D / A components, for example, within a single signal system above the reference circuit and a DSP screen (3) relative to the device with a system function, which can be used with a separate connection (1) and a DSP screen (3) with a card and a total of 15 (5), which is not included in the game. frän sidokretsarna (1) utsända digitala signaler och ververföra de-samma i en oma sammanställning till DSP-kretsen (3), varvid för DSP-kretsen uppkommer en städse slangh sammanhängande tid för signalernas behandling. 20 A system for connecting digital signal processors, i.e. DSP circuits (3) and associated peripheral circuits (1, 2), for example A / D converters and D / A converters, to each other, wherein the signals are transmitted between the peripheral circuits and the DSP circuit. (3) relatively often compared to the latter operating speed, characterized in that a switching field (5) is connected between the peripheral circuits (1) and the DSP circuit (3), adapted to collect a predetermined number of digital signals transmitted from the peripheral circuit 35 (1) and transmit these as a single cluster to the DSP circuit (3), leaving the DSP circuit with a longer uniform time for signal processing in each case. 7 90708 5. A system according to claim 4, which comprises a coupling device (1, 2) having an access to a digital signal and a signaling range and a copying interface (5), the method comprising up to a maximum of 3 times the number of spans in the same DSP ), varvid pä motsvarande ·: ·· 'sätt ramarnas Mellantider adderas till en enhetlig signalbe-handlingstid i DSP-kretsen. System according to Claim 4, characterized in that the peripheral circuits (1, 2) are adapted to transmit digital signals in the time slots of the frames and in that the switching field (5) is adapted to collect a predetermined number of time slots as one cluster on the DSP circuit (3). accordingly, the Intervals of the frames add up to the total signal processing time in the DSP circuit. A system according to claim 4 or 5, wherein a signal transmitting A / D converter (1) and a signal receiving D / A converter (2) are connected to the DSP circuit (3), characterized in that the switching field (5) has at least two buses, the first bus operating between the switching field (5) and the converters (1, 2) providing signals in the original order, i.e. equally spaced between the switching field and the converters, and the second bus operating between the switching field (5) and the DSP circuit (3) as clusters at unequal intervals between the switching field and the DSP circuit. 20 Patentkrav 6. A system according to claims 4 or 5, which means to •. 30 DSP chips (3) are connected to the signal A / D omnibus - * ..! re (1) as well as a signal according to the D / A converter (2), which can be used as a transponder (5), a maximum of the bus conveyor (5) and a converter (5) and a converter (1, 2), other signaling devices. 35 of the present invention, having such a connection to the connection and the connection, and to the other of the connection (5) and the DSP connection (3), to provide a signal to the same connection as the connection between the two connections. I::