FI75060B - ENLIGEN KONDENSATOROMLADDNINGSFOERFARANDET ARBETANDE ELEKTRONISK ELEKTRICITETSRAEKNARE. - Google Patents

Abstract

1. An electronic electricity meter which operates in accordance with the capacitor charge exchange method for detecting the energy consumption from at least one phase of an electric network, wherein the phase is assigned a multiplier element (4, 5, 6) supplied at its input with signals proportional to current and voltage, and the power-proportional output signals of all the multipliers are added to form a sum signal (S) fed to a quantizer (8) which consists of an integrator (13) and a following limit value element (14), which imposes an upper and a lower limit value, in order to form a pulse train (u14) with a power-proportional frequency, where, whenever a limit value is reached, the sum signal is reversed in polarity so that the output signal (u13) of the integrator represents a signal which is located between the two limit values and is fundamentally triangular, and where, via a frequency divider (17), the pulse train feeds a metering unit (19) for the energy consumption, characterised in that a pulse multiplier circuit (B) is provided which possesses a voltage comparator (22) which serves to compare the output signal (u13) of the integrator (13) with a plurality of threshold value voltages (un ) which are located between the limit values (G1, G2) and are equidistant (delta u) from one another in respect of the voltage level, and where the voltage comparator (22) supplies an output pulse (1, 2, ..., 32; up ) whenever the output signal (u13) of the integrator (13) reaches one of the threshold value voltages (u0, u1, u15).

Description

1 75060

Capacitor recharging method according to the electronic electric bill

The invention relates to an electronic electric calculator operating according to the capacitor recharging-5 method for reading energy consumption from at least one phase in an electrical network, in which a multiplier part is arranged on the input side. to a quantizer consisting of a coupled upper and lower limit determining portion to form a pulse train having a power proportional to power, the polarity of the sum signal being changed each time the limit is reached, so that the integrator output signal describes between the two limits substantially triangular signal, and wherein the pulse train supplies a calculator for energy consumption via a frequency divider.

Such an electric cargo is known from "Technisches Messen atm", 1978, number 11, pages 407-411, in the form of a three-phase current calculator, or from DE-OS 27 47 385, figure 1 and the accompanying text, in the form of a single-phase alternator. In this case, the product signal resulting from the multiplication of the signals proportional to the current and voltage is integrated in the quantizer and further processed so that a pulse train having a frequency proportional to the power is generated at the output of the quantizer. In this case, in principle, in addition to the capacitor recharging method, a charge compensation method is also available.

An essential advantage of the capacitor recharging method compared to the charge compensation method is that the offset voltages of the electronic operating elements 2 75060 connected in front are not affected by the dimensional accuracy. However, in this method, the maximum frequency of the pulse train must be lower than the mains frequency if error limits are to be maintained - as required by precision calculators. In the case of the charge-5 compensation method, there is no such limitation, so that this allows a higher output frequency of the pulse train.

The low maximum pulse frequency in connection with the capacitor recharging method has an unfavorable effect for control purposes within the power control circuits, because the information is about the instantaneous power at a time distance between two consecutive pulses in the pulse train and thus not available for two time pulses information on the power value.

The invention is based on the object of further developing an electric meter of the above-mentioned type so that in addition to the pulse sequence delivered from the quantum soy, a second pulse sequence with a similarly proportional to power, but considerably higher frequency, is available at the measurement output.

According to the invention, the task is solved by forming a pulse multiplication circuit in which a voltage comparator compares the output signal of the integrator with a plurality of threshold voltages between the threshold voltages. The number of additional pulses corresponds to the number of threshold voltages between the limit values. The voltage comparator can then consist of several individual comparators, in each case comparing a threshold voltage different from all other threshold voltages-35 at the output of the integrator.

II

3 75060 for the input signal. Additional pulses are generated both during the rise time of the output signal of the substantially triangular integrator and also during the fall time of this output signal. Alakkaisesti voltage levels of the same in DISTANCE-5 della threshold voltages are of substantially triangular shape of the integrator output signal extreme values suhten so arranged that the lowest threshold voltage will be located on the side between the two successive threshold voltage difference into the integrator ulosme-10 nosignaalin above a minimum and a maximum threshold voltage difference between two successive threshold voltage of half the below the maximum of this signal. Thus, it is guaranteed that with constant power consumption from the mains, all the output pulses 15 of the voltage comparator have an equal time interval.

A preferred embodiment of the invention consists in that the pulse multiplication circuit has a threshold voltage sensor connected to a reference comparator input of a voltage comparator, the second reference input 20 of which is connected to the output of the integrator. In this case, only a single reference part is needed for the voltage comparator. The threshold voltage sensor can be a step voltage generator triggered via the output signal of the voltage comparator.

In a preferred embodiment, the threshold voltage sensor is a switchable forward-backward counter, the countdown input of which is connected to the output of the voltage comparator and the binary outputs of which are connected to the reference input of the voltage comparator of the R / 2R network. This presents a very gesture-35 gant and a very cost-effective threshold-4 75060 value voltage sensor. Through the R / 2R network connected to the binary outputs of the forward-backward counter, an analog signal corresponding to the state of the counter is generated stepwise to the reference input of the voltage comparator, whose voltage level 5 at the pulse input at the forward-backward counter input is increased equally.

A preferred further development of the invention consists in resetting the forward-backward counter each time the integrator output signal reaches the lower limit value of the limit value part to zero, and in each case when the integrator output signal reaches the upper limit value of the limit value part. value is set to the highest calculation value. Thus, for each half-cycle of the substantially triangular output signal of the integrator 15, the threshold forms for threshold voltages are formed.

In order to output the signals to be set or set back to the forward-backward counter, the output of the limit value section 20 can be connected via the differentiation section to the return input and via the inverting section as well as via the reconnected differentiation section to the set-back input.

The invention will now be described in more detail, by way of example, with reference to FIGS. 1 and 2. The figures show: FIG. 1 an electronic electric meter with a pulse multiplication circuit according to the invention and a pulse diagram for explaining the operation of a pulse multiplication circuit.

The rectangular coupling part, drawn in broken lines and denoted by reference numeral A, shows an electric calculator operating according to the capacitor recharging method, as known from the above-mentioned "Technisches Messen atm", 1978, number 11, pages n 5 75060 407-411. This is a three-phase current calculator. The current and voltage values UR, IR, Ug, Ig, UT and IT, which characterize the electrical energy consumption in a three-phase current network, are converted in transformers 1-3 into proportional voltage signals 5 ulR, u2R, ulS, u2A, ulT and u2T. In each case, the signals belonging to one phase, i.e. for example the signals ulR and u2R belonging to the mains phase R, are processed in the multiplication parts 4-6 into power-proportional signals PD, Pc and P „. Multipliers 10 4-6 are preferably Time-Division multipliers. The signals P_., P_, Pm characterizing the absorbed electrical power still in the individual mains phases R, S and T are pulsating voltages, the time average of which is proportional to the electrical powers taken from the individual mains phases. In the summing section 7, the signals PR, Pg and PT are summed to the sum signal S.

In the case of a single-phase electric calculator, i.e. in the case of an alternating current calculator, only a transformer and a multiplier part are required, i.e. in the case of mains phase R 20, a transformer 1 and a multiplier part 4 are omitted, so that in this case the signal PR and the sum signal S coincide.

The sum signal S is applied to the input of the quantizer 8. On the input side, the quantizer 8 has a controllable na-25 density switching device 9 for the sum signal, a reconnected resistor 10 and an integrator 13 consisting of an amplifier 11 and an amplifier cross-bridging integration capacitor 12, and a reconnected limit part 14, whereby the limit part 14 the output 15 forms the output of the quantizer 30 8. The output 15 of the limit value section 14 is further connected to the control input 16 of the polarity reversing device 9.

The sum signal S is integrated in one position after the polarity reversing switch 9 is converted into a current in the integrator 13 until the output signal 35 of the integrator 13 reaches the upper limit value of the limit value section 14. At this time 6,75060, a signal change occurs at the output 15 of the limit value section 14, by means of which the polarity of the sum signal S at the output of the polarity change switch is changed at the control input of the polarity change switch 9. Thus, the current ig in-5 now flows at the input of the integrator 13 in the opposite direction, so that the output signal ul3 now decreases until the lower limit value G2 of the limit value section 14 is reached, after which a renewed signal exchange at the output 15 is obtained. 10 polarity to switch control input 16 again the original polarity. The signal ul3 at the output of the integrator 13 therefore has a substantially triangular shape and moves between the upper limit value G1 and the lower limit value G2. The output of the quantizer 8 thus generates a pulse train-15 no ul4 with a frequency proportional to the power. This pulse train ul4 is mixed in the frequency divider 17 to such an extent that the roller counter 19 can be moved via the stepper motor 18. The roller counter 19 indicates the electrical energy taken by the user from the three mains phases R, S and T. An application example of the pulse multiplication circuit according to the invention is shown in Fig. 1 by reference numeral B. The pulse multiplication circuit B has input terminals 20 and 21, the first showing the output signal ul3 of the integrator 13 and the second the output signal ul4 of the limit value 25 part 14. The pulse multiplication circuit B includes a voltage comparator 22, to the second input 23 of which a signal ul3 present at the input terminal is applied. The output 24 of the voltage comparator 22 is connected to the input 25 of the forward-backward counter 26. In the application example, the forward-backward counter 26 has four binary outputs Qn, Q1, Qn and Q1, the values of which are

012 3 u 1 Δ J

2,2,2 and 2. Thus, the forward-backward counter 26 can count up to 16 pulses and output in binary form its binary outputs Qq-Q ^ · 35. 28 to the second input 27 of the voltage comparator 22. The binary output Q2 is connected via a series connection of resistors 5 29 and 30 to the second input 27.

The binary output is connected via the series connection of resistors 31 and 32 to the connection point 33 of resistors 29 and 30. The binary output Qq is connected via the series connection of resistors 34 and 35 to the connection point 36 of resistors 31 and 32. At this time, resistors 28, 29, 31 and 34 an equal resistance value equal to twice the resistance value of resistors 30, 32 and 35, which likewise have equal resistance values. Resistors 28, 29, 31 and 34 may have, for example, a resistance of 200 kilo-Ohm, whereas resistors 30, 32 and 15 35 have a resistance of 100 kilo-Ohm. Through this R2 / R2 network, an analog voltage signal un is generated at the second input 27, the value of which is stepwise proportional to the contents of the forward-back-down counter 26. If the forward-backward calculator 26 passes through the numerical values 0-15 in chronological order, then the voltage becomes un-stepped.

The forward-backward counter 26 is controllable with respect to its downward direction through the input V / R in the sense that -if the signal ul4 at this control input V / R has an H level - the forward-backward counter 26 counts down the pulses present at its down-input 25 and that - if the signal ul4 has an L level - a downward or backward counting takes place. In addition, the forward-backward counter 26 has a setting input SZ. If a suitable pulse occurs at this setting input SZ, then the maximum counter state 15 is adjusted in the forward-backward counter 26, in connection with which all binary outputs Qq-Q1 have an H level.

In addition, the forward-backward counter 26 has a reset input R, through which the counter is forced to state 0 and thus the L-level to all 35 binary outputs Qq-Q1 in connection with the input of a suitable pulse. To remove the setting pulse 8 75060, the setting input SZ is connected via differentiation section 37 and inversion section 38. In order to obtain a reset signal, the reset input R of the forward-backward counter 26 is connected via the differentiation section 39 to the input terminal 21. Thus, both the downlink signal present in the control input V / R and the set or reset signal are derived from the signal ul4.

The output terminal of the pulse multiplication circuit B is provided with a reference mark 40 and connected to the output 24 of the voltage comp-10. This output signal up consists of individual pulses, with 32 such pulses occurring in each case between the two signals of the signal ul4. Thus, compared to the output signal ul4 of the quantizer 8, a thirty-two-fold increase in frequency has been achieved.

j The forward-reverse calculator 26 may be configured as a C-MOS switch circuit. In this case, the positive and negative supply voltage Uv and - Uv - as indicated by the broken lines in Fig. 1 - are passed through the terminals 41 and 42. If the substantially triangular signal 813 alternates symmetrically between the positive zero limit value G1 with respect to the voltage zero point and the equal negative lower limit value G2 with respect to the quantity, the required transfer of the R / 2R network voltage un to negative voltages can take place in a simple manner. thus, et-; the input 27 of the voltage comparator 22 is connected via a resistor 43 to a negative supply voltage - Uv | to the conductive terminal 42 and in addition to the connection point 44 of the resistors 34 and 35 through the second resistor 45 as well as to the terminal 42. This is shown in Fig. 1 by broken lines.

The voltage comparator 22 can be implemented with an input operational amplifier as well as a down-connected pulse generator connection, whereby the pulse generator connection each of the voltages ul3 and un voltage-35 operating comparator or the input side operational amplifier

II

The signal variation at the input of the 75060 men at the voltage comparator 22 in connection with the voltage equalization causes a suitable pulse to control the countdown input 25 of the forward-backward counter 26.

The pulse diagram shown in Fig. 2 illustrates the pulse multiplication circuit B. The signal ul4 in the output 15 of the limit value section 14 in the form of a pulse train consisting of rectangles, the frequency of which is proportional to the roll of three network stages R, S, T, is shown in Fig. 2. 2, line 1 depicts a substantially triangular signal ul3 at the output of the integrator 13. The signal ul3 moves between the limit values G1 and G2 presented by the limit value section 14, whereby the extreme values of the signal present at times t0, t1 and t2 naturally coincide in time with the signal exchange of the signal ul4. From the leading edge of the signal ul4, at time t0, the pulse il of the signal uR at the return input R of the forward-back-counter 26 is obtained via the differentiation section 39, through which the forward-20-counter 26 is set to 0. The value 0 of the forward-backward counter 26 corresponds to the R02R network the output value of the output signal un at the output of the voltage comparator 22 at the second input. The voltage value Uq is slightly below the output signal ui3 25 of the integrator 13 corresponding to the lower limit value G2. As soon as the rising signal ui3 reaches the voltage value u1, an output pulse 1 of the pulse train 1 described in line 2 of Fig. 2 is generated at the output 24 of the voltage comparator 22. This pulse 1 occurs at the output 40 of the pulse multiplexing circuit B and acts simultaneously on the forward-reverse 26 25 to the reconnection value 1. The above-mentioned voltage difference Au corresponds to the height of the voltage stages uR of the signals differing by this voltage difference Δη. Thus, at the binary output Qq sig-35 of the forward-backward counter 26, there is a change of signal from the L level to the H level, as a result of which the signal ur present at the input 27 of the voltage comparator 22 is raised by the value Δη over the voltage value u ^. . As the signal ul3 rises continuously, this finally also reaches the value u ^, after which an impulse 2 of the im-5 pulse train is generated, which raises the contents of the forward-backward counter 26 to 2. This effect is now repeated until finally the forward-backward counter 26 reaches its maximum content 15, after which the signal ur takes the voltage value As soon as the signal ul3 has reached this voltage value ul5, the nearest impulse generated at the output 24 of the voltage comparator 22 then sets the value 0 of the forward-back-counter 26. The signal u then falls back to the voltage value Uq. The value ul5 is slightly lower than the maximum of the triangular signal ul3 occurring at time t1. At this time t1, the pulse i2 of the signal sequence Ug at the setting input SZ of the forward-backward counter 26 is derived from the side of the signal ul4 described in Fig. 2 from the falling line 3 through the inverting portion 38 and the differentiation portion 37. As a result, the forward-back-20 counter 26 is set to its maximum value 15, which affects the voltage value ul5 of the start of the signal un at the input 27 of the voltage comparator 22 again. Since the voltage of the signal ul3 now decreases, when the signal ul3 reaches the voltage value ul5, the pulse of the pulse train up 25 denoted by reference numeral 17 occurs. Since the signal ul4 has dropped to the L level after reaching the upper limit value G1, the forward-backward counter 26 is now switched to "downward counting" via the downlink input V / R. Thus, the up pulse 17 of the pulse train up causes the contents of the forward-backward counter 26 to decrease to 14. This causes a corresponding decrease in the corresponding signal un. This now continues in steps until the forward-backward counter 26 again has a value of 0. As a result of the up pulse 32 of the imp pulse train up, it is "up" via the next 35 incoming pulses at the down input 25 of the forward-backward counter 26.

n 11 75060

From the rising side of the signal ul4, at time t2, the pulse i3 of the signal u_im at the input R of the forward-back-counter 26 is again produced again at the differentiation section 39, as a result of which the forward-back counter 26 is reset to 0, after which the signal ur drops again to the voltage level u ^. Thus, a new cycle of pulse multiplication circuit 2 can begin. Accordingly, due to the effect of the pulse multiplication circuit B, there are now two minimum intervals of the pulse sequence up pulses at the output 40 of the signal ul3 at the time span t2 - tO. This means thirty to two times the frequency proportional to the power pulse ul4 in this time span t2 - tO.

By using a forward-backward counter with a maximum or less maximum memory content, a corresponding increase or decrease in the number of pulses occurring at this time span at the output 40 of the pulse multiplication circuit can be achieved.

Claims (5)

An electronic electricity calculator operating according to the capacitor reloading process for determining the energy consumption from at least one phase of an electrical network, the phase being coordinated with a multiplication part, which is supplied on the input side with current and voltage proportional signals and the output proportional signals multiplication portions are added to a sum signal which is fed to one of an integrator and a post-coupled, upper and lower limit value determining limit value component quantizer to form a pulse queue of power proportional frequency, the sum signal reaching a limit of one limit each time, so that the output signal of the integrator forms a signal, which is essentially triangular in shape, which is located between the two limit values, and wherein a pulse queue via a frequency divider adopts an energy consumption counter, characterized in that an impulse multiplier switch 20 (B) which has a voltage comparator (22) for comparing the output signal (ul3) of the integrator (13) with several threshold values (un) between the limit values (G1, G2), which are mutually equal with respect to the voltage level (Au) , wherein the voltage comparator (22) in each case then delivers an output pulse (1, 2, ... 32; up) where the output signal (ul3) of the integrator (13) reaches some of the threshold voltages (u0, ui, ul5). 2. An electricity counter according to claim 1, characterized in that the pulse multiplier coupling 30 (b) has a threshold voltage transducer (26, 28-32, 34, 35) which is connected to one of the comparator inputs (27) in the voltage comparator (22). whose second comparison input (23) is connected to the output (ul3) of the integrator (13), whereby in each case the voltages (ul3, un) arising at the comparison inputs (23, 27)