FI45504B - - Google Patents
Info
- Publication number
- FI45504B FI45504B FI81267A FI81267A FI45504B FI 45504 B FI45504 B FI 45504B FI 81267 A FI81267 A FI 81267A FI 81267 A FI81267 A FI 81267A FI 45504 B FI45504 B FI 45504B
- Authority
- FI
- Finland
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/342—Extension of operand address space
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/04—Addressing variable-length words or parts of words
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
- G06F9/355—Indexed addressing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q3/00—Selecting arrangements
- H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
- H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
- H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
- H04Q3/54508—Configuration, initialisation
- H04Q3/54533—Configuration data, translation, passwords, databases
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Databases & Information Systems (AREA)
- Computer Networks & Wireless Communication (AREA)
- Complex Calculations (AREA)
- Package Closures (AREA)
- Containers And Plastic Fillers For Packaging (AREA)
- Communication Control (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SE397466A SE331921B (enrdf_load_stackoverflow) | 1966-03-25 | 1966-03-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| FI45504B true FI45504B (enrdf_load_stackoverflow) | 1972-02-29 |
| FI45504C FI45504C (fi) | 1972-06-12 |
Family
ID=20263253
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| FI81267A FI45504C (fi) | 1966-03-25 | 1967-03-17 | Laite tietokonekenttään sisäänkirjoittamista tai tietokonekentästä luk emista varten. |
Country Status (8)
| Country | Link |
|---|---|
| BE (1) | BE695956A (enrdf_load_stackoverflow) |
| DE (1) | DE1549549A1 (enrdf_load_stackoverflow) |
| FI (1) | FI45504C (enrdf_load_stackoverflow) |
| FR (1) | FR1515455A (enrdf_load_stackoverflow) |
| GB (1) | GB1177021A (enrdf_load_stackoverflow) |
| NL (1) | NL6704242A (enrdf_load_stackoverflow) |
| NO (1) | NO118945B (enrdf_load_stackoverflow) |
| SE (1) | SE331921B (enrdf_load_stackoverflow) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2472231B1 (fr) * | 1979-12-20 | 1986-02-21 | Cii Honeywell Bull | Dispositif d'adressage d'elements d'informations dans une table a plusieurs entrees, enregistree dans une memoire |
| SE424581B (sv) * | 1981-08-21 | 1982-07-26 | Ibm Svenska Ab | Metod och anordning for adressering av ett minne |
-
1966
- 1966-03-25 SE SE397466A patent/SE331921B/xx unknown
-
1967
- 1967-03-17 NO NO16733967A patent/NO118945B/no unknown
- 1967-03-17 FI FI81267A patent/FI45504C/fi active
- 1967-03-20 FR FR99532A patent/FR1515455A/fr not_active Expired
- 1967-03-20 DE DE19671549549 patent/DE1549549A1/de active Pending
- 1967-03-22 BE BE695956D patent/BE695956A/xx unknown
- 1967-03-22 NL NL6704242A patent/NL6704242A/xx unknown
- 1967-03-28 GB GB1417767A patent/GB1177021A/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| FI45504C (fi) | 1972-06-12 |
| GB1177021A (en) | 1970-01-07 |
| SE331921B (enrdf_load_stackoverflow) | 1971-01-18 |
| NL6704242A (enrdf_load_stackoverflow) | 1967-09-26 |
| BE695956A (enrdf_load_stackoverflow) | 1967-09-01 |
| FR1515455A (fr) | 1968-03-01 |
| NO118945B (enrdf_load_stackoverflow) | 1970-03-02 |
| DE1549549A1 (de) | 1971-02-18 |