FI12158U1 - Arrangement for measuring voltage drops in on-states in a semiconductor switch of a power converter apparatus and in an with it switched antiparallel diode, and an inverter - Google Patents

Description

Arrangement for Measuring Voltage Losses in Power Module Power Semiconductor Switch and Resistor-Connected Diode Wire Modes and Inverter

Field of the Invention

The invention relates to an arrangement for measuring voltage losses of power semiconductors of a power converter device, in particular a power semiconductor switch and a diode connected therewith, and an inverter.

BACKGROUND OF THE INVENTION Electrical power converting devices such as rectifiers, inverters, or frequency converters can be used to modify electrical energy when transferring electrical energy between two electrical systems, for example. For example, the voltage and / or frequency of the transmitted electrical energy can be changed by means of converters. For example, electrical energy can be transferred from an electricity generating system to an electricity consuming system, and at the same time transformed in the form of electrical energy produced. An example of a rectifier is a diode bridge and an example of an inverter is a rectifier bridge implemented by controllable power semiconductor switches. The inverter, in turn, typically consists of a rectifier and an inverter between which a DC or DC link is located.

The semiconductor component has at least one semiconductor connector. With the semiconductor component in the on-state, the current can only pass through the junction in a particular direction. In this case, the magnitude of the voltage drop in the semiconductor junction depends on the junction temperature. Thus, the voltage measurement of the conductor space of a semiconductor component can be used to estimate the temperature of its semiconductor junction. In addition, as the semiconductor component ages, the magnitude of the voltage drop in its conductor typically changes, allowing the semiconductor component's lifecycle to be estimated based on a voltage measurement. However, as the temperature of the semiconductor component changes and / or the semiconductor component ages, the change in magnitude of its line voltage drop is relatively small, which requires relatively high measurement accuracy.

Kim, Yong-Seok, and Seung-Ki Sul, "On-line Estimation of IGBT Junction Temperature Using On-State Voltage Drop", IEEE discloses a solution for IGBTm (Insulated Gate Bipolar Transistor) to measure the voltage drop in the conductor space. Especially for voltage applications over 600V, the solution is based on a two-diode switch that prevents the high voltage across the semiconductor component to be riveted from being coupled to the measurement instrumentation during the off-state. The problem with this arrangement is that the voltage loss of the measured conductor space is then the sum of the voltage losses of the two diodes of the circuit and of the semiconductor component to be measured. The magnitude of the voltage drop in the diode lead state may vary with the batch and diode unit, so that its effect on the measurement result may not be well known. This measurement uncertainty may make it difficult or even prevent accurate measurement of the voltage drop across the semiconductor component of the semiconductor component to be measured.

Brief Description of the Invention

It is an object of the invention to provide an apparatus so that the above problem can be solved or at least alleviated. The object of the invention is achieved by an arrangement characterized by what is stated in the independent claim. Preferred embodiments of the invention are the subject of dependent claims.

The invention is based on the arrangement comprising differential measuring means, at least one first diode, at least one second diode and a current generating means adapted to provide an electric current of substantially the same magnitude through both at least one first diode and said at least one second diode such that the voltage losses in the wires in the said diodes cancel out each other's effect on the output voltage of the differential measuring means.

An advantage of the arrangement according to the invention is that the effect of the voltage losses of the wiring states in the switching diodes on the measurement result is reduced.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be further described in connection with preferred embodiments, with reference to the accompanying drawings, in which:

Figure 1 shows a diagram of an arrangement according to one embodiment.

DETAILED DESCRIPTION OF THE INVENTION

The invention may be generally applied, for example, to various converter applications. The use of the invention is not limited to any particular type of system and, for example, to any particular voltage level or voltage frequency.

According to one embodiment, the arrangement for measuring the voltage drops of the power semiconductor switch of the power converter device and the diode connected to the diode connected therewith comprises a first measuring terminal and a second measuring terminal and differential measuring means comprising a first input, a second input and an output. Further, the arrangement comprises at least one first diode coupled between the first measurement terminal of the arrangement and the first input of the differential measurement means such that the cathode of said at least one first diode is toward the first measurement terminal and at least one second diode coupled to a second measurement terminal between the second input of the differential measuring means with the cathode of said at least one second diode facing the second measuring terminal. The arrangement further comprises current generating means comprising a first outlet and a second outlet arranged to provide an electric current of substantially equal magnitude from the first outlet and the second outlet. A first output of the current generating means is coupled to a switching point between said at least one second diode and a differential input of the differential measurement means, and a second output is coupled to a switching point between said at least one first diode and a first input of differential measuring means. The output voltage of the differential measuring means of the arrangement is offset by a positive offset voltage which is at least equal to the maximum nominal voltage drop of the diode to be measured.

Fig. 1 shows an example arrangement for measuring the voltage drop across the power states of a power semiconductor switch SW and a diode D3 connected therewith, according to one embodiment. The figure shows only the elements essential to an understanding of the invention. It should be noted that, for example, the number of different elements may vary and deviate from that shown in the figure. A measuring arrangement similar to the example of Figure 1 or having similar functionality may be implemented as a separate arrangement or may be at least partially or completely part of a device containing the semiconductor components to be measured, such as a power converter device.

The arrangement of the example comprises a first measuring terminal 11, a second measuring terminal 12, two first diodes Dii, DI2, two second diodes D2i, D22, differential measuring means 2 and current generating means 3. The differential measuring means 2 further comprises a first input 21, a second input 22 and an output 23.

The number of first diodes Dii, DI2 and second diodes D2i, D22 may vary from one to more and may depend, for example, on the voltage duration of the diodes used. In the arrangement, at least one first diode Dii, DI2 is connected between the first measuring terminal 11 of the arrangement and the first input 21 of the differential measuring means 2 with the cathode of the diode facing the first measuring terminal 11 and at least one second diode D2i, D22 22, so that at least one first diode Dii, DI2 and at least one second diode D2i, D22 prevent the high voltages from being connected from the measuring terminals 11, 12 to the differential measurement means 2 and / or the current supply means 3. According to one embodiment, the arrangement comprises: at least two first diodes Dii, DI2 connected in series between the first measuring terminal 11 of the arrangement and the first input 21 of the differential measuring means 2 so that the cathode of each first diode Dii, DI2 is k passing the first measuring terminal 11 and at least two second diodes D2i, D22 connected in series between the second measuring terminal 12 of the arrangement and the second input 22 of the differential measuring means 2 so that the cathode of each second diode D2i, D22 is towards the second measuring terminal 12. the number of first diodes Dii, DI2 is the same as the number of second diodes D2i, D22. The at least one first diode Dii, DI2 and at least one second diode D2i, D22 are preferably mutually matched with respect to line voltage loss, whereby the first input 21 and the second input 22 of the differential measuring means 2 add to each other substantially equal voltages resulting from at least one diode. It follows that the effect of the voltage drops of the conductor states of the at least one first diode Dii, DI2 and the at least one second diode D2i, D22 on the output 23 voltage of the differential measuring means 2 is reduced and the output voltage essentially depends only on the voltage between the first measuring terminal 11 and the second measuring terminal 12. According to one embodiment, said at least one first diode Dii, DI2 and said at least one second diode D2i, D22 are arranged such that their ambient temperatures are substantially the same. Thus, the voltage losses of the conductor states of the at least one first diode Dii, DI2 and the at least one second diode D2i, D22 are better matched.

In the example of Figure 1, the differential measurement means 2 comprises a summing operation amplifier 25 and a feedback from the output 23 of the differential measurement means to the negative input of the operational amplifier 25. Further according to this example, the differential measurement means 2 comprise substantially the same resistance R between the positive deviation voltage Vref and the positive input of the operational amplifier 25, between the positive input of the operational amplifier 25 and the first input 21 of the differential measuring means 2, between the inlet and the second inlet 22 of the differential measuring means 2. The positive deviation voltage Vref is coupled to a switching point between the first input 21 of the differential measuring means 2 and the positive input of the operational amplifier 25 via said resistance R. The voltage source 24 generating the positive deviation voltage Vref may be part of the arrangement or may be derived, for example, from the operating voltage of the arrangement. Preferably, the predetermined positive offset voltage Vref can be selected according to the maximum nominal line voltage drop of the diode D3 to be measured in each case. The same deviation voltage Vref can also be used for different diode types, provided that it is at least equal to the maximum nominal line voltage loss of each diode type to be measured. For some power diodes, for example, the voltage drop in the conductor space may be in the range of about 1 V to about 1.5 V, whereby the value of the offset voltage Vref used could be, for example, about 2 V.

The current output means 3 comprises a first output 31 and a second output 32 and the current output means 3 are adapted to provide substantially equal electrical currents Ix, I2 from their outputs 31, 32. The first output 31 is coupled to the second output 22 of the second diodes D2i, D22 and is connected to a switching point between the first input 21 of the first diodes Dii, DI2 and the differential measurement means2. Thus, in the measuring situation, the electric current flowing through the first diodes Dii, DI2 towards the first measuring terminal 11 is substantially the same as the electric current flowing through the second diodes D2i, D22 towards the second measuring terminal 12. In the example of Figure 1, a controllable power semiconductor switch SW is coupled between the measuring terminals 11 and 12, which may be, for example, IGBT (Insulated Gate Bipolar Transistor), SCR (Silicon Controlled Rectifier), GTO Thyristor (Gate Turn-Off) or FET (Field Effect Transistor) MOSFET (Metal Oxide Semiconductor Field Effect Transistor). A diode D3 is connected to the power semiconductor switch SW. Such a pair of power semiconductor switch SW and diode D3 (so-called zero diode) may be part of a switching branch 6 of a power inverter such as an inverter, which may consist of, for example, two such between the AC output terminals AC. The diode D3 coupled to the power semiconductor switch SW is also a semiconductor component whose temperature and, for example, aging can be estimated from the voltage drop of its conductor space. The voltage between the measuring terminals 21, 22 of the arrangement may vary on each side of the zero potential of the circuit depending on whether the power semiconductor switch SW or diode D3 is conducting. It follows that the differential measurement means 2 used to measure the voltage losses of the power semiconductor switch SW and the resistive switched diode D3 should be capable of measuring both positive and negative voltages. Due to the positive deviation voltage Vref, it is possible to keep the positive input potential of the differential amplifier means operation amplifier 25 at least continuously equal to the negative input potential of the operational amplifier 25, whereby the voltage 23 of the differential measuring means 2 This makes it possible to measure the voltage drop across the power states of the power semiconductor switch SW and the diode D3 connected therewith using the same circuit where the operating voltage of the operational amplifier 25 used can be single or double sided. The arrangement may further comprise an AD converter 5 coupled to the output 23 of the differential-interleaving means 2. Typically, when converting an analog voltage signal on either side of a zero potential to digital, a type of differential AD converter is used, typically requiring that each input of the AD converter positive to negative operating voltage. Generating and wiring the required double-sided operating voltage for the AD converter is one potential problem that may be related to measuring the voltage drop across the wiring states of the power semiconductor switch SW and the resistor connected diode D3 by the same connection. Alternatively, the arrangement may be coupled or adapted to be coupled to a separate AD converter. The voltage 23 at the output 23 of the differential converter means 2 coupled to the AD converter 5 is continuously positive with respect to the zero switching potential when the deviation positive deviation voltage Vref is at least equal to the maximum nominal line voltage loss of the resistive diode D3. Thus, the AD converter 5 does not necessarily need a negative operating voltage to convert the voltage signal. This allows not only a differential AD converter but also a non-differential AD converter which is connected to an input with only a positive operating voltage in addition to the switching zero potential, to convert the voltage signal of the output 23 of the differential measuring means 2 from analog to digital.

In the example of Figure 1, the current generating means 3 comprise a current mirror comprising two pnp transistors T1, T2 and resistors R1 and R2. To produce two electric currents of substantially equal magnitude and I2, respectively, of the first 31 and second outputs 32 of the current mirror, the transistors T1 and T2 are preferably matched and the resistances R1 and R2 are substantially equal. Similar to the example of Fig. 1, the corresponding vir-tape switching can also be implemented, for example, with npn-type transistors such as bipolar transistors or channel transistors (FETs). Generally, the current mirror can also be implemented with any other topology, such as a Wilson current mirror, with the added advantage that the two substantially equal currents and I2 are more closely matched.

When the power semiconductor switch SW to be measured in the example of Fig. 1 is in the lead state, at least the first two diodes Dii, DI2 are also in the lead state. The collector currents of the current mirror transistors T1 and T2 are then:

(1) where

Vcc is the supply voltage to the collectors of transistors T1, T2,

Vbe T2 is the base emitter voltage of transistor T2,

Ic τι θη collector current of transistor Tl,

IcT2 is the collector current of transistor T2,

Vce sat is the collector emitter voltage of the saturated space SW of the measurable power semiconductor switch and

Vf is D1 for each of the first diodes; Dl2 voltage drop.

Further, when the voltage drops of the first diodes Dii, DI2 are substantially the same, and when the bias current of the operational amplifier 25 of the differential measuring means 2 is substantially small, the voltage at the positive input of the operational amplifier 25 is:

(2) wherein Vref is the magnitude of said positive offset voltage with respect to the zero potential of the coupling.

In addition, when the voltage drops of the other diodes D2i, D22 are substantially the same, the following equation can be derived from Kirchoff's current:

(3) It follows that the voltage at the output 23 of the differential measuring means 2 is:

(4)

In equations 3 and 4, Vf is the voltage drop of each other diode D21 (D22).

Further, when the voltage losses of the first diodes Dii, DI2 and the second diodes D2i, D22 are substantially the same, equations 2 and 4 can be combined, whereby the voltage at the output of the differential measuring means 2 is:

(5)

Based on formula 5, the voltage losses in the wires in the first and second diodes cancel each other's effect on the output 23 voltage of the differential measuring means 2 and the voltage 23 of the differential measuring means 2 is the sum of the voltage loss and the (known)

In measuring the voltage drop across the diode D3 conductor, the collector emitter voltage Vce sat of the power semiconductor switch SW in formulas 1, 2 and 5 can be replaced by the voltage drop 1/03 of the resistive connected diode D3. Thus, the voltage losses of the wires of both the power semiconductor switch SW and the resistance diode D3 can be measured with the same circuit.

In the example of Figure 1, the AD converter 5 may comprise a plurality of inputs 51. It follows that an embodiment of the arrangement comprising a non-differential AD converter, further comprising a plurality of inputs

in addition to the zero potential of the circuit, only a positive operating voltage is connected to each of them, a further advantageous feature is that the solution shown reduces the amount of wiring required.

In the example of Figure 1, the arrangement may further comprise a control 7 which may be coupled to an AD converter output 52. The AD converter 5 or equivalent functionality may also be included in the control arrangement 7. The control arrangement 7 may perform a power semiconductor switch SW and a resistive diode D3. measuring the voltage drops of the conductor states by means of a measuring arrangement, and such a control arrangement may also be adapted to direct the measurable semiconductors SW, D3 to the conductor for measurement in the state.

The measurement of the voltage losses of the wires of the power semiconductor switch SW and of the resistive diode D3 can be carried out, for example, by continuous measurement, whereby the magnitude of the voltage signal 23 of the differential measuring means 2 . The control arrangement 7 can obtain the status of the components to be measured, for example, from the power converter device in which the components to be measured are located, and carry out measurement of voltage drops in the wiring states, for example using only the measurement data collected Alternatively, the control arrangement 7 may perform the measurement of voltage losses in the wiring states without information on the state of the component to be measured, whereby determining the voltage loss in the wiring state of the component to be measured may require analysis.

As an alternative to continuous measurement, the measurement of voltage losses in the wiring states of the power semiconductor switch SW and the resistive diode D3 can be implemented as a discrete measurement, for example, the component to be measured is in the lead state and no additional measurement data is generated when that component is in the block state. Alternatively, the control arrangement 7 may itself direct the component to be measured to the lead state simultaneously with or prior to the start of the measurement, and further terminate the measurement before or simultaneously when the respective component is directed to the inhibit state.

The control arrangement 7 may be implemented by one or more units. The term "unit" generally refers to a physical or logical entity such as a physical device or part thereof or a software routine. The control arrangement 7 may be implemented, at least in part, by means of a computer or similar signal processing equipment with suitable software. An example of a suitable signal processing equipment is a Programmable Logic Controller (PLC) or Field-Programmable Gate Array (FPGA). Such a computer or signal-processing apparatus may comprise at least a working memory (RAM) providing a storage area utilized by arithmetic operations and a processor (CPU) such as a general-purpose digital signal processing processor (DSP) performing arithmetic operations. The processor may comprise a plurality of registers, an arithmetic logic unit, and a processor control unit. The processor control unit is controlled by a series of program commands that are transferred to the processor from the working memory. The processor control unit may comprise micro instructions for basic operations. The implementation of micro commands may vary depending on the processor structure. Program instructions can be encoded in a programming language, which can be a high-level programming language such as C, Java, etc., or a low-level programming language such as machine language or assembler. The computer may also comprise an operating system that may provide system services to a computer program written by program instructions. The computer or other apparatus implementing the invention or a part thereof, such as a control arrangement 7 or the like, may comprise suitable input means for receiving control data or measurement data from the user and / or other devices and output means for printing alarms and notifications and / or control data. The apparatus may further comprise a suitable user interface through which, for example, the user may set the required parameters. It is also possible to use specific integrated circuits, such as ASIC (Application Specific Integrated Circuit), and / or discrete components or other devices to implement the functionality of the various embodiments according to the various embodiments.

The various embodiments described above can be implemented in existing systems, such as electric drives or components thereof, such as power converter devices, and / or utilize separate elements and devices centrally or decentrally. Existing devices for electrical drives, such as power converters, typically include a processor and memory that can be utilized to implement the functionality of the various embodiments. Thus, the changes and configurations required to implement the various embodiments may be accomplished, at least in part, by software routines, which in turn may be implemented as added or updated software routines. If the functionality of the various embodiments is implemented by software, such software may be provided as a computer program product comprising computer program code which is executed by the computer program code on the computer to perform the functionality of the invention according to the various embodiments described above. Such computer program code may be stored or generally included in a computer readable medium such as a suitable storage medium, for example flash memory or optical memory, from which it can be read to the unit or units executing the program code. In addition, such program code may be downloaded to the unit or units that execute the program code through a suitable data network and may replace or update any existing program code.

It will be obvious to a person skilled in the art that as technology advances, the basic idea of the invention can be implemented in many different ways. The invention and its embodiments are thus not limited to the examples described above, but may vary within the scope of the protection claims.

Claims (11)

protection Requirements 1. Arrangemang för mätning av spänningsförlusterna i ledningsutrym-mena i en effektomriktarapparats effekthalvledarkopplare och i en med den anti-parallel diodes, flash omfattar: en första mätningsnav (11) och en andra mätningsnav (11); differentialmätningsdon (2), som omfattar en första ingång (21), en andra ingång (22) och en utgång (23); åtminstone en första diode (Dii, DI2), som är kopplad mellan arrange mangets första mätningsnav (11) och differentialmätningsdonens (2) första ingång (21) på et sådant att attnd åtminstone en första diode (Dii, mot2) första mätningsnaven (11); åtminstone en andra diode (D2i, D22), som årplanet mitan arrangemangets andra mätningsnav (12) och differentialmätningsdonens andra ingång (22), kännetecknat av attnämnda åtminstone en andra diode (D2i, D22) and kopplad mellan matt och differentialmätningsdonens (2) andra ingång (22) på et sådant provision att dess cathodes mot den andra mätningsnaven (12), arrangemanget omfattar strömtillförselmedel (3), som omfattar en första utgång (31) och en andra utgång (32) and, in the case of the production of an image, a dense storm (32), a color (32), a color (31), a copy of a color (D2i, D2i, D2i, D2i) -nens (2) andra ingång (22) och den andra utgången (32) and copying dell (dii, di2) och differential mätningsdonens (2) först a ingång (21), och differentialmätdonens (2) utgångsspänning ändras mot motsandes pos posiva pos pos pos pos off off off off off off off är off off off off off off off off V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V D D D D D D D D D D D D D D D D D D D D D D D D D D D D D D (D3). An arrangement for measuring a voltage drop across a power semiconductor switch of a power converter device and a diode connected therewith, comprising: a first measuring terminal (11) and a second measuring terminal (12); differential measuring means (2) comprising a first inlet (21), a second inlet (22) and an outlet (23); at least one first diode (Dii, DI2) coupled between a first measurement terminal (11) of the arrangement and a first input (21) of the differential measuring means (2) such that the cathode of said at least one first diode (Dii, DI2) 11); at least one second diode (D2i, D22) connected between the second measuring terminal (12) of the arrangement and the second input (22) of the differential measuring means, characterized in that said at least one second diode (D2i, D22) is connected to a second measuring terminal between the second inlet (22) of the differential measuring means (2) with its cathode toward the second measuring pole (12), the arrangement comprises a current generating means (3) comprising a first outlet (31) and a second outlet (32). an electric current of a first output (31) and a second output (32), wherein the first output (31) is coupled to a switching point between said at least one second diode (D2i, D22) and a second input (22) of the differential measuring means (2); is connected to said at least one first diode (Dii, DI2) and differential measuring means (2 ) at the switching point between the first input (21) and the output voltage of the differential measuring means (2) is offset by a positive deviation voltage (Vref) which is at least equal to the maximum nominal line voltage loss of the diode (D3) being measured. 2. Arrangemang enligt skyddskrav 1, kännetecknat av att ström-tillförselmedlen (3) omfattar en strömspegel. Arrangement according to Claim 1, characterized in that the current supply means (3) comprise a current mirror. 3. Arrangemang enligt skyddskrav 1 eller 2, kännetecknat av att differentialmätningsdonen (2) omfattar en summerande operationsstärkare (25) och återkoppling från differentialmätningsdonens utgång (23) till operationsstär-karens (25) negativa ingång. Arrangement according to claim 1 or 2, characterized in that the differential measuring means (2) comprises a summing operation amplifier (25) and a feedback from the output (23) of the differential measuring means to the negative input of the operational amplifier (25). 4. Arrangemang enligt flashing som helst av paneldskraven 1-3, kännetecknat av att arrangemanget omfattar: åtminstone två första diode (Dii, DI2), som kopplade i serie mellan arrangemangets första mätningsnav (11) och differentialmätningsdonå (2) ) according to the attitudive första diode (Dii, DI2) cathodes, after the setting of the första mätningsnaven (11); och åtminstone två andra diode (D2i, D22), som økplplade i serie mellan arrangemangets andra mätningsnav (12) och differentialmätningsdonens (2) andra ingång (22) på et sådant att attiveive andra diode (D2i, D22) andra mätningsnaven (12). Arrangement according to any one of claims 1 to 3, characterized in that the arrangement comprises: at least two first diodes (Dii, DI2) connected in series between the first measuring terminal (11) of the arrangement and the first input (21) of the differential measuring means (2) that the cathode of each first diode (Dii, DI2) is toward the first measuring pole (11); and at least two second diodes (D2i, D22) connected in series between the second measuring terminal (12) of the arrangement and the second input (22) of the differential measuring means (2) with the cathode of each second diode (D2i, D22) facing the second measuring terminal (12). ). Arrangemang enligt flashing som helst av paneldskraven 1-4, turning the att antalet första diode (Dii, DI2) over the som antalet andra diode (D2i, D22). Arrangement according to any one of claims 1 to 4, characterized in that the number of first diodes (Dii, DI2) is the same as the number of second diodes (D2i, D22). 6. Arrangemang enligt flashing som helst av paneldskraven 1-5, kännetecknat av attnda åtminstone en första diode (Dii, DI2) och nämnda åtminstone en andra diode (D2i, D22), and in an anchornord i förhållande till span. Arrangement according to any one of claims 1 to 5, characterized in that said at least one first diode (Dii, DI2) and said at least one second diode (D2i, D22) are mutually matched with respect to the voltage drop in the conductor space. 7. Arrangemang enligt skyddskrav 6, kännetecknat av attnämnda åtminstone en första diode (Dii, DI2) och nämnda åtminstone en andra diode (D2i, D22) and placerade så att tempurerna i deras omgivningar and tiredligen. Arrangement according to Claim 6, characterized in that said at least one first diode (Dii, DI2) and said at least one second diode (D2i, D22) are arranged such that their ambient temperatures are substantially the same. 8. Arrangemang enligt whistles som helst av paneldskraven 1-7, kännetecknat av att arrangemanget omfattar åtminstone en effekthalvledarkopplare (SW) coplan mattningsnaven (11) och den andra mätningsnaven (12) och åtminstone en diod effekthalvledarkopplare (SW). Arrangement according to any one of claims 1 to 7, characterized in that the arrangement comprises at least one power semiconductor switch (SW) coupled between the first measuring terminal (11) and the second measuring terminal (12) and at least one diode (D3) in reverse connection with said power semiconductor switch (SW). . 9. Arrangemang enligt skyddskrav 8, kangnetecknat av att effekt-halledarkopplaren (SW) en IGBT (Insulated Gate Bipolar Transistor), SCR (Silicon Controlled Rectifier), GTO Thyristor (Gate Turn-Off) eller en FET (Field Effect Transistor) . Arrangement according to Claim 8, characterized in that the power semiconductor switch (SW) is an IGBT (Insulated Gate Bipolar Transistor), a SCR (Silicon Controlled Rectifier), a GTO Thyristor (Gate Turn-Off) or a FET (Field Effect Transistor). Arrangemang enligt flashing som helst av paneldskraven 1-9, kännetecknat av att arrangemanget omfattar en AD-omvandlare (5), stem ingång (51) and copplad till differentialmätningsdonens (2) utgång (23). An arrangement according to any one of claims 1 to 9, characterized in that the arrangement comprises an AD converter (5), the input (51) of which is connected to the output (23) of the differential measuring means (2). An inverter, characterized in that it comprises an arrangement according to any one of claims 1-10. Skyddskrav 11. Växelriktare, kännetecknad av att den omfattar et arrangemang enligt whistle som helst av skyddskraven 1-10.