FI106756B - Layout and arrangement for monitoring with a monitor - Google Patents

Description

1 106756

Monitoring method and monitoring system

Field of the Invention

The invention relates to a monitoring method in which a signal is monitored by a sliding window.

Background of the Invention

The so-called signal monitoring is used to aid in signal monitoring. a sliding window which can be implemented, for example, with programmable logic and custom software. If the signal is made up of bits, for example, the number of different bits in the signal can be monitored.

10 Monitoring can be used to monitor, for example, control and alarm signals.

Typically, at least one shift register and a programmable logic circuit are used to implement the prior art monitoring scheme. However, implementation of the arrangement has required a large number of signal paths between the register and the logic circuit. Establishing signal paths has required a large number of cells in the logic circuit. In practice, this has meant that a logic circuit having a relatively large number of cells had to be used to implement the monitoring scheme. However, logic circuits are more expensive the more cells they contain.

A prior art monitoring arrangement utilizes a shift register that has the same length as a sliding window. For example, if the window has been n-bits long, n-bit signal paths must have been formed for the logic circuit. The signal to be monitored along the generated signal paths is routed from the shift register to the logic circuit. Thus, increasing the size of the window used for monitoring has required more logic cells to establish signal paths, leaving fewer cells to perform the actual monitoring function. In addition, the prior art monitoring system has operated relatively slowly, making it unsuitable for high-speed systems.

•.

30 Brief Description of the Invention

It is thus an object of the invention to provide a method and apparatus implementing the method so that the above problems can be solved. This is accomplished by a method of the type described in the introduction, characterized by: alustι: initializing a sliding window to complete the same initialization bits, transmitting the monitored signal through a bit by bit sliding window, counting the number of predetermined bits in each sliding window, the number of bits when the bit to be moved to the sliding window and the bit from the sliding window output are different.

The invention also relates to a monitoring arrangement comprising a monitoring means for receiving a signal to be monitored which monitors a received signal with a sliding window.

The arrangement according to the invention is characterized in that the monitoring arrangement comprises an initialization means for initializing a sliding window full of the same 10 initialization bits, a calculating means for calculating the number of predetermined bits in the signal received by the monitoring means, a selector for changing the calculated bits the resulting bit is different.

Preferred embodiments of the invention are claimed in the dependent claims.

The invention is based on the initialization of the monitoring means with bits of different value than what is to be calculated later. In this case, it is possible to calculate the bits to be monitored which change the ratio of the number of 0 and 1 bits in the monitoring means.

Several advantages are achieved by the method and arrangement of the invention. The arrangement allows the number of signal paths for the signals to be kept small. In practice, this means that when an arrangement is implemented, for example, by a programmable logic circuit, the logic cells are relatively small in implementation. The arrangement of the invention also makes it easy to carry out monitoring with a large sliding window size. The arrangement is also suitable for use on systems operating at high speed. This means that the arrangement can monitor signals with a high bit rate.

BRIEF DESCRIPTION OF THE DRAWINGS The invention will now be described in greater detail in connection with preferred embodiments, with reference to the accompanying drawing, in which Figure 1 illustrates a monitoring arrangement according to the invention.

DETAILED DESCRIPTION OF THE INVENTION

Referring to FIG. body. If the monitoring arrangement receives bits, then according to the FIFO principle, the bits are transmitted from the monitoring means 10 in the reception order.

5 The monitoring sequence is implemented in practice using, for example, an ASIC, an EPLD or an FPGA.

Figure 1 shows that monitoring means 10 comprises four inputs: reset, mode selection, data and clock input. A reset signal is applied to the reset input, by means of which the monitoring means 10 can be reset. After receiving the reset signal 10, the monitoring means 10 is placed in a predetermined and predetermined state. A mode change signal is provided to the mode input, which is also used as the control signal of the selector 40. The mode select signal state is set to monitor means 10 and calculation means 50 to operate as desired. Since the monitoring means 10 is a kind of register-15 blade, the monitoring means has a predetermined length which at the same time determines the size of the sliding window. In practice, the length of the monitoring means is equal to the size of the sliding window.

Figure 1 further shows that the computing means 50 comprises four inputs: enable, count, reset, and clock input. The reset-20 input of the monitoring means 10 is coupled to the reset input 50 of the calculation means. Thus, the monitoring means 10 and the counting means 50 may be simultaneously reset by a reset signal to a predetermined initial state. Further, the figure shows that the clock input of the monitoring means 10 is coupled to the clock input of the calculation means 50. This means that the monitoring means and the computing means are clocked at the same clock signal.

The data input of the monitoring means 10 receives a data signal to be monitored. The monitoring means forms a sliding window on the received data signal, by means of which the bits of the data signal are monitored. The monitored data signal forms an output signal (data_out) of the monitoring means, which is converted into an input signal, for example, for other parts of the system. Multiple signal. tor torching does not usually change the content of the signal being monitored. In other words, the signal (datajn) to the monitoring means is exited from the monitoring means 10 after some time.

The output signal of the monitoring means is also coupled to selector 25, 35 which also provides a data signal to the data input of the monitoring means. The selector 25 generates an eneble signal or 4 106756 enable bits from the received signals, which is applied to the enable input of the computing means 10. When the enable signal is active, the calculator can either increase or decrease the value of its counter. Depending on the arrangement, the enable bit may be active in either 1-state or 0-state. In the arrangement shown in the figure, enable is active in 1 mode.

The signal to the data input of the monitoring means is applied via inverter 20 to the selector 40. The signal to the data input is also applied directly to the selector 40. The signal passed to the selector 40 and the signal directly to the selector are inverse signals of each other. In other words, when the direct data input to the selector 40 becomes 0-bit, then the inverter becomes a 1-bit to the selector. The mode selection signal to selector 40 selects either an uninverted or an inverted data signal to be forwarded to the computing medium 50.

The monitoring sequence works as follows. Initially, the enhancement means 45 performs the initialization according to the signals or bits to be computed. The enhancement means 45 initializes the sliding window with initialization bits before transmitting the signal to be monitored to the sliding window. As mentioned above, the monitoring means has a certain length which is practically the same as the size of the window being monitored. Assume that the length of the monitoring means and thus also the size of the window is, for example, 30 bits. The size of the window may be predetermined or may be dynamically resized.

If 0 bits are calculated from the signal being monitored, the contents of the monitoring means 10 are initialized to 1 bits. On the other hand, if 1 bit is calculated from the signal being monitored, the contents of the monitoring means 10 are initialized to 0 bits. If the window size is 30 bits, the initialization bits must also be 30. The contents of the monitoring means 10 are initialized by a mode selection signal before starting to compute the bits into either 0-bit or 1-bit.

Thus, for example, two different modes of operation can be used in the monitoring arrangement. In the first mode of operation, the monitoring means 10 is initialized to full 0-bits, whereby the calculation means 50 counts 1-bits in the sig-30 signal to be monitored. In another mode of operation, the monitoring means 10.1 is initialized to full 1-bits, whereby the calculation means 50 counts the 0-bits contained in the signal being monitored. Prior to monitoring, the monitoring system may be reset, for example, the counter value of the computing device is reset.

The computing means 50 keeps track of the predetermined bits 35 present in the signal being monitored. The calculation means is implemented in such a way that it can be reduced to the size of the window. This means that for 106756, if the window to be monitored has a size of 30 bits, the calculation area of the computing means is between 0 and 30. The computing means 50 cannot obtain values below zero or above the size of the window when calculating bits. The calculation direction of the calculator is directly selectable on the basis of incoming data.

Suppose the purpose is to compute the 0-bit paths in the signal. At this time, the mode selection signal initializes the contents of the monitoring means 10 to 1-bit. For example, if the sliding window has a size of 30 bits, the number of 1-bits in the window after formatting is 30. So the entire ik-10 since is full of 1-bits.

It is further assumed that the first data bit to be clocked into the monitoring means 10 is 1 bit, whereby the first bit to be clocked out from the monitoring means 10 is also 1-bit, since the monitoring means 10 was initially initialized to full 1-bits. The 1-bit clocked in the monitoring means 10 also goes to the calculation means 50 via the selector 40.

In the selector 25, an enable signal is formed in the selector 25, the value of which is allowed to be changed by the calculator 50 to the value of its counter. The selector 25 generates an enable signal from the received bits, which in practice is a 0-bit. However, the generated enable signal means in practice that the computing means 50 is not allowed to be in a state that is capable of changing the value of its counter based on the data bit from the selector 40. Thus, even after the first bit received by the monitoring means, which was 1-bit, the count value of the counting means 50 is zero. Monitoring: Even after receiving the first bit, the 25 medium contains 30 pieces of 1-bit. In other words, selector 25 does not generate an enable signal that would allow the calculator to change the value of its counter.

Let us then assume that the data bit to be clocked in the monitoring means 10 is 0 bits, whereupon one 1 bit is removed from the monitoring means 10. The 0-bit to be clocked in the monitoring means 10 also goes to the selector 40. The 0-bit to be clocked into the monitoring means 10 also goes to the inverter 20 which converts the bit into a 1-bit which is further transmitted to the selector 40. The selector 40 a bit which is applied to the calculation input of the computing means 50. Thus, in the above example, selector 40 selects an inverted signal throughout 35. 1 · β 106756

In the selector 25, an enable signal, now 1-bit, is generated in the selector 25, from the 0-bit clocked into the monitoring means and from the 1-bit clocked out of the monitoring means. The generated enable signal now means that the computing means 50 is allowed to be in a state that is capable of changing the value of its counter based on the bit from the selector 40. Based on the data bit received by the monitoring medium, which in this case was 0 bits, the calculating means 50 increments the value of its counter by one, whereby the counter value becomes one. After receiving the second bit, the monitoring means 10 comprises 29 pieces of 1-bit and one 0-bit. Thus, the selector 25 changes the number of calculated bit-10 paths in the computing medium 50 when the bit to be transferred to the sliding window and the bit obtained from the sliding window output are different.

As the 0-bit counting continues, there is a situation at some point that the next bit to be clocked on the monitoring means is in the 1-state and the bit exiting the monitoring means with the same clock signal is 0-to-15. In the above situation, the calculating means 50 decreases the value of its counter by one because the number of 0-bits inside the window decreased by one. The output of the calculator provides a signal which can be immediately seen with the counter value. For example, the output signal of the computing medium may have the lowest three bits of 1-bit, which means that by the end of the signal being monitored, seven search bits have been found.

The following is a table that explains the operation of the calculator.

Initializing incoming bit outgoing bit counter value 0_0_0_aliable 0_J_0_increment_0_0__1_reducible 0 __1__1_aliable J_0_0_aliable v 11 0 incremental incremental, incremental incremental, incremental incremental 1 incremental incremental The bits .. are the same when their values are the same. Further, it is seen that the counter value is increased when the input and output bits are different in value and the output bit is similar in value to the bits used in the initialization. It is further seen that the counter value is reduced when the bit entering and leaving the monitoring means is different in value and when the outgoing bit is different in value from the bits used in the initialization.

The output signal of the computing medium containing the counter value is applied to the logic section 60, which may observe, for example, that the current signal in the window has a sufficient number of predetermined bits. Since the logic part interprets the calculated bits from the counter value, the logic part can be implemented with a small number of combination logic components.

Although the invention has been described above with reference to the example of the accompanying drawings, it is clear that the invention is not limited thereto, but can be modified in many ways within the scope of the inventive idea set forth in the appended claims.

Claims (21)

A monitoring method for monitoring a signal with a sliding window, characterized by initializing the sliding window with the same initialization bits, transmitting the monitored signal through a bit by bit sliding window, counting the number of predetermined bits in the sliding window, changing to the number of bits, the bit to be moved and the bit from the sliding window output are different. Method according to claim 1, characterized in that the sliding window is initialized with initialization bits before the signal to be monitored is transferred to the sliding window. 3. Förfarande enligt patentkrav 1, k e n e t e c k n a t av att av biten, som överförs account det lopande fönstret, och av biten, som erhalls frän det 15 löpande fönstrets utgäng, image en enable-signal, som möjliggör ändring av de beräknade. A method according to claim 1, characterized in that an enable signal is generated from the bit to be transmitted to the sliding window and the bit obtained from the output of the sliding window 15, which makes it possible to change the number of calculated bits. 4. Förfarande enligt patentkrav 1, K n e t e c k n a t av att de beräknade bitamas antal ändras, nämbiten som överförs account det lopande fönstret och biten som avgär frän det Löpande fönstret har olika. 20 5. Förfarande enligt patentkrav 1, K n e t e c k n a t t h e p r a t e r b a n d b r a n d e r b a r e d e d e d e d e d e d e d e d e d e d e d e d e d e d e d e d e d e d e d e d e d i l l. Method according to claim 1, characterized in that the number of calculated bits is changed when the bit to be transferred to the sliding window and the bit leaving the sliding window are of different value. A method according to claim 1, characterized in that the number of calculated bits is kept unchanged when the bit to be transferred to the sliding window and the bit exiting the sliding window are the same. 6. Förfarande enligt patentkrav 1, kännetecknat av att frän v signalen som øvarken beräknas 0-bit, när det löpande fönstret initieras account 25 1-bit. 6. A method according to claim 1, characterized in that 0 bits are counted from the signal being monitored when the sliding window is initialized to 1 bits. 7. Förfarande enligt patentkrav 1, kännetecknat av att frän signalen som övervakas beräknas 1-bit, när det löpande fönstret initieras account 0-bit. Method according to claim 1, characterized in that 1-bit is calculated from the signal being monitored when the sliding window is initialized to 0-bit. 8. Förfarande enligt patentkrav 1, k n e t e c k n a t av att de be-. : 30 räknade bitarnas antal eagle, little antalet förutbestämda bitar i fönstret som belted eagle. A method according to claim 1, characterized in that the number of calculated bits is increased as the number of predetermined bits in the monitored window increases. 8 106756 • Claims 9. Förfarande enligt patentkrav 1, kännetecknat av att de beräknade bitarnas antal minskas, nant antalet förutbestämda bitar i fönstret som belted minskar. 35 10. Förfarande enligt patentkrav 1, kännetecknat av att initie- ·· ring utförs innan signalen som beltwerk överförs account förstret. 106756 A method according to claim 1, characterized in that the number of calculated bits is reduced when the number of predetermined bits in the monitored window decreases. A method according to claim 1, characterized in that the initialization is performed before the signal to be monitored is transferred to the window. 9 106756 The method according to claim 1, characterized in that the enable signal is generated from the received bits by means of the XOR function. A monitoring arrangement comprising a monitoring means (10) for receiving a signal to be monitored which monitors a received signal with a sliding window, characterized in that the monitoring arrangement comprises an initialization means (45) which initializes the sliding window with the same initialization bits, 10 computing means (50). calculates a predetermined number of bits in the signal received by the monitoring means (10), a selector (25) which changes the number of calculated bits when the bit to be transferred to the sliding window and the bit obtained from the sliding window output are different. A monitoring arrangement according to claim 12, characterized in that the selector (25) generates an enable signal from a bit to be transmitted to the sliding window and a bit from the sliding window output, which enables the calculating means (50) to change the number of bits it counts. Monitoring arrangement according to claim 12, characterized in that the initialization means (45) initializes the sliding window with initialization bits before the signal to be monitored is transmitted to the monitoring means (10). Monitoring arrangement according to claim 12, characterized in that the counting means (50) changes the number of bits it calculates when the bit to be transferred to the sliding window and the bit ν '25 ti leaving the sliding window are different in value. Monitoring arrangement according to Claim 12, characterized in that the counting means (50) maintains the number of bits it calculates when the bit to be transferred to the sliding window and the bit leaving the sliding window are the same. The monitoring arrangement according to claim 12, characterized in that the computing means (50) calculates via 0-bits in the signal being monitored when the initialization bits are 1-bit. Monitoring arrangement according to claim 12, characterized in that the computing means (50) counts 1-bits in the signal being monitored when the initialization bits are 0-bits. • · «10 106756 A monitoring arrangement according to claim 12, characterized in that the timing means (50) increases the number of bits it calculates as the number of predetermined bits in the window being monitored increases. A monitoring arrangement according to claim 12, characterized in that the counting means (50) reduces the number of bits it counts as the number of predetermined bits in the window being monitored decreases. Monitoring arrangement according to claim 12, characterized in that the selector (25) is an XOR circuit. • 106756 1. Övervakningsförfarande, i vilket en signal akaservakas med med ett ett med med ett ett ett ett ett ett ett ett ett ett ett ett ett ett ett ett ett ett ett ett,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, k 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 bit 5 bit bit bit bit bit bit bit bit bit bit bit bit bit bit bit bit bit bit 5 5 5 bit 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5, vid respektive tillfalle befinner sig i det Löpande fönstret, beräknas, bitamas antal ändras, niit biten som överförs account det Löpande fönstret och biten, som erhälls frän det Löpande fönstrets utgäng, är olika. 10 2. Förfarande enligt patentkrav 1, K n e t e c k n a t a n d e n t a d p a r t e d p a r e d e d e d e d e d e d e d e d e d e d e d e d e d e d e d i d i n g. 11. Förfarande enligt patentkrav 1, kännetecknat av att enable-signalen bildas av de mottagna bitarna med hjälp av en XOR function. 12. snapshots, snapshots (10), snapshot snapshots, snapshots snapshots, snapshots, snapshots, snapshots, snapshots, snapshots, snapshots, snapshots. fnstret fullt med likadana initieringsbitar, that beräkningsmedel (50), som beräknar antaiet förutbestämda bitar 10 som förekommer i den av ogervakningsmedlet (10) mottagna signalen, en out (25), som ändrar de beräknade bitarnas antal ö när börs fönstret och biten, som erhälls frän det Löpande fönstrets utgäng, är olika. 13. belt sealing system engraving patent code 12, sleeve-15 tecknatavatt extending (25) av biten, som överförs account det lopande fönstret, och av biten, som erhälls frän det lopande fönstrets utgäng, bildar en enable-signal, som Gör det möjligt föstrings 50) att ändra antaiet bitar som det beräknat. 14. belt rotation ringgang enangt patent krav 12, bend 20 t e c k n a t av att initieringsmedlet (45) initierar det löpande fönstret med initieringsbitar innan signalen som beltverkörverer account beltervakningsmedlet (10). 15. Øvärakningsarrangemang enligt patentkrav 12, kännetecknat av att beräkningsmedlet (50) ändrar antaiet bitar som det beräknat, när biten som överförs account det Löpande fönstret och biten, som erhälls frän 25 det Löpande fönstrets utgäng. 16. övervakningsarrangemang enligt patentkrav 12, kännetecknat av att beräkningsmedlet (50) häller antaiet bitar som det beräknat oförändrat, näm biten som överförs account det löpande fönstret och biten som avgär frän det Löpande fönstret är lika. 30 17. A vervingningsarrangemang enligt patentkrav 12, a turn-on-att berningnumbermedlet (50) beräknar de 0-bitar som förekommer i signalen som beltvärn, när initieringsbitarna är 1-bitar. 18. An envelope encoder 12, the encoder block att 50 (50) The encoder 35 bit signal is a bit encoder, an initiation bit and a 0 bit. 19. Övervakningsarrangemang enligt patentkrav 12, stump • · · 106756 t e c k n a t av att beräkningsmedlet (50) ekar antalet bitar som det beräknat, när antalet förutbestämda bitar i fönstret som belt. 20. belt buckling barrel patent 12, buckle tecknat av att beräkningsmedlet (50) minskar antalet bitar som det berlin, nant antalet förutbestämda bitar i fönstret som belt minskar. 21. An overhead window curl 12, an ankle tecknat av att field (25) and an XOR cret. '· • l