FI103745B1 - Signal processing method and device - Google Patents

Signal processing method and device

Info

Publication number
FI103745B1
FI103745B1 FI973919A FI973919A FI103745B1 FI 103745 B1 FI103745 B1 FI 103745B1 FI 973919 A FI973919 A FI 973919A FI 973919 A FI973919 A FI 973919A FI 103745 B1 FI103745 B1 FI 103745B1
Authority
FI
Finland
Prior art keywords
signal
sigma
delta modulator
pdm
noise ratio
Prior art date
Application number
FI973919A
Other languages
Finnish (fi)
Swedish (sv)
Other versions
FI103745B (en
FI973919A0 (en
FI973919A (en
Inventor
Lauri Lipasti
Arhippa Kovanen
Original Assignee
Atmel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Corp filed Critical Atmel Corp
Publication of FI973919A0 publication Critical patent/FI973919A0/en
Priority to FI973919A priority Critical patent/FI103745B1/en
Priority to KR1019997010300A priority patent/KR20010012348A/en
Priority to JP52178599A priority patent/JP2002510455A/en
Priority to CA002274637A priority patent/CA2274637A1/en
Priority to EP98942269A priority patent/EP1021876A4/en
Priority to CN98804731A priority patent/CN1112777C/en
Priority to US09/319,232 priority patent/US6600789B1/en
Priority to PCT/US1998/017743 priority patent/WO1999020004A1/en
Priority to MYPI98004505A priority patent/MY133001A/en
Priority to TW087120605A priority patent/TW408531B/en
Publication of FI973919A publication Critical patent/FI973919A/en
Priority to NO992777A priority patent/NO992777L/en
Application granted granted Critical
Publication of FI103745B publication Critical patent/FI103745B/en
Publication of FI103745B1 publication Critical patent/FI103745B1/en
Priority to HK00104859A priority patent/HK1025695A1/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M7/3024—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M7/3028—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
    • H03M7/3002—Conversion to or from differential modulation
    • H03M7/3004—Digital delta-sigma modulation
    • H03M7/3015—Structural details of digital delta-sigma modulators
    • H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
    • H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
    • H03M7/304—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

The invention relates to digital signal processing and specificly to level control of a pulse density modulated (PDM) signal generated by a sigma-delta modulator. A single-bit pulse density modulated PDM signal is generated by a first sigma-delta modulator (2) being an analog modulator, for instance. Level control is performed by multiplying the single-bit pulse density modulated PDM signal by a multibit multiplier (300) to obtain a multibit number stream, which is reconverted into a single-bit PDM signal by a second digital sigma-delta modulator (4). In accordance with the invention, the performance of the second sigma-delta modulator (4) is better than that of the first sigma-delta modulator (2), as to the signal-to-noise ratio. Thus, the most significant factor in the total signal-to-noise ratio (SNR) is the noise level of the first sigma-delta modulator (2), by which the PDM signal was originally generated. In the subsequent second sigma-delta modulator (4), the PDM signal can then be attenuated as much as is the difference between the SNR performances of the modulators without any decrease in the total signal-to-noise ratio. A relative amplification of the PDM signal is provided in this manner.
FI973919A 1997-10-09 1997-10-09 Signal processing method and device FI103745B1 (en)

Priority Applications (12)

Application Number Priority Date Filing Date Title
FI973919A FI103745B1 (en) 1997-10-09 1997-10-09 Signal processing method and device
US09/319,232 US6600789B1 (en) 1997-10-09 1998-08-26 Signal processing method and device
JP52178599A JP2002510455A (en) 1997-10-09 1998-08-26 Signal processing method and apparatus
CA002274637A CA2274637A1 (en) 1997-10-09 1998-08-26 Signal processing method and device
EP98942269A EP1021876A4 (en) 1997-10-09 1998-08-26 Signal processing method and device
CN98804731A CN1112777C (en) 1997-10-09 1998-08-26 Signal processing method and device
KR1019997010300A KR20010012348A (en) 1997-10-09 1998-08-26 Signal processing method and device
PCT/US1998/017743 WO1999020004A1 (en) 1997-10-09 1998-08-26 Signal processing method and device
MYPI98004505A MY133001A (en) 1997-10-09 1998-10-01 Signal processing method and device
TW087120605A TW408531B (en) 1997-10-09 1998-12-11 Signal processing method and device
NO992777A NO992777L (en) 1997-10-09 1999-06-08 Method and apparatus for signal processing
HK00104859A HK1025695A1 (en) 1997-10-09 2000-08-03 Signal processing method and device

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI973919A FI103745B1 (en) 1997-10-09 1997-10-09 Signal processing method and device
FI973919 1997-10-09

Publications (4)

Publication Number Publication Date
FI973919A0 FI973919A0 (en) 1997-10-09
FI973919A FI973919A (en) 1999-04-10
FI103745B FI103745B (en) 1999-08-31
FI103745B1 true FI103745B1 (en) 1999-08-31

Family

ID=8549695

Family Applications (1)

Application Number Title Priority Date Filing Date
FI973919A FI103745B1 (en) 1997-10-09 1997-10-09 Signal processing method and device

Country Status (11)

Country Link
EP (1) EP1021876A4 (en)
JP (1) JP2002510455A (en)
KR (1) KR20010012348A (en)
CN (1) CN1112777C (en)
CA (1) CA2274637A1 (en)
FI (1) FI103745B1 (en)
HK (1) HK1025695A1 (en)
MY (1) MY133001A (en)
NO (1) NO992777L (en)
TW (1) TW408531B (en)
WO (1) WO1999020004A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1195353C (en) * 2001-12-03 2005-03-30 方虎堂 Pulse area modulation digital power processing method and device
US6606044B2 (en) 2002-01-02 2003-08-12 Motorola, Inc. Method and apparatus for generating a pulse width modulated signal
KR101853818B1 (en) * 2011-07-29 2018-06-15 삼성전자주식회사 Method for processing audio signal and apparatus for processing audio signal thereof
EP2927805A1 (en) * 2014-03-31 2015-10-07 Nxp B.V. Control system
TWI559202B (en) * 2014-10-01 2016-11-21 義隆電子股份有限公司 Capacitive touch device and exciting signal generating circuit and method thereof
CN110310635B (en) * 2019-06-24 2022-03-22 Oppo广东移动通信有限公司 Voice processing circuit and electronic equipment
US11303295B1 (en) * 2020-11-15 2022-04-12 xMEMS Labs, Inc. SDM encoder and related signal processing system

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01204528A (en) * 1988-02-10 1989-08-17 Fujitsu Ltd A/d converter
JPH05505287A (en) * 1990-01-31 1993-08-05 アナログ・ディバイセス・インコーポレーテッド sigma delta modulator
US5245344A (en) * 1991-01-15 1993-09-14 Crystal Semiconductor High order switched-capacitor filter with dac input
US5625358A (en) * 1993-09-13 1997-04-29 Analog Devices, Inc. Digital phase-locked loop utilizing a high order sigma-delta modulator
US5442353A (en) * 1993-10-25 1995-08-15 Motorola, Inc. Bandpass sigma-delta analog-to-digital converter (ADC), method therefor, and receiver using same
US5748126A (en) * 1996-03-08 1998-05-05 S3 Incorporated Sigma-delta digital-to-analog conversion system and process through reconstruction and resampling
JPH09266447A (en) * 1996-03-28 1997-10-07 Sony Corp Word length conversion device and data processor

Also Published As

Publication number Publication date
CN1112777C (en) 2003-06-25
JP2002510455A (en) 2002-04-02
TW408531B (en) 2000-10-11
CN1256037A (en) 2000-06-07
KR20010012348A (en) 2001-02-15
HK1025695A1 (en) 2000-11-17
WO1999020004A1 (en) 1999-04-22
FI103745B (en) 1999-08-31
FI973919A0 (en) 1997-10-09
NO992777L (en) 1999-07-28
CA2274637A1 (en) 1999-04-22
MY133001A (en) 2007-10-31
NO992777D0 (en) 1999-06-08
FI973919A (en) 1999-04-10
EP1021876A4 (en) 2003-05-02
EP1021876A1 (en) 2000-07-26

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Legal Events

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GB Transfer or assigment of application

Owner name: ATMEL CORPORATION