CN1112777C - Signal processing method and device - Google Patents
Signal processing method and device Download PDFInfo
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- CN1112777C CN1112777C CN98804731A CN98804731A CN1112777C CN 1112777 C CN1112777 C CN 1112777C CN 98804731 A CN98804731 A CN 98804731A CN 98804731 A CN98804731 A CN 98804731A CN 1112777 C CN1112777 C CN 1112777C
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- signal
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3015—Structural details of digital delta-sigma modulators
- H03M7/302—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution
- H03M7/3024—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
- H03M7/3028—Structural details of digital delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3015—Structural details of digital delta-sigma modulators
- H03M7/3031—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path
- H03M7/3033—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs
- H03M7/304—Structural details of digital delta-sigma modulators characterised by the order of the loop filter, e.g. having a first order loop filter in the feedforward path the modulator having a higher order loop filter in the feedforward path, e.g. with distributed feedforward inputs with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage
Abstract
The invention relates to digital signal processing and specificly to level control of a pulse density modulated (PDM) signal generated by a sigma-delta modulator. A single-bit pulse density modulated PDM signal is generated by a first sigma-delta modulator (2) being an analog modulator, for instance. Level control is performed by multiplying the single-bit pulse density modulated PDM signal by a multibit multiplier (300) to obtain a multibit number stream, which is reconverted into a single-bit PDM signal by a second digital sigma-delta modulator (4). In accordance with the invention, the performance of the second sigma-delta modulator (4) is better than that of the first sigma-delta modulator (2), as to the signal-to-noise ratio. Thus, the most significant factor in the total signal-to-noise ratio (SNR) is the noise level of the first sigma-delta modulator (2), by which the PDM signal was originally generated. In the subsequent second sigma-delta modulator (4), the PDM signal can then be attenuated as much as is the difference between the SNR performances of the modulators without any decrease in the total signal-to-noise ratio. A relative amplification of the PDM signal is provided in this manner.
Description
Background of invention
The present invention relates to Digital Signal Processing, particularly, relate to the level of control by pulse density modulated (PDM) signal of sigma-delta modulator generation.
Background of invention
Can be by the analog frame, basic operation, multiplication and addition with known method execution signal processing perhaps become digital signal by utilization A/D converter with analog signal conversion, and carry out desired signal with digital form and handle computing.By utilization D/A converter, can convert the result to analog signal again.Under predetermined sampling frequency and predetermined resolution, carry out A/D and D/A conversion.
Recently, A/D and the D/A converter according to sigma-delta modulator becomes very general.In ∑-Δ A/D converter, two stages analog signal conversion takes place and become baseband digital signal.In the phase I, convert input signal to over-sampling one or more signals by ∑-Δ converter.In second stage,, the one or more signals of this over-sampling are selected base band by the utilization digital filtering.For example, ∑-Δ technology and converter described in following paper.
[1] " outline of ∑-Δ converter ", people such as P.M.Aziz, IEEE Signal ProcessingMagazine, in January, 1996, the 61st to 84 page.
[2] " over-sampling ∑-Δ data converter: principle, design and simulation ", people such as J.C.Candy, 1992, the 1 to 25 pages of IEEEPress NJ.
[3] " design methodology that is used for ∑-Δ modulation ", people such as B.P.Agrawal, IEEE Transactionson Communications, Vol.COM-31, March nineteen eighty-three, the 360th to 370 page.
The over-sampling output signal of sigma-delta modulator is pulse density modulated (PDM) expression of input signal.In ∑-Δ A/D converter, modulator becomes pulse density modulated (PDM) form to analog signal conversion.The PDM signal comprises over-sampling one or more (for example, 2 to 4) signal.The relative pulse density of PDM signal has determined that the amplitude of input signal represents.In frequency domain, the baseband portion of the frequency spectrum of DPM signal is useful signal band, and at the upper frequency place of frequency spectrum, has the quantizing noise by the noise processed function generation of sigma-delta modulator.So, can change for the resolution under the signal frequency of over-sampling speed.As everyone knows, the noise processed performance of sigma-delta modulator depends on the exponent number of modulator, and the higher-order modulation device can more effectively be removed quantizing noise from signal band.By increasing over-sampling rate, signal band can be narrowed down pro rata, and the noisiness that drops in the signal band diminishes.In addition, can for example, in transfer function under appropriate frequency, be controlled at the noisiness in the signal band in the sigma-delta modulator by the transfer function of modulator with the zero insertion modulator.
The method of utilization PDM signal implementation limited quantity signal processing computing has been described in academic article (literature) recently.So, the known advantage of acquisition Digital Signal Processing, such as, precision, repeatability, unwise sensitivity to disturbing, or the like.When with the direct processing signals of over-sampling PDM form,, need not under the Nyquist frequency, to convert it to the pulse code modulation (pcm) signal for signal processing.So, in signal processing point, can omit according to what the PDM signal generated base band PCM signal and select and insert filter.This is significant advantage, because the circuit size of the sigma-delta modulator of generation PDM signal is generally all very little, and also simple, and it is generally very big to select and insert filter, and the circuit structure complexity, it requires very big circuit area in the integrated circuit implementation process, and this causes fringe cost.For example, paper [4], " based on the design and the analysis of iir filter delta sigma ", people such as D.A.John, IEEE Transactins onCircuits and Systems-II: analog and digital signal is handled, Vol.40, No.4, has described the A/D converter with a plurality of inputs by the 233rd to 240 page, each input of filtering respectively, and before public decimation filter, always add.For example, can implement audio frequency mixting circuit plate by this method.
A kind of most important forms of signal processing is the control signal level: amplify and/or decay.This performance is for voice applications, and is such as above-mentioned audio frequency mixing plate, particularly useful.Therefore, if can also control the PDM signal level, it is preferable so.Fig. 1 of top paper [4] illustrates ∑-Δ attenuator, wherein 1 signal of over-sampling (PDM) be multiply by multidigit coefficient a1, and the gained multibit signal is used to export the digital sigma-delta modulator of 1 PDM signal.The multiplier of realizing 1 PDM signal as select according to the state of input PDM signal a1 or-a1 is as the 2-input multiplexer (selector) of output.Paper is also described the digital ∑-Δ filter that is suitable for this purpose.When described multidigit coefficient was lower than 1, attenuator was attainable.When the value of feedback of sigma-delta modulator is b and described coefficient is a, obtain attenuation rate a/b.
It is feasible that the problem that this known method exists has only decay PDM signal, and needs to carry out and all multiplication that are lower than 1 coefficient.Do not think that or not is feasible amplifying the PDM signal, because because the structure of sigma-delta modulator causes the input value of modulator not exceed even near the value of feedback of modulator.Sigma-delta modulator is a rock-steady structure with good conditionsi, in case input exceeds predetermined value, the output signal of synthesizer is escaped.In the simulation sigma-delta modulator, it is normal allowing input value, and exponent number and structure that this depends on modulator generally are 0.3 to 0.7 times of value of feedback, referring to paper [3].The amplification of the PDM signal in sort circuit needs entering signal and the number that is higher than value of feedback to multiply each other.Even the incoming level of A/D modulator is very low, and by being made as, input signal values (a) is higher than value of feedback (b) on the principle, can be with its a large amount of amplification, and gained PDM signal also can have only+and 1 and-1 value (situation).By multiplication, the very high value of the temporary transient acquisition of modulator.The density of PDM signal and energy are on average very low, but instant value will make modulator very unstable.
Concise and to the point description of the present invention
The objective of the invention is to signal processing method and device, it can amplify the PDM signal relatively, and does not significantly increase noise level.
Realize purpose of the present invention by signal processing method, wherein said method comprises the following steps: to produce N digit pulse density modulation signal by first sigma-delta modulator, wherein N=1,2, The level of controlling described pulse density modulated signal is a) by multiplying each other described N digit pulse density modulation signal and multidigit multiplier, its output is M position signal, M＞N wherein is b) by becoming N digit pulse density modulation signal by digital sigma-delta modulator with described M position conversion of signals.Described method is characterised in that, described M position conversion of signals is become the described N digit pulse density modulation signal of being modulated by described digital sigma-delta modulator, and wherein said modulator has the signal-to-noise performance that is better than described first sigma-delta modulator.
Another purpose of the present invention is a kind of signal processing system, comprising: first sigma-delta modulator, produce N digit pulse density modulation signal, wherein N=1,2, Be used to control the device of the level of described pulse density modulated signal, described device comprises a) multidigit multiplier (300), its input is that described N digit pulse density modulation signal and described output are M position signals, M＞N wherein b) becomes described M position conversion of signals the digital sigma-delta modulator of described N digit pulse density modulation signal.Described device is characterised in that described digital sigma-delta modulator has the signal-to-noise performance that is better than described first sigma-delta modulator.
For example, produce a digit pulse density modulation PDM signal by first sigma-delta modulator as analog modulator.By with a PDM signal and multidigit multiplication, carry out level control, thereby obtain long number stream.Again convert digital stream to a PDM signal by second sigma-delta modulator (preferably digital modulator).
According to basic principle of the present invention, the signal-to-noise performance of described second sigma-delta modulator is better than the performance of described first sigma-delta modulator, wherein heavily converts long number stream to the PDM signal by described second sigma-delta modulator.Therefore, the most important factor of whole signal to noise ratio (snr) is the noise level of first sigma-delta modulator, wherein produces the PDM signal at first by first sigma-delta modulator.In above-mentioned second sigma-delta modulator afterwards, the PDM signal of can in scope, decaying, wherein said scope equals SNR performance poor of modulator, and does not reduce whole signal to noise ratio.For example, if the SNR of first sigma-delta modulator is 90dB under maximum excitation, and the SNR of second sigma-delta modulator is 110dB, so can be in second modulator with the about 20dB of PDM signal attenuation, and do not reduce signal to noise ratio.Because in latter's modulator, except signal, the noise of first modulator on the signal band of generally also decaying also reaches the noise bottom of being set by second modulator structure, so this is feasible.
So calibration PDM signal is low level extremely slightly, and does not reduce performance.Though second sigma-delta modulator is deamplification also, decay can (in above-mentioned example, 20dB), thereby obtain to amplify relatively less than described poor performance.When decay PDM signal during, obtain and the identical whole signal to noise ratio that decays by the front analog modulator less than the difference of the SNR performance of two modulators.Under the situation of this example, the nominal level (nominal level) of signal can be fixed on first modulator and provide the point that not deamplification and the second modulator deamplification reach 20dB.The decay of second rank can be C.Under the situation of this example, whole signal to noise ratio will be 90dB, and signal is that c is between 20dB and 110dB between+20-0dB and 90+20-(c), and the decay of system 0 and 90dB between.
Description of drawings
With reference to accompanying drawing, by preferred embodiment, describe the present invention in detail, wherein:
Fig. 1 illustrates the block diagram that is connected analog sigma-Δ A/D modulator PDM level controller afterwards according to of the present invention;
Fig. 2 illustrates the noise of simulation sigma-delta modulator and digital sigma-delta modulator and signal level and the diagrammatic sketch of the controlled area arranged as frequency function;
Fig. 3 is the block diagram that multichannel PDM level controller is shown.
Detailed description of the present invention
With reference to Fig. 1, simulation sigma-delta modulator 2 is carried out and will be converted the A/D conversion of 1 digit pulse density modulation (PDM) form at the analog input signal at input 1 place to.For example, modulator 2 can be any ∑-Δ A/D modulator structure of describing in paper [1].Let us hypothesis modulator 2 is 3 rank sigma-delta modulators, and it has the signal to noise ratio of about 100dB.Can acquisition value+1 and a PDM signal of-1 impose on PDM level controller 3.
Preferred embodiment PDM level controller 3 according to the present invention comprises digital modulator 4 and at preceding multiplier 300.Obtain long number stream by in multiplier 300, digit pulse density modulation (PDM) signal and multidigit coefficient a being multiplied each other, carry out level control, wherein utilize digital sigma-delta modulator 4 heavily to convert digital stream to a PDM signal.
Under the situation of a PDM signal, realize multiplier 300 by simple multiplexer or selector, it produce output+a or-a, this depends on input value and is+1 or-1.So the output of multiplier 300 is long number stream, it comprise numeral+a and-a.Multiplier 300 can have and the similar structure that is disclosed in paper [4].Multiplier can have a fixing coefficient or coefficient value can be adjustable.In preferred embodiment of the present invention as shown in Figure 1, select signal SELECT can select several coefficient a1 ... therefore one of an, can set required decay or amplification.For example, coefficient can be according to table 1.32 values of this expression coefficient a provide+12dB ... the grade control range of-34.5dB (is grade with 1.5dB).
| Coefficient a | Amplify (dB) |
| 872 | +12.0 |
| 734 | 10.5 |
| 617 | 9.0 |
| 519 | 7.5 |
| 437 | 6.0 |
| 368 | 4.5 |
| 309 | 3.0 |
| 260 | 1.5 |
| 219 | 0 |
| 184 | -1.5 |
| 155 | -3.0 |
| 130 | -4.5 |
| 110 | -6.0 |
| 92 | -7.5 |
| 78 | -9.0 |
| 65 | -10.5 |
| 55 | -12.0 |
| 46 | -13.5 |
| 39 | -15.0 |
| 33 | -16.5 |
| 28 | -18.0 |
| 23 | -19.5 |
| 20 | -21.0 |
| 16 | -22.5 |
| 14 | -24.0 |
| 12 | -25.5 |
| 10 | -27.0 |
| 8 | -28.5 |
| 7 | -30.0 |
| 6 | -31.5 |
| 5 | -33.0 |
| 4 | -34.5 |
At the system level place, that is,, can provide amplification in input 1 and export between 5, yet, about the noise processed performance, be higher than the performance of modulator 2 when the performance of digital sigma-delta modulator.For example, because more high-order, multilevel quantization and feedback or higher over-sampling ratio or these some combinations, the noise processed performance of modulator 4 can be higher.In the embodiment in figure 1, modulator 4 is fourth-order modulator of Figure, and modulator 2 is three rank modulators.When on PDM Signal Processing path, more higher order modulator (or the modulator with better noise processed performance) is after low-order-modulated device more, and more the noise level of low level modulation device is that tool is conclusive for the whole signal to noise ratio (snr) of system.Under the situation of Fig. 1,, mainly determine signal to noise ratio at output 5 places according to the signal to noise ratio of modulator 2.The performance of modulator 4 should be required amplification at least, and preferably also has good for the signal to noise ratio of modulator 2 and the adequate stability boundary (stability margin) of the PDM signal that enters.Because the signal to noise ratio of the modulator 4 of level controller 3 is better than the PDM signal that enters greatly, so level controller can be lower than the level of whole PDM signal, must actually not reduce signal to noise ratio.Because except the noise of Payload signal, the PDM signal of also decaying is so this is feasible.So, signal calibration is low level slightly, and does not reduce performance.Though also decay PDM signal in modulator 4, can be in level controller 3 deamplification make it poor less than in the performance of modulator 2 and 4, and can obtain relative amplification.
According to the present invention, with reference to Fig. 3, let us is checked the operation of level controller by way of example.Hypothetical simulation modulator 2 is three rank modulators, and its signal to noise ratio approximately is 100dB.Modulator 4 is quadravalence digital modulators, and the about 120dB of its signal to noise ratio promptly, is better than the about 20dB of signal to noise ratio of modulator 2.Required control range is+12dB ...-34.5dB (with the 1.5dB grade).In order to guarantee the stability of modulator 4, ratio a/r1 is 0.5, that is, and and-6dB.Can calculate reference point r1 (34.5dB) and required precision (＜0.3dB) function as maximum attenuation.Therefore, suppose that reference point is 1744.Now, corresponding by Incoming PDM signal and 872 is multiplied each other with amplification+12dB, and by PDM signal and 4 is multiplied each other, corresponding with maximum attenuation.In above table 1, when reference point r1 is constant 1744, list all differences of coefficient a, and this is corresponding with amplification.When modulator 2 and 4 poor performance are 20dB, and boundary of stability is made as 6dB, the amplification range of Bu Zhiing is approximately 14dB so.
In this example, after modulator 2 signal to noise ratio in scope+12 ... roughly keep identical in the-1.5dB.At the higher attenuation place, the signal noise of importing is just decayed to noise bottom (floor) 22 that is lower than modulator 4, the signal to noise ratios that Payload signal 25 and the noise bottom 22 of decaying is simultaneously determined at output 5 places.
In conjunction with the present invention of 1 PDM signal description.Yet the present invention can be directly used in multidigit, for example, and 2 to 4, and the PDM signal.
Preferred embodiment of the present invention as shown in Figure 1 illustrates analog modulator 2, multiplier 300 and the digital modulator 4 that is linked in sequence.In fact, these unit can be spaced from each other these unit in signal processing system, can there be the mode of other signal processing stage between them.The example of sort signal treatment system as shown in Figure 3.
Fig. 3 illustrates three analog input signals 31,32 and 33, and they are imposed on each analog sigma- A modulator 34,35 and 36. Modulator 34,35 and 36 produces PDM signal 37,38 and 39 respectively, wherein respectively they is imposed on multiplier 40,41 and 42.Multiplier 40,41 and 42 produces long number stream respectively, in adder they always is added to long number and flows 47.Convert signal 47 to PDM signal 49 by digital sigma-delta modulator.Modulator 34 to 36 can have with Fig. 1 in the similar structure of modulator 2.The structure of multiplier 40 to 42 can with the structure similar of multiplier 300 among Fig. 1.Modulator 48 can have with Fig. 1 in the similar structure of multiplier 4.The application of the signal processing apparatus of type is an audio frequency mixing plate as shown in Figure 3.
The present invention is used in the level control of the PDM signal in all ∑s-Δ structure.The typical purpose of using is except voice applications, to also have IIR and FIR filter construction.
For the personnel that are familiar with this technical field, along with technological progress, it is conspicuous that basic principle of the present invention can be used in the multiple different application.Therefore, the present invention and its embodiment are not limited in the above-mentioned example, but in the scope of claims.
Claims (10)
1. a signal processing method comprises the following steps:
Produce N digit pulse density modulation signal by first sigma-delta modulator, wherein N=1,2,
Control the level of described pulse density modulated signal
A) by described N digit pulse density modulation signal and multidigit multiplier are multiplied each other, its output is M position signal, M＞N wherein,
B) by described M position conversion of signals being become N digit pulse density modulation signal, it is characterized in that by digital sigma-delta modulator,
Described M position conversion of signals is become the described N digit pulse density modulation signal of being modulated by described digital sigma-delta modulator, and wherein said digital sigma-delta modulator has the signal-to-noise performance that is better than described first sigma-delta modulator.
2. the method for claim 1 is characterized in that, described level controlled step also comprises the following steps:
By with described N digit pulse density modulation signal with and less than the corresponding multiplication of decay of the difference of performance, the relative amplification of described pulse density modulated signal is provided.
3. method as claimed in claim 1 or 2 is characterized in that, adopts digital sigma-delta modulator, and according to one or several following factors, its noise processed performance is better than described first modulator: more high-order, multilevel quantization, multidigit feedback, higher over-sampling ratio.
4. signal processing system comprises:
First sigma-delta modulator (2) produces N digit pulse density modulation signal, wherein N=1,2,
Be used to control the device (3) of described pulse density modulated signal level, described device (3) comprises
A) multidigit multiplier (300), its input are that described N digit pulse density modulation signal and described output are M position signals, M＞N wherein,
B) described M position conversion of signals is become the digital sigma-delta modulator (4) of described N digit pulse density modulation signal, it is characterized in that,
Described digital sigma-delta modulator (4) has the signal-to-noise performance that is better than described first sigma-delta modulator (2).
5. system as claimed in claim 4 is characterized in that, when the decling phase of the coefficient of described multidigit multiplier (300) and the difference that is lower than performance at once, described level controller (3) has relative amplification.
6. as claim 4 or 5 described systems, it is characterized in that, according to one or more following factors, the described noise processed performance of described digital sigma-delta modulator (4) is better than the performance of described first modulator (2): more high-order, multilevel quantization, multidigit feedback, higher over-sampling ratio.
7. system as claimed in claim 4 is characterized in that, described first modulator (2) is the simulation sigma-delta modulator.
8. system as claimed in claim 4 is characterized in that, described system is the digital filter of pulse density modulated signal, such as IIR or FIR filter.
9. system as claimed in claim 4 is characterized in that described system is an audio system.
10. system as claimed in claim 4 is characterized in that, the coefficient value of described multiplier (300) is progressively adjustable.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FI973919 | 1997-10-09 | ||
| FI973919A FI103745B1 (en) | 1997-10-09 | 1997-10-09 | Signal processing method and device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1256037A CN1256037A (en) | 2000-06-07 |
| CN1112777C true CN1112777C (en) | 2003-06-25 |
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| CN98804731A Expired - Fee Related CN1112777C (en) | 1997-10-09 | 1998-08-26 | Signal processing method and device |
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| EP (1) | EP1021876A4 (en) |
| JP (1) | JP2002510455A (en) |
| KR (1) | KR20010012348A (en) |
| CN (1) | CN1112777C (en) |
| CA (1) | CA2274637A1 (en) |
| FI (1) | FI103745B1 (en) |
| HK (1) | HK1025695A1 (en) |
| MY (1) | MY133001A (en) |
| NO (1) | NO992777L (en) |
| TW (1) | TW408531B (en) |
| WO (1) | WO1999020004A1 (en) |
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| CN1195353C (en) * | 2001-12-03 | 2005-03-30 | 方虎堂 | Pulse area modulation digital power processing method and device |
| US6606044B2 (en) * | 2002-01-02 | 2003-08-12 | Motorola, Inc. | Method and apparatus for generating a pulse width modulated signal |
| KR101853818B1 (en) * | 2011-07-29 | 2018-06-15 | 삼성전자주식회사 | Method for processing audio signal and apparatus for processing audio signal thereof |
| EP2927805A1 (en) * | 2014-03-31 | 2015-10-07 | Nxp B.V. | Control system |
| TWI559202B (en) * | 2014-10-01 | 2016-11-21 | 義隆電子股份有限公司 | Capacitive touch device and exciting signal generating circuit and method thereof |
| CN110310635B (en) * | 2019-06-24 | 2022-03-22 | Oppo广东移动通信有限公司 | Voice processing circuit and electronic equipment |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01204528A (en) * | 1988-02-10 | 1989-08-17 | Fujitsu Ltd | A/d converter |
| WO1991011863A1 (en) * | 1990-01-31 | 1991-08-08 | Analog Devices, Inc. | Sigma delta modulator |
| US5245344A (en) * | 1991-01-15 | 1993-09-14 | Crystal Semiconductor | High order switched-capacitor filter with dac input |
| US5625358A (en) * | 1993-09-13 | 1997-04-29 | Analog Devices, Inc. | Digital phase-locked loop utilizing a high order sigma-delta modulator |
| US5442353A (en) * | 1993-10-25 | 1995-08-15 | Motorola, Inc. | Bandpass sigma-delta analog-to-digital converter (ADC), method therefor, and receiver using same |
| US5748126A (en) * | 1996-03-08 | 1998-05-05 | S3 Incorporated | Sigma-delta digital-to-analog conversion system and process through reconstruction and resampling |
| JPH09266447A (en) * | 1996-03-28 | 1997-10-07 | Sony Corp | Word length conversion device and data processor |
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1997
- 1997-10-09 FI FI973919A patent/FI103745B1/en active
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- 1998-08-26 JP JP52178599A patent/JP2002510455A/en not_active Ceased
- 1998-08-26 EP EP98942269A patent/EP1021876A4/en not_active Ceased
- 1998-08-26 CN CN98804731A patent/CN1112777C/en not_active Expired - Fee Related
- 1998-08-26 CA CA002274637A patent/CA2274637A1/en not_active Abandoned
- 1998-08-26 WO PCT/US1998/017743 patent/WO1999020004A1/en active IP Right Grant
- 1998-10-01 MY MYPI98004505A patent/MY133001A/en unknown
- 1998-12-11 TW TW087120605A patent/TW408531B/en not_active IP Right Cessation
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Also Published As
| Publication number | Publication date |
|---|---|
| FI103745B (en) | 1999-08-31 |
| EP1021876A4 (en) | 2003-05-02 |
| WO1999020004A1 (en) | 1999-04-22 |
| TW408531B (en) | 2000-10-11 |
| JP2002510455A (en) | 2002-04-02 |
| FI973919A (en) | 1999-04-10 |
| NO992777L (en) | 1999-07-28 |
| FI973919A0 (en) | 1997-10-09 |
| MY133001A (en) | 2007-10-31 |
| FI103745B1 (en) | 1999-08-31 |
| EP1021876A1 (en) | 2000-07-26 |
| KR20010012348A (en) | 2001-02-15 |
| CN1256037A (en) | 2000-06-07 |
| CA2274637A1 (en) | 1999-04-22 |
| NO992777D0 (en) | 1999-06-08 |
| HK1025695A1 (en) | 2000-11-17 |
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