ES505798A0 - Procedimiento y circuito para la recepcion de series de bi- tios emitidos por una pluralidad de conductores paralelos dediferente longitud - Google Patents

Procedimiento y circuito para la recepcion de series de bi- tios emitidos por una pluralidad de conductores paralelos dediferente longitud

Info

Publication number
ES505798A0
ES505798A0 ES505798A ES505798A ES505798A0 ES 505798 A0 ES505798 A0 ES 505798A0 ES 505798 A ES505798 A ES 505798A ES 505798 A ES505798 A ES 505798A ES 505798 A0 ES505798 A0 ES 505798A0
Authority
ES
Spain
Prior art keywords
reception
procedure
series
circuit
different length
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
ES505798A
Other languages
English (en)
Other versions
ES8206940A1 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of ES505798A0 publication Critical patent/ES505798A0/es
Publication of ES8206940A1 publication Critical patent/ES8206940A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/068—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection by sampling faster than the nominal bit rate
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/20—Arrangements for detecting or preventing errors in the information received using signal quality detector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Quality & Reliability (AREA)
  • Communication Control (AREA)
  • Time-Division Multiplex Systems (AREA)
ES505798A 1980-09-26 1981-09-25 Procedimiento y circuito para la recepcion de series de bi- tios emitidos por una pluralidad de conductores paralelos dediferente longitud Expired ES8206940A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19803036368 DE3036368A1 (de) 1980-09-26 1980-09-26 Verfahren zum empfang von auf mehreren parallelen leitungen unterschiedlicher laenge gesendeten bitfolgen

Publications (2)

Publication Number Publication Date
ES505798A0 true ES505798A0 (es) 1982-08-16
ES8206940A1 ES8206940A1 (es) 1982-08-16

Family

ID=6112938

Family Applications (1)

Application Number Title Priority Date Filing Date
ES505798A Expired ES8206940A1 (es) 1980-09-26 1981-09-25 Procedimiento y circuito para la recepcion de series de bi- tios emitidos por una pluralidad de conductores paralelos dediferente longitud

Country Status (4)

Country Link
EP (1) EP0048936A1 (es)
DE (1) DE3036368A1 (es)
ES (1) ES8206940A1 (es)
FI (1) FI812990L (es)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1252727B (de) * 1965-03-01 1967-10-26 International Business Machines Corporation, Armonk, NY (V St A) Verfahren zum störungsfreien Empfang übertragener Daten
US3764989A (en) * 1972-12-20 1973-10-09 Ultronic Systems Inc Data sampling apparatus
US3938081A (en) * 1973-05-03 1976-02-10 Kirk Robert T Circuitry for preventing the use of erroneous data
SE375424B (es) * 1973-08-10 1975-04-14 Ellemtel Utvecklings Ab
FR2465371A1 (fr) * 1979-09-11 1981-03-20 Constr Telephoniques Methode de traitement d'impulsions electriques

Also Published As

Publication number Publication date
DE3036368A1 (de) 1982-04-29
FI812990L (fi) 1982-03-27
EP0048936A1 (de) 1982-04-07
ES8206940A1 (es) 1982-08-16

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19990503