ES473496A1 - Telephone exchange register arrangement - Google Patents

Telephone exchange register arrangement

Info

Publication number
ES473496A1
ES473496A1 ES473496A ES473496A ES473496A1 ES 473496 A1 ES473496 A1 ES 473496A1 ES 473496 A ES473496 A ES 473496A ES 473496 A ES473496 A ES 473496A ES 473496 A1 ES473496 A1 ES 473496A1
Authority
ES
Spain
Prior art keywords
telephone exchange
register arrangement
exchange register
processor
microprocessors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES473496A
Other languages
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Thales SA
Original Assignee
Le Materiel Telephonique Thomson CSF
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Le Materiel Telephonique Thomson CSF filed Critical Le Materiel Telephonique Thomson CSF
Publication of ES473496A1 publication Critical patent/ES473496A1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54508—Configuration, initialisation
    • H04Q3/54533—Configuration data, translation, passwords, databases

Landscapes

  • Engineering & Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Telephonic Communication Services (AREA)

Abstract

A register complex for a crossbar exchange comprises a number of storage units UE, which each comprise a processor PC and a number of interface circuits PED, via which the processor is connected to a register connector CE of the exchange. The interface circuits also give access via a further connector CA to auxiliary circuits. The processors PC may be microprocessors which are coupled to a main processing unit UC employing duplicated processors. Further microprocessors may be provided for traffic recording and incident recording.
ES473496A 1977-09-21 1978-09-20 Telephone exchange register arrangement Expired ES473496A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7728444A FR2404365A1 (en) 1977-09-21 1977-09-21 CROSSBAR TELEPHONE CENTER CONTAINING A PROCESSOR RECORDER SYSTEM

Publications (1)

Publication Number Publication Date
ES473496A1 true ES473496A1 (en) 1979-04-01

Family

ID=9195612

Family Applications (1)

Application Number Title Priority Date Filing Date
ES473496A Expired ES473496A1 (en) 1977-09-21 1978-09-20 Telephone exchange register arrangement

Country Status (8)

Country Link
BR (1) BR7806115A (en)
ES (1) ES473496A1 (en)
FR (1) FR2404365A1 (en)
GB (1) GB2005110B (en)
GR (1) GR64917B (en)
IT (1) IT1100104B (en)
PL (1) PL209719A1 (en)
RO (1) RO75720A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2453575A1 (en) * 1979-04-06 1980-10-31 Cit Alcatel Multifrequency selection unit for telecommunication centre - has transmitter and receiver units connected to interface lines through switch circuits controlled by microprocessor

Also Published As

Publication number Publication date
FR2404365A1 (en) 1979-04-20
PL209719A1 (en) 1979-07-02
IT7827774A0 (en) 1978-09-18
IT1100104B (en) 1985-09-28
GB2005110B (en) 1982-01-27
BR7806115A (en) 1979-05-08
GR64917B (en) 1980-06-09
FR2404365B1 (en) 1983-01-21
RO75720A (en) 1981-02-28
GB2005110A (en) 1979-04-11

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