ES468011A1 - A system of simultaneous communication by division of time. (Machine-translation by Google Translate, not legally binding) - Google Patents
A system of simultaneous communication by division of time. (Machine-translation by Google Translate, not legally binding)Info
- Publication number
- ES468011A1 ES468011A1 ES78468011A ES468011A ES468011A1 ES 468011 A1 ES468011 A1 ES 468011A1 ES 78468011 A ES78468011 A ES 78468011A ES 468011 A ES468011 A ES 468011A ES 468011 A1 ES468011 A1 ES 468011A1
- Authority
- ES
- Spain
- Prior art keywords
- time
- division
- bifilar
- line
- simultaneous transmission
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Time-Division Multiplex Systems (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
A simultaneous time division communication system for connecting in a simultaneous division by time division bifilar line circuits through a common general line of simultaneous transmission by time division, comprising means of switching of simultaneous transmission by division of time for periodically connecting bifilar line circuits to the general line of simultaneous transmission by time division during a time interval, each of the bifilar line circuits comprising a memory, characterized in that each bifilar line circuit comprises a device that connects in said interval of time the memory element and also the bifilar line circuit to a common general line of simultaneous transmission by time division to store the pertinent signals present in the general line of simultaneous transmission by division of time used simultaneously and in common for s transmitting and receiving signals, and connecting the memory element, during each period of time comprised between two successive time intervals, to the bifilar line circuit to which it is applied to supply substantially the same signal value that was stored in the memory in the interval of time preceding each bifilar circuit. (Machine-translation by Google Translate, not legally binding)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL7708404 | 1977-03-21 |
Publications (1)
Publication Number | Publication Date |
---|---|
ES468011A1 true ES468011A1 (en) | 1978-11-16 |
Family
ID=19828945
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES78468011A Expired ES468011A1 (en) | 1977-03-21 | 1978-03-18 | A system of simultaneous communication by division of time. (Machine-translation by Google Translate, not legally binding) |
Country Status (1)
Country | Link |
---|---|
ES (1) | ES468011A1 (en) |
-
1978
- 1978-03-18 ES ES78468011A patent/ES468011A1/en not_active Expired
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