ES429538A1 - Procedimiento y dispositivo de gestion de transmision de datos intercambiados entre un ordenador y una o varias uni- dades perifericas. - Google Patents

Procedimiento y dispositivo de gestion de transmision de datos intercambiados entre un ordenador y una o varias uni- dades perifericas.

Info

Publication number
ES429538A1
ES429538A1 ES429538A ES429538A ES429538A1 ES 429538 A1 ES429538 A1 ES 429538A1 ES 429538 A ES429538 A ES 429538A ES 429538 A ES429538 A ES 429538A ES 429538 A1 ES429538 A1 ES 429538A1
Authority
ES
Spain
Prior art keywords
control
transmission
peripheral devices
data exchanged
control processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES429538A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CII HONEYWELL BULL
Original Assignee
CII HONEYWELL BULL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CII HONEYWELL BULL filed Critical CII HONEYWELL BULL
Publication of ES429538A1 publication Critical patent/ES429538A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0745—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in an input/output transactions management context
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0751—Error or fault detection not based on redundancy
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Communication Control (AREA)
  • Financial Or Insurance-Related Operations Such As Payment And Settlement (AREA)
ES429538A 1973-09-03 1974-08-26 Procedimiento y dispositivo de gestion de transmision de datos intercambiados entre un ordenador y una o varias uni- dades perifericas. Expired ES429538A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7331760A FR2242910A5 (es) 1973-09-03 1973-09-03

Publications (1)

Publication Number Publication Date
ES429538A1 true ES429538A1 (es) 1976-09-01

Family

ID=9124560

Family Applications (1)

Application Number Title Priority Date Filing Date
ES429538A Expired ES429538A1 (es) 1973-09-03 1974-08-26 Procedimiento y dispositivo de gestion de transmision de datos intercambiados entre un ordenador y una o varias uni- dades perifericas.

Country Status (8)

Country Link
US (1) US3909782A (es)
JP (1) JPS581447B2 (es)
BR (1) BR7407309D0 (es)
DE (1) DE2442013A1 (es)
ES (1) ES429538A1 (es)
FR (1) FR2242910A5 (es)
GB (1) GB1473730A (es)
IT (1) IT1020375B (es)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1046598B (it) * 1974-05-16 1980-07-31 Honeywell Inf Systems Interfaccia di connessione di apparecchiature periferiche a un calcolatore provvista di meccanismi di segnalazione e di distinzione tradiversi tipi di errore
US4335426A (en) * 1980-03-10 1982-06-15 International Business Machines Corporation Remote processor initialization in a multi-station peer-to-peer intercommunication system
GB2075802B (en) * 1980-05-12 1984-05-31 Control Data Corp Network access device
US4458312A (en) * 1981-11-10 1984-07-03 International Business Machines Corporation Rapid instruction redirection
US4567595A (en) * 1983-03-31 1986-01-28 At&T Bell Laboratories Multiline error detection circuit
US4535421A (en) * 1983-07-05 1985-08-13 Pitney Bowes Inc. Universal real time transparent asynchronous serial/echoplex converter
US4594713A (en) * 1983-12-22 1986-06-10 Gte Automatic Electric Inc. Remote data link receive data reformatter
US4598404A (en) * 1983-12-22 1986-07-01 Gte Automatic Electric Inc. Data format arrangement for communication between the peripheral processors of a telecommunications switching network
JPH0670787B2 (ja) * 1984-06-29 1994-09-07 富士通株式会社 処理装置間指令転送制御システム
EP0518855B1 (de) * 1990-03-06 1994-06-01 Siemens Aktiengesellschaft Steuerung für einen kraftfahrzeugantrieb

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3303476A (en) * 1964-04-06 1967-02-07 Ibm Input/output control
US3579200A (en) * 1969-07-30 1971-05-18 Ibm Data processing system
DE2131787C3 (de) * 1971-06-26 1973-12-20 Ibm Deutschland Gmbh, 7000 Stuttgart Schaltungsanordnung zur Fehlerfeststellung bei Datenverarbeitungssystemen
US3721961A (en) * 1971-08-11 1973-03-20 Ibm Data processing subsystems

Also Published As

Publication number Publication date
BR7407309D0 (pt) 1975-09-09
US3909782A (en) 1975-09-30
GB1473730A (en) 1977-05-18
JPS5056134A (es) 1975-05-16
IT1020375B (it) 1977-12-20
DE2442013A1 (de) 1975-03-13
FR2242910A5 (es) 1975-03-28
JPS581447B2 (ja) 1983-01-11

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