ES359339A1 - Fuel injection control arrangement for internal combustion engines - Google Patents

Abstract

In an I.C. engine, the duration of pulses of injected fuel is controlled by a monostable multivibrator 12 in such a way that the duration of each pulse is dependent upon the pressure in the inlet manifold 3 and upon the engine speed. The speed-dependent control of pulse duration is made effective after a time lag at the end of each pulse by signals supplied from a circuit A to the feedback circuit of the multivibrator. At the end of each pulse, transistor T 3 is triggered after a time delay t 3 which then triggers transistor T 4 after a time delay t 4 . Transistor T 5 is in anti-phase with transistor T 4 and the voltage U s appearing on storage capacitor C 4 during charging and discharging, see Fig. 3d, forms the speed-dependent control signal. The pulse duration t i is determined by the momentary value of the control voltage U s at the end of each pulse. As the engine speed increases the frequency of pulses increases and therefore the momentary value of the voltage U s at the end of the pulse changes thus producing the relationship between pulse duration t i and engine speed n shown in Fig. 2. The threshold voltage Uo is set by voltage divider R16, R17. In an alternative, Figs. 4, 5 and 6 (not shown), the control voltage U 8 is produced by the lowest voltage values of two superimposed voltages (I), (II) appearing on a storage capacitor (C 6 ) connected across the emitter-collector path of a transistor (T 7 ) and a storage capacitor (C 7 ) connected across the collector resistor (R 24 ) of a transistor (T 8 ) which is in anti-phase with the transistor (T 7 ). In a further alternative, Figs. 7, 8 and 9 (not shown), the control circuit A of Fig. 1 is connected to an additional circuit (C) having a storage capacitor (C 9 ) connected across the emitter-collector path of a transistor (T 9 ) provided with a time delay with respect to the transistor T 4 , and the control voltage Us is produced by the higher voltage values of the two superimposed voltages (U A ), (U c ) appearing on the storage capacitors C 4 and (C 9 ). In yet a further alternative, Figs. 10, 11 or 12 (not shown), the control circuit (B) of Fig. 4 is connected to the circuit (C) of Fig. 7, and the control voltage U s is produced by the highest voltage values of the two superimposed voltages (U B ), (U c ) appearing on the storage capacitors (C 7 ), (C 9 ).