ES358451A1 - Aparato computador digital, electronico. - Google Patents

Aparato computador digital, electronico.

Info

Publication number
ES358451A1
ES358451A1 ES358451A ES358451A ES358451A1 ES 358451 A1 ES358451 A1 ES 358451A1 ES 358451 A ES358451 A ES 358451A ES 358451 A ES358451 A ES 358451A ES 358451 A1 ES358451 A1 ES 358451A1
Authority
ES
Spain
Prior art keywords
byte
store
address
register
control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES358451A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES358451A1 publication Critical patent/ES358451A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/32—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer
    • G06F13/34—Handling requests for interconnection or transfer for access to input/output bus using combination of interrupt and burst mode transfer with priority control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/04—Addressing variable-length words or parts of words
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Executing Machine-Instructions (AREA)
  • Bus Control (AREA)
ES358451A 1967-09-27 1968-09-24 Aparato computador digital, electronico. Expired ES358451A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US67091867A 1967-09-27 1967-09-27

Publications (1)

Publication Number Publication Date
ES358451A1 true ES358451A1 (es) 1970-03-16

Family

ID=24692423

Family Applications (1)

Application Number Title Priority Date Filing Date
ES358451A Expired ES358451A1 (es) 1967-09-27 1968-09-24 Aparato computador digital, electronico.

Country Status (10)

Country Link
US (1) US3500337A (es)
AT (1) AT281471B (es)
BE (1) BE719724A (es)
CH (1) CH479120A (es)
DE (1) DE1774864C2 (es)
ES (1) ES358451A1 (es)
FR (1) FR1580607A (es)
GB (1) GB1235927A (es)
NL (1) NL6813831A (es)
SE (1) SE329284B (es)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE758811A (fr) * 1969-11-28 1971-04-16 Burroughs Corp Systeme de traitement d'information ayant un emmagasinage sans structure pour traitements emboites
US3626374A (en) * 1970-02-10 1971-12-07 Bell Telephone Labor Inc High-speed data-directed information processing system characterized by a plural-module byte-organized memory unit
US3946366A (en) * 1973-01-26 1976-03-23 Sanders Associates, Inc. Addressing technique employing both direct and indirect register addressing
US11808111B2 (en) 2022-02-11 2023-11-07 Weatherford Technology Holdings, Llc Rotating control device with integrated cooling for sealed bearings

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB976499A (en) * 1960-03-16 1964-11-25 Nat Res Dev Improvements in or relating to electronic digital computing machines
FR1355606A (fr) * 1962-01-22 1964-03-20 Ibm Système de mémoires destiné à un emmagasinage à lecture rapide
US3311887A (en) * 1963-04-12 1967-03-28 Ibm File memory system with key to address transformation apparatus
US3290656A (en) * 1963-06-28 1966-12-06 Ibm Associative memory for subroutines
US3337851A (en) * 1963-12-09 1967-08-22 Burroughs Corp Memory organization for reducing access time of program repetitions
USRE26429E (en) * 1964-12-08 1968-08-06 Information retrieval system and method

Also Published As

Publication number Publication date
NL6813831A (es) 1969-03-31
FR1580607A (es) 1969-09-05
US3500337A (en) 1970-03-10
SE329284B (es) 1970-10-05
DE1774864B1 (de) 1972-08-31
DE1774864C2 (de) 1975-04-03
GB1235927A (en) 1971-06-16
BE719724A (es) 1969-02-03
CH479120A (de) 1969-09-30
AT281471B (de) 1970-05-25

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