ES302213A1 - El metodo de atacar localmente una pieza delgada de material semiconductor en matrices en forma de tronco de cono. - Google Patents

El metodo de atacar localmente una pieza delgada de material semiconductor en matrices en forma de tronco de cono.

Info

Publication number
ES302213A1
ES302213A1 ES0302213A ES302213A ES302213A1 ES 302213 A1 ES302213 A1 ES 302213A1 ES 0302213 A ES0302213 A ES 0302213A ES 302213 A ES302213 A ES 302213A ES 302213 A1 ES302213 A1 ES 302213A1
Authority
ES
Spain
Prior art keywords
matrices
translation
thin piece
semiconductor material
machine
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES0302213A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Radio Corporation of America
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp, Radio Corporation of America filed Critical RCA Corp
Publication of ES302213A1 publication Critical patent/ES302213A1/es
Expired legal-status Critical Current

Links

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • C23F1/02Local etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30612Etching of AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/028Dicing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/051Etching
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/054Flat sheets-substrates

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Materials Engineering (AREA)
  • Weting (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Sampling And Sample Adjustment (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • ing And Chemical Polishing (AREA)
  • Dicing (AREA)
ES0302213A 1963-07-18 1964-07-17 El metodo de atacar localmente una pieza delgada de material semiconductor en matrices en forma de tronco de cono. Expired ES302213A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US295880A US3288662A (en) 1963-07-18 1963-07-18 Method of etching to dice a semiconductor slice

Publications (1)

Publication Number Publication Date
ES302213A1 true ES302213A1 (es) 1965-01-16

Family

ID=23139604

Family Applications (1)

Application Number Title Priority Date Filing Date
ES0302213A Expired ES302213A1 (es) 1963-07-18 1964-07-17 El metodo de atacar localmente una pieza delgada de material semiconductor en matrices en forma de tronco de cono.

Country Status (5)

Country Link
US (1) US3288662A (es)
BR (1) BR6460494D0 (es)
ES (1) ES302213A1 (es)
GB (1) GB1014717A (es)
NL (1) NL6408203A (es)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3447984A (en) * 1965-06-24 1969-06-03 Ibm Method for forming sharply defined apertures in an insulating layer
US3423823A (en) * 1965-10-18 1969-01-28 Hewlett Packard Co Method for making thin diaphragms
US3512051A (en) * 1965-12-29 1970-05-12 Burroughs Corp Contacts for a semiconductor device
US3432919A (en) * 1966-10-31 1969-03-18 Raytheon Co Method of making semiconductor diodes
GB1139154A (en) * 1967-01-30 1969-01-08 Westinghouse Brake & Signal Semi-conductor devices and the manufacture thereof
US3447235A (en) * 1967-07-21 1969-06-03 Raytheon Co Isolated cathode array semiconductor
GB1189582A (en) * 1967-07-26 1970-04-29 Licentia Gmbh Method of Dividing Semiconductor Wafers.
GB1248584A (en) * 1968-03-05 1971-10-06 Lucas Industries Ltd Thyristors and other semi-conductor devices
US3590478A (en) * 1968-05-20 1971-07-06 Sony Corp Method of forming electrical leads for semiconductor device
US4180422A (en) * 1969-02-03 1979-12-25 Raytheon Company Method of making semiconductor diodes
GB1290926A (es) * 1969-06-20 1972-09-27
US3639975A (en) * 1969-07-30 1972-02-08 Gen Electric Glass encapsulated semiconductor device fabrication process
US3638304A (en) * 1969-11-06 1972-02-01 Gen Motors Corp Semiconductive chip attachment method
US3716429A (en) * 1970-06-18 1973-02-13 Rca Corp Method of making semiconductor devices
DE2332822B2 (de) * 1973-06-28 1978-04-27 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zum Herstellen von diffundierten, kontaktierten und oberflächenpassivierten Halbleiterbauelementen aus Halbleiterscheiben aus Silizium
US3959045A (en) * 1974-11-18 1976-05-25 Varian Associates Process for making III-V devices
US4142893A (en) * 1977-09-14 1979-03-06 Raytheon Company Spray etch dicing method
US4237600A (en) * 1978-11-16 1980-12-09 Rca Corporation Method for fabricating stacked semiconductor diodes for high power/low loss applications
JPS5784135A (en) * 1980-11-14 1982-05-26 Toshiba Corp Manufacture of semiconductor element
SE8306663L (sv) * 1982-12-08 1984-06-09 Int Rectifier Corp Forfarande for framstellning av halvledaranordning
FR2609212B1 (fr) * 1986-12-29 1989-10-20 Thomson Semiconducteurs Procede de decoupe collective, par voie chimique, de dispositifs semiconducteurs, et dispositif decoupe par ce procede
EP0276979A3 (en) * 1987-01-30 1989-12-06 University College Cardiff Consultants Ltd. Microenvironmental sensors
US6153501A (en) * 1998-05-19 2000-11-28 Micron Technology, Inc. Method of reducing overetch during the formation of a semiconductor device
US5498570A (en) * 1994-09-15 1996-03-12 Micron Technology Inc. Method of reducing overetch during the formation of a semiconductor device
US6051501A (en) * 1996-10-09 2000-04-18 Micron Technology, Inc. Method of reducing overetch during the formation of a semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL122283C (es) * 1958-07-25
US2944321A (en) * 1958-12-31 1960-07-12 Bell Telephone Labor Inc Method of fabricating semiconductor devices
US3154450A (en) * 1960-01-27 1964-10-27 Bendix Corp Method of making mesas for diodes by etching

Also Published As

Publication number Publication date
US3288662A (en) 1966-11-29
NL6408203A (es) 1965-01-19
BR6460494D0 (pt) 1973-02-22
GB1014717A (en) 1965-12-31

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