ES2646663T3 - Dynamic low power mode implementation for computing devices - Google Patents

Abstract

A method for conserving energy in a computing device having at least one processor, comprising: setting (14) an indicator bit associated with a resource, wherein the resource is one of a plurality of resources used by a processor; identify (28) the resources that can be placed in a low power mode based on the indicator bit configuration; register (30) a latency requirement for each of the identified resources; select (30) a shorter latency requirement among the registered latency requirements; evaluate (38) in the low power modes of the computing device for each resource that can be placed in a low power mode to eliminate any low power resource mode or any combination of low power resource modes that have a requirement of combined latency that exceeds the shortest latency requirement selected; select (38) a combination of low power resource modes that maximizes potential energy savings and has a total latency requirement that is less than or equal to the shortest latency requirement selected; and entering (40) in the selected combination of low power resource modes by executing an input function of each of the low power modes selected in each of the identified resources; characterized in that the step of setting (14) the indicator bit associated with a resource is performed when the resource is not in use and the step of identifying (28) the resources that can be placed in a low power mode based on the configuration Bit indicator is performed when the processor can enter an idle state.

Description

DESCRIPTION

Dynamic low power mode implementation for computing devices

BACKGROUND 5

[0001] Wireless communication technologies have experienced explosive growth in recent years. This growth has been driven by wireless services that provide freedom of movement to the mobile public, and the cutting of the connection to wired communication systems. As a result of the service improvements, the popularity of wireless services is expected to continue to grow rapidly. Battery life is a key factor in mobile electronic devices, so the procedures and devices that allow battery power to be conserved are important considerations in electronic device technologies.

[0002] "Proactive power management directed by compiler for networks", F. Li et al, September 2005, proposes a proactive approach directed by compiler for power management of networks for the kind of intensive loop applications that run in small networks used exclusively by only one application integrated at a time. United States Patent 6 457 135 refers to a system and method for managing a plurality of processor performance states. US Patent Application Publication US 2003/0028711 refers to the monitoring of energy consumption of memory areas in use. The publication of International Patent Application No. WO 2006/138687 refers to the reduction of power of a computer system by means of inactivity synchronization.

SUMMARY

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[0003] The present invention provides a method for conserving energy in a computing device that has at least one processor, and a computing device that has at least one processor as defined in the appended claims. The various aspects provide data and procedures that can be used or implemented by a processor within a computing device to select a combination of optimal, or almost optimal, low power operating modes for resources in the computing device. 30 The various aspects allow the resource components to have two or more resource power modes and the processor selects a power mode for each of the various resources based on the operating status, operating conditions, cycle characteristics idle and other factors to dynamically configure a low power mode of the system at the time the processor enters a low power or idle state. The various aspects allow a processor to evaluate the low power modes of various resources and any combination of low power power modes to identify those resources or combinations of resources whose effective latency does not exceed the system latency requirements of all tasks active. The various aspects allow a processor to select a combination of low power resource modes to implement in a low power system configuration that maximizes energy savings while complying with the system latency requirements of all 40 active tasks and make this selection dynamically (that is, at the time of a rest cycle), instead of selecting from a set of predefined low power configurations. The various aspects allow a processor to continually recalculate the search tables used by a solver process to determine an optimal low power configuration optimized for current conditions and operating status. The various aspects allow a processor to make use of the statistical information related to the operation of the computing device to determine an optimal low power configuration suitable for a current state, active applications and devices, and expected rest time. The various aspects allow a processor to select an optimal low power configuration based on current and past environmental and current information.

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[0004] The various aspects include procedures for conserving energy in a computing device that include the establishment of an indicator bit associated with a resource when the resource is not in use, in which the resource is one of a plurality of resources, identify the resources that can be placed in a low power mode based on the configuration of the indicator bit when a processor can enter a state of inactivity, register a latency requirement for each of the identified resources, select a latency requirement more stringent of the registered latency requirements, evaluate in the computing device the low power modes for each resource that can be placed in a low power mode to eliminate any low power resource mode or any combination of low resource modes power that have a combined latency requirement that exceeds the strictest latency tolerance selected, select a combination of the low power resource modes that maximizes potential energy savings and has a total latency requirement that is less than or equal to the worst case latency requirement selected and enter the selected combination of mode modes. low power resource executing an input function in each of the low power modes selected in each of the identified resources. In the appearance procedures, the selection of a combination of low power resource modes may include the execution of a backpack troubleshooting algorithm for the various resources and low power modes. Aspect procedures may also include determining a time that the processor is expected to remain in a

idle status and the determination of the potential energy savings of each of the evaluated modes of low power resources based on potential energy savings per unit of time at a current temperature multiplied by a given expected downtime. Appearance procedures may also include measuring, when the device is in a known stable state, temperature and current, or temperature and power demand, selecting a resource for measurement, placing the selected resource in a low power resource mode. , measure the power or current demand while the selected resource is in the low power resource mode, and repeat the selection steps of a next resource, place the selected resource in a low power resource mode and measure the demand for power or current while the selected resource is in the low power resource mode until the power or current demand has been measured during a low power resource mode for all resources that have a low power resource mode, in which the selection of a combination of low power resource modes that maximizes potential energy savings includes the use of d power demand or measured current associated with each low power resource mode to determine the potential energy savings of a combination of low power resource modes. The appearance procedures may further include repeating the operations set forth in claim 3 at different temperatures and determining a temperature sensitivity of the current or power demand associated with each low power resource mode, in which to select a combination of Low power resource modes that maximize potential energy savings include measuring the temperature of the computing device and utilizing the determined temperature sensitivity of current or power demand associated with each low power resource mode to determine energy savings. potential energy of a combination of low power resource modes at the measured temperature of the computing device. In the appearance procedures, the evaluation of low power resource modes for each resource that can be placed in a low power mode may include performing a table search process using a low power mode selection data table. Using potential energy savings, it has expected inactivity and operating conditions, and operating conditions may include a temperature value. The appearance procedures may also include collecting statistics on the operating conditions in the computing device and updating the low power mode selection data table based on the statistics of the collected operating conditions. In the appearance procedures, the operating conditions can be selected from the group that includes the temperature, the energy consumption of particular low power resource modes, the idle times experienced in various operating states and the usage patterns of typical devices . The appearance procedures may also include determining whether the computing device is connected to an external power supply, in which the updating of the low power mode selection data table based on the statistics of operating conditions is carried out when The computing device is connected to external power.

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[0005] The various aspects also include a computing device that includes means for performing the functions of the aspect procedures described above.

[0006] The various aspects also include an apparatus for conserving energy in a computing device that includes a buffer and a processor coupled to the buffer, wherein the processor is configured with instructions executable by processor to perform the operations of the appearance procedures described above.

[0007] The various aspects also include a non-transient storage medium having stored in the same processor-executable software instructions configured to cause a processor to perform power conservation operations on a computing device that include the operations of the procedures. of appearance described above.

BRIEF DESCRIPTION OF THE DRAWINGS

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[0008] The accompanying drawings, which are incorporated herein and constitute part of this specification, illustrate exemplary embodiments of the invention, and together with the general description given above and the detailed description given below, they serve to explain the characteristics of the invention.

FIG. 1 is a diagram of a resource controlled by a programming node to enter one of the two 55 low power modes in one aspect.

FIG. 2 is a process flow diagram of a procedure whereby a shared resource records its ability to enter a low power mode according to one aspect.

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FIG. 3 is a process flow diagram of a procedure whereby a shared resource registers outputs at a low power mode according to one aspect.

FIG. 4 is a process flow diagram of a procedure for selecting and entering a low power mode according to one aspect. 65

FIG. 5 is a programming node and a resource diagram illustrating an aspect procedure for selecting and entering a low power mode.

FIG. 6 is a programming node and a resource diagram illustrating another aspect procedure for selecting and entering a low power mode. 5

FIG. 7 is a process flow diagram of an aspect procedure for selecting an optimal low power mode.

FIGs. 8A and 8B are graphs of energy savings versus downtime of three alternative low power modes 10 illustrating an aspect procedure for selecting an optimal low power mode based on the expected downtime.

FIG. 9A and 9B are process flow diagrams of alternative aspect procedures for selecting an optimal low power mode. fifteen

FIG. 10 is a process flow diagram of an alternative aspect procedure for selecting an optimal low power mode.

FIG. 11 is a process flow diagram of an alternative aspect procedure for selecting an optimal low power mode or updating a low power mode selection table based on whether the computing device is connected to an external power.

FIG. 12 is a process flow diagram of an aspect procedure for updating energy-saving parameters of resources based on statistics collected by the mobile device. 25

FIG. 13 is a process flow diagram of an aspect procedure whereby a mobile device can collect statistics on energy savings obtained by various low power modes as well as statistics relating to the distribution of interruptions and timers that affect savings of power in idle mode. 30

FIG. 14 is a process flow diagram of an aspect procedure whereby a mobile device can collect the measured energy savings achieved by each low power resource mode.

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FIG. 15 is a block diagram of components of a mobile device suitable for use in one aspect.

DETAILED DESCRIPTION

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[0009] The various aspects will be described in detail with reference to the attached drawings. Whenever possible, the same reference numbers will be used throughout the drawings to refer to the same or similar parts. References made from particular examples and implementations are for illustrative purposes, and are not intended to limit the scope of the invention or the claims.

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[0010] The expression "by way of example" is used herein to mean "serving as an example, instance or illustration". Any implementation described in this document should not necessarily be construed as "by way of example" as preferred or advantageous with respect to other implementations.

[0011] The terms "mobile device" and "computing device" are used interchangeably herein to refer to any one or all cell phones, personal data assistants (PDAs), portable mini-computers, wireless email receivers ( for example, Blackberry® and Treo® devices), cell phones with multimedia Internet (for example, Blackberry Storm®), Global Positioning System (GPS) receivers, wireless game controllers and similar personal electronic devices that include a programmable processor and they operate under battery power such that energy conservation procedures are beneficial.

[0012] As used herein, the term "resource" is used herein to refer to any of a wide variety of circuits (eg, ports, clocks, buses, oscillators, etc.), components (for example, memory), signals (for example, clock signals), and voltages (for example, voltage lanes 60) that are used to support processors and clients running on a computing device.

[0013] Maximizing the battery life of wireless devices is an important design criterion. The longer battery life maximizes the user experience by allowing users to do more with a wireless device for longer periods of time. However, to truly maximize the user experience, energy saving strategies must be implemented so that they do not alter functionality

or device reliability. As such, the efficient and effective design of energy-saving schemes that do not alter functionality is an important objective for mobile and wireless device providers.

[0014] To maximize battery life, most mobile broadcast receivers are configured to place the one or more processors and device resources in a low power state 5 whenever possible, for example when a processor It is in a state of inactivity. Placing device resources in a low power state typically consists of deactivating the different device resources as long as the processor is not actively processing the tasks, and / or is in a state of inactivity. Resources that can be deactivated or placed in one or more low power and / or inactive states, when the processor is not processing tasks and / or is in an inactive state, are referred to herein as low power resources or LPR. In multiprocessor devices, such as smartphones that can have a wireless modem processor and an application processor, low power mode implementation operations can be performed by each processor independently or in a coordinated manner.

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[0015] A mobile computing device typically includes a number of resources used by the device's processor, such as a crystal oscillator, voltage lanes, one or more memory units, communication buses, etc. With increasingly complex computing devices, the number of resources used or managed by the device processors is increasing every year. For example, many mobile computing devices now include multiple crystal oscillators, multiple voltage rails and multiple memories, each of which can be independently controlled. Consequently, there are many different resources that a computer device processor can disable or place in a low power mode in order to save energy. In addition, computing devices may have several processors that use different device resources and perform different tasks (and therefore cannot be inactive at the same time). For these reasons, a certain degree of executive control must be exercised when 25 resources are selected to be placed in a low power mode. The choice of resources to be placed in low power modes is known as the "rest problem."

[0016] In general, processors can deactivate, disable, inactivate, or otherwise reduce the energy consumption needs of low power resources when the processor no longer needs a resource, such as when the processor enters a stable idle state. When the processor is "activated" (for example, it leaves the idle state to perform another process), the resources must be activated again, rehabilitated and / or returned to an acceptable operating state. However, each low power resource may have different levels of power consumption and latency characteristics (i.e., the time required to return the resource to a full power mode), and such characteristics may change with temperature and temperature. operating status That is, each resource can consume a different amount of energy in its various low power modes, may require a different amount of time to enter and exit the deactivation, inactivation and / or low power states, and may consume a different amount. of power when entering and leaving such states. For the sake of clarity, the various low power modes available for each of the resources are referred to herein as low power resource modes or LPRM. 40

[0017] If the power required to return a resource to its required operating state is greater than the energy saved by having the resource in a low power mode for the estimated duration of the processor idle state, then perhaps the duration of The battery of the wireless device is not maximized simply by deactivating the resource and / or placing it in a low power state as long as the processor is idle. Therefore, the problem of resting to determine which low power resources should be deactivated and / or placed in low power modes, as well as the particular low power modes in which each resource should be placed typically requires processor status analysis. as well as states of other device processors, together with the low power mode characteristics of each resource, such as latency, potential energy savings, energy consumption and interdependencies. In addition, the characteristics of the low power resource mode 50 may be affected by operating conditions such as temperature, so that such conditions must also be evaluated.

[0018] As discussed above, each resource can have a set of low power modes or LPRMs in which the resource can be placed. Each low power resource mode of each resource can be characterized in terms of latency, potential energy savings, transition energy consumption, low power mode input criteria, mode output criteria and resource interdependencies, some or all of which may vary with temperature and other operating conditions. Resources can have more than one low power resource mode, each of which can have different energy saving characteristics and latency times. For example, a low power resource mode for a resource may completely disable the resource (for example, disable power), while a second low power resource mode may involve reduced functionality or periodic operation of the resource. Each low power resource mode may have different operating characteristics, such as providing different energy savings per unit of time and requiring different amounts of time to enter and exit the mode (i.e. different latency requirements). For example, a volatile memory chip may have two modes of low power resource; a deep disconnect mode that consumes the least amount of energy but that

it requires more time to return to a functioning state (i.e. a higher latency) and a self-update mode that continues to consume some battery power but has lower latency (i.e., it can return to the fully functioning state very quickly). In addition, the energy savings provided by each low power resource mode may depend on operating conditions, such as temperature and expected downtime. Therefore, in some aspects, the low resource power modes can calculate the expected energy savings as the product of the potential energy savings per unit of time at a current temperature, multiplied by the expected expected downtime. In other aspects, the expected energy savings can be determined as another function of temperature, expected downtime and other variables.

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[0019] As mentioned earlier, placing a resource in a low power mode and restoring it to a normal mode after processor activation often requires some work, which requires power and time (ie latency) to get. The additional power and time required to enter a low power resource mode may not result in real energy savings if the amount of time the system remains in a state of inactivity is too short. In other words, the power 15 consumed by placing the resource in a low power resource mode and returning it to full operation may be greater than the power saved during the short time it was in the low power mode. Therefore, the benefit of entering a particular low power resource mode may depend on the expected time in which the processor can remain idle. This time is referred to here as the "expected downtime."

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[0020] The amount of power that can be saved by placing a resource in a low power resource mode will vary based on the characteristics of the mode of operation and the necessary resources, as well as the amount of time the resource will remain in that way. For example, placing a memory chip in a low power auto-update mode can consume energy associated with the auto-update processes, as well as require the availability of power to the chip. Therefore, the energy savings available in a particular mode of low power resources is an important feature to consider when selecting from a plurality of low power resource modes to decide a combination of low power resource modes to implement. in a given rest cycle.

[0021] As mentioned above, the amount of power that can be saved by placing a resource in a particular low power resource mode may also depend on environmental and operational factors, such as temperature. The temperature affects the electrical resistance inside the device. Therefore, the energy savings associated with the different low power resource modes of each resource at room temperature (as should be assumed when low power configurations are developed in advance) can be very different on the ground when the device is much colder (for example, during winter 35 in Alaska) or warmer (for example, during summer in Texas). Consequently, the energy savings of different low power configurations (i.e. a selected set of low power resource modes) under real life conditions may mean that the optimal real low power mode is different from what is You can anticipate in advance. Since the temperature of a device cannot be known in advance, this important feature cannot be used to select a combination of low power resource modes for the low power resources available using conventional procedures for organizing and selecting low power modes.

[0022] While energy saving is an important objective in the configuration of low power modes for electronic devices, one must also consider ensuring that the device continues to function properly after entering a low power mode. Therefore, consideration of the latencies associated with each low power resource mode is also important. As mentioned earlier, a certain amount of time is required to enter and exit a low power resource mode and return the resource to a normal operating mode. This latency time must be less than the expected downtime or the low power mode will be of little benefit. More significantly, the latency associated with the output of the low power resource mode, or a selected combination of low power resource modes, must be less than the maximum allowed system latency of any client or processor that may require the resource. or resources when in low power mode. If the latency associated with leaving a particular low power resource mode or a combination of low power resource modes exceeds the acceptable system latency, then the low power configuration of the particular system may not be acceptable 55 because it could cause an error of operation or make some unrelated technology work incorrectly.

[0023] An example of a situation where latency requirements are an important consideration in the idle problem is when a universal serial bus (USB) connector is connected to a mobile device. The USB protocol typically has a very short latency requirement and if the main device does not receive a response to a request for resources within that latency, the main device may conclude that the device is not functioning properly. Therefore, you should not enter any low power resource mode of a resource, or any combination of low power resource modes, with an output latency greater than the USB latency requirement, when a current operating configuration Includes connection to a 65 USB device.

[0024] In addition to the latency and operating conditions, the low power modes of a resource may also depend on other resources and / or conditions. Such considerations of resource interdependence are generally referred to herein as "dependencies." These dependencies can be interdependent (that is, the mode can only be enabled if another resource remains available), exclusive (that is, the mode cannot be entered if another particular resource is in a low power mode or not in a mode high power) or orthogonal (that is, the modes have no relation to each other and can be enabled independently). Low power mode dependencies can also be classified as "static" or "dynamic". Static dependencies are those that define the conditions that must be met before a resource can even consider the implementation of a particular low power mode operation. Dynamic dependencies, on the other hand, arise when one mode can only be implemented in conjunction with another mode in the system, which is typically only determinable at runtime.

[0025] While static dependencies can be predicted with some degree of certainty, dynamic dependencies are difficult to determine in advance. In addition, dynamic dependencies become exponentially more complex as the number of components and / or resources increases. Effective management of the dynamic dependencies of low power modes will become increasingly important as modern wireless devices continue to grow in complexity and include more components and resources.

[0026] Therefore, the configuration of a device to conserve battery life by means of inactivating and / or disabling resources consists in selecting, among the different resource modes of low power of the resources in order to balance the different low power mode features of energy savings, latencies and interdependencies of the various resources, as well as the requirements of customers, processors and applications that may be running simultaneously. This selection process is a difficult task from the computational point of view (similar to the classic "backpack" problem) due to the number of 25 variables and permutations that can be considered, especially as the complexity of the computing devices increases.

[0027] At present, low power modes for processors and devices are set up in advance by developers based on a static set of predictable priorities and features. 30 One or some sets of low power configurations can be encoded in a processor or system during development. The selection of a low-power configuration from a set of low-power modes is currently controlled by programming in a yes-then / otherwise coded decision tree. When several predefined low power system modes are provided, the processor can select from the various predefined modes allowing operating customers to indicate their various resource requirements or operating conditions by "voting." The result of customer voting may be explicitly disabling one or more low power modes.

[0028] The known processes for selecting a low power mode of the system to be implemented among several predefined low power modes of the system may consider the temperature, expected downtime and latency requirements. However, said known procedure requires that the system, processor or application developer predefines a series of optional system modes by providing combinations of resources that can be placed in a low power mode, assessing their probable interdependencies, totaling their latencies. and provide for the requirements and limitations of the system at the time that mode could be entered. While the process of anticipating low power mode conditions and presetting a set of system modes from which a selection could be made was possible when processors and devices were relatively simple, it is anticipated that this design problem will result prohibitively difficult as the complexity of the system and processor increases in the future.

[0029] Today's procedures for the development and implementation of the low power modes of the system in computing devices cannot take into account current, runtime, operating conditions (eg temperature) , latency requirements or device dependencies In addition, current implementations of low power configurations are not adjusted to particular device configurations and cannot explicitly address the dynamic latency requirements of each of the low power resource modes of each individual customer, since the operating status of said 55 components cannot be predicted in advance. As such, the current process of developing and implementing low power modes typically requires configuring a preset number of low power system configurations (e.g., idle mode, sleep mode, deep sleep mode, etc.) based on assumptions that can be made in advance and placing the system in one of the best low power modes of the system based on selection criteria defined by the developer. The current procedures 60 cannot dynamically generate a low power configuration in real time consisting of a combination of low power resource modes that places each of the low power resources, as well as the processors, in a state that fully maximizes Energy savings

[0030] In previous generations of devices, the configuration of low power modes in advance was reasonable because the number of different resources and clients that can interact with the processor was

limited, so that a small number of different operating states could be foreseen. However, modern electronic devices are becoming increasingly sophisticated, involving multiple processors, numerous resources and concurrent clients, so that it will no longer be possible to define optimal low power modes that can be encoded in processors. In addition, the selection of a low power mode of the system previously defined using decision tree programming if-then / otherwise 5 varies approximately according to 2n where "n" is the number of resources and clients involved in the determination. As a result, developers have to commit to a subset of low power configurations that can be coded in advance, which can be sub-optimal in some operating states, if not all. Requiring developers to adopt sub-optimal low power configurations results in electronic devices that achieve less energy savings than would otherwise be achievable if optimal low power modes could be defined and implemented for particular operating conditions.

[0031] In addition to the operating limitations of the current programming of low power configurations, the effort to define in advance a set of low power modes and / or system configurations 15 (for example, inactivity, rest, deep rest) and rigidly coding the modes in a processor or an application implies a significant effort from the developer. In addition, the rigid coding of the advanced set of low power modes does not address the various operating states in which each of the resources could be at a given time and cannot dynamically respond to power consumption levels total and operating states of all system components. Since the definition of the low power modes of the system is directed by code and not by data, small changes made to the device configurations and small changes made to the set of low power resource modes require new complete tests. to confirm that code changes do not cause device errors. Therefore, current procedures for implementing low power modes cannot keep up with changes in device configurations (e.g., components, software, etc.) that may occur during the production of a product.

[0032] To address these and other problems, the various aspects deal with dynamically generating a low power configuration system composed of a combination of low power resource modes selected from multiple low power resources, to place each of the resources Low power individual, as well as processors, in a state of operation that fully maximizes energy savings throughout the system. The various aspects provide procedures that simplify the idle problem for the processors of the device so that more optimal low power configuration selections can be made by the processors in real time, to offer a large number of low power configurations that can Perfectly match the level of energy savings currently achievable. 35 The various aspects allow component developers to define various low-power resource modes for each of their components that take into account several factors, such as the type of resources in use, the latency of the worst case that can be tolerated, dynamic operating conditions (e.g. temperature), expected downtime and component latency. The low power resource modes defined for each resource can also define static and dynamic dependencies. The device processors 40 can then select any combination of low power resource modes dynamically, at runtime. In one aspect, device processors can calculate and select a combination of low power modes that results in a low power configuration or a system idle state that maximizes energy savings and / or operating speed by satisfying the at the same time the current operating requirements, including the requirements of 45 other processors and components in the system.

[0033] The various aspects also allow devices to select one or more low power resource modes by identifying the resources that can be disabled, as well as the resources that must remain during a low power configuration of the device. The various aspects provide data and 50 procedures that can be used by a processor within a computing device to select a set of optimal or almost optimal low power resource modes for resources when the processor enters a state of inactivity, supporting it operating reliability time without requiring significant customer interaction and additional processor action. The aspects allow a processor to determine a low power configuration of the system that provides the greatest amount of energy savings of the system while continuing to operate reliably, depending on the resources in use, the latency in the worst case that can be tolerated, dynamic operating conditions (e.g. temperature), expected downtime, the time required to enter and exit low power modes, and the unique electrical characteristics of the particular electronic device.

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[0034] The various aspects provide a mechanism for determining an optimal low power configuration of the system composed of a set of low power resource modes for the various resources within the computing device determining which of the low power resource modes of the resource are valid at the moment the processor enters a state of inactivity, classifying the low power resource modes valid by expected energy savings given the current device conditions, 65 determining which of the low power resource modes valid provides the greatest energy savings

while satisfying the latency requirements and selecting a particular low power resource mode for each resource you wish to enter. In this way, the various aspects eliminate the concept of fixed predefined low power configurations of the system, thus simplifying the developer's problem by allowing developers to address each resource separately and move the problem from rest to runtime allowing the processor to select the set of low power resource modes to implement 5 when the processor enters a state of inactivity. This allows the implementation of low power modes to be driven by operational data, and gives processors the ability to self-optimize the low power modes of the system by learning about how the device is used and operated. In addition to providing greater energy savings in a typical implementation compared to current procedures, the various aspects also simplify the development of electronic devices. 10

[0035] For the sake of clarity and to eliminate any ambiguity between "low power modes" and "low power resources", it should be understood that each low power resource may have several low power modes. Multiple low power resources can be activated, enabled, disabled and / or disabled in a given state of inactivity. Therefore, a "general low power system configuration" is defined by a selection of low power modes for each of the resources available to enter a low power mode based on the current state and operating conditions. . It should also be noted that due to latency restrictions and resource dependencies (as described below), the optimal low power configuration of the system may not involve placing each of the plurality of resources available for inactivation in a low power mode. Therefore, the selection of an optimal low power configuration of the system can identify some resources that must remain in operating state for latency, statistical availability and other reasons.

[0036] The various aspects also allow defining low power resource modes for those resources that are used by the processors, and therefore cannot be disabled simply when they are no longer in use. It is necessary to enable and disable the resources used by a processor in a controlled manner for the system to function properly. With this requirement in mind, disabling these resources after they are no longer in use should be deferred until the processor enters an idle state in which the resource can be disabled. The process of entering a low power configuration or mode of the system is known as entering a low power state. 30

[0037] The various aspects allow resources to indicate when they are available to enter a low power state by enabling an indicator bit within a low power mode mask ("LPM mask") that can be used by the processor to select an appropriate combination of LPRM to implement in a low system power configuration when the processor enters a state of inactivity. When a resource is in use, the resource can disable the indicator bit in the LPM mask. In several aspects, the enabling and disabling of the bits within the LPM mask can be performed by a controller function within programming nodes of processor-dependent resources that can call an application programming interface (API), such as describe later. Thus, at the moment when a processor is able to enter a state of inactivity, the LPM mask can be accessed to determine which resources can be placed in a low power mode.

[0038] As discussed above, when a resource is no longer in use and the processor is entering a state of inactivity, the resource can be placed in a low power mode, such as one of the low power resource modes of the resource However, just because a resource is no longer in use and the processor is entering a state of inactivity is not always a sufficient basis to place the resource in a low power mode. In addition, for resources that support different types of low power resource modes, the processor must make a selection among alternative modes of low power resources based on current operating conditions (e.g. temperature), addressing the savings of Total energy that can be achieved within the expected downtime, the latency requirements of current customers and 50 other processors, and several other factors. In several aspects, the energy savings for a particular mode of low power resources for a particular resource may depend on temperature and time, such that the potential energy savings of each mode of low power resource evaluated can be determine by multiplying potential energy savings per unit of time at a current temperature (which is a factor that can be included in the definition of low power mode) by the expected expected downtime. 55 In addition, the selection of the low power mode must also take into account other variables, including the particular characteristics of the electronic device, the implementation of the device software, the expected time in the inactive condition and the status of the device, such as the speed of the device. clock, etc.

[0039] When the processor is ready to enter a low power configuration of the system, such as when the processor is ready to enter a state of inactivity, a low power task can access the LPM mask to identify resources which can be placed in a low power state and determine the appropriate low power resource modes to enter those resources based on a given dynamic system state (e.g., current active customers, required latency, expected downtime and temperature ). To allow the processor to perform this determination, each resource may define low power resource mode feature data that specifies the information required for

select an optimal set of low power resource modes that will be implemented for a given state. This specified information may include a list of each low power resource mode available for the resource, potential energy savings for each low power resource mode as a function of time or unit of time, latency characteristics for each resource mode Low power (i.e. low power mode exit time), temperature effects on potential energy savings, dependencies (i.e. 5 interdependencies with resources other than customers), and other information that can be relevant to select an optimal low power resource mode for each resource. Such information can be specified for a resource in a variety of forms and data structures, an example of C code of which is listed below.

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typedef struct

{

/ * The name of this low power resource, for example, "application core voltage". * /

const char * resource_name;

/ * The number of low power modes this resource can enter. */ fifteen

uint32_t mode_count;

/ * The list of low power modes in which this resource can enter. * /

LPM_Resource_Mode * modes;

} LPM_Resource;

 twenty

[0040] In this definition, most of the resource data is included within the definitions of low resource power modes. Definitions of low power modes for resources can be written in C code as follows:

typedef uint32_t (* LPRM_PowerSavingsFcn) 25

(uint32_t duration_us, int32_t temp_c);

typedef struct

{

uint32_t enter;

uint32_t exit; 30

}

sleep_latency_type;

typedef uint32_t (* sleep_power_func) (uint32_t duration_us, int32_t temp_c);

typedef struct LPRM

{35

/ * The name of this low power mode (for example, "minimization"). * /

const char * mode_name;

/ * Functions that describe the characteristics of the mode. * /

LPRM_PowerSavingsFcn power_savings;

LPRM_LatencyFcn latency; 40

/ * Functions that implement the actual configuration and disassembly of a mode. * /

LPRM_EnterFcn enter;

LPRM_ExitFcn exit;

/ * The LRRs that are largely enabled for this mode to occur. * /

uint32_t lpr_dependency_count; Four. Five

const char * lpr_dependencies;

/ * LPRs cannot be entered if this mode is selected. * /

uint32_t lpr_exclusion_count;

const char * lpr_exclusions;

/ * Some reserved accounting fields after initializing this point to 0. * / 50

}

LPM_Resource_Mode.

[0041] The above C code is written for the general case. The code in Example C to define low power modes for the specific case of a voltage rail resource is presented below. An example of the C code definitions for the low power crystal oscillator resource (CXO) modes is shown below. In this example, the processor supports two options for operating the crystal oscillator resource in low power mode: a closed mode that saves energy from the clock tree but still consumes energy that operates the oscillator; and a deactivation mode that saves clock tree energy and oscillator power, but requires a significant warm-up time after exiting this low power mode (ie, it has a relatively long latency).

const char * cxo_gated_deps [] = {"lpr: // cxo"};

LPM_Resource_Mode cxo_gated =

 {65

.mode_name = "gated"; / * what is locked is in LPR * /

.power_savings = cxo_gated_power; / * based on data * /

.latency = cxo_gated_latency; / * based on data * /

.enter = cxo_gated_enter; / * call the mpm controller * /

.exit = cxo_gated_exit; / * call the cleaning of the mpm controller * / 5

LPRM _DEPENDENCY_ARRAY (cxo_gated_deps);

 LPRM_EMPTY_ARRAY (); / * without exclusions in this mode * /

}

const char * cxo_stdn_deps [] = {"lpr: // cxo"};

LPM_Resource_Mode cxo_shutdown = 10

 {

.mode_name = "shutdown";

.power_savings = cxo_stdn_power; / * based on data * /

.latency = cxo_stdn_latency; / * based on data * /

.enter = cxo_stdn_enter; / * different mpm call * / 15

.exit = cxo_stdn_exit; / * mpm cleaning call * /

LPRM_DEPENDENCY_ARRAY (cxo_stdn_deps); / * same as closed * /

 LPRM_EMPTY_ARRAY (); / * without exclusions in this mode * /

 }

LPM_Resource_Mode * cxo_modes [] = {& cxo_gated, &cxo_shutdown}; twenty

LPM_Resource cxo =

 {

.resource_name = "CXO";

LPM_MODE_ARRAY (cxo_modes);

 }; 25

// On commissioning:

sleep_define_lpr (&cxo);

// CXO modes are now registered with / sleep / lpr and commissioning disabled.

// Next, how an NPA control node can enable them.

// Commissioning: 30

client = npa_create_sync_client ("/ sleep / lpr", "/ xo / cxo",

NPA_CLIENT_REQUIRED);

npa_query_type q;

q.reference = "lpr: // cxo";

npa_query_by_client (client, SLEEP_QUERY_LPRM_BITMASK, &q); 35

uint32 bitmask = q.value;

// Enable:

npa_issue_required_request (client, bitmask)

// To disable:

npa_complete_request (client) 40

[0042] It should be noted that the part of the sample code related to the control of a node power architecture (NPA) node and other references to an NPA node or NPA procedures herein are for illustrative purposes only. The various aspects are not limited to enabling and disabling resources through an NPA node or using a node power architecture. Therefore, the scope of the claims should not be construed as requiring an NPA node or an NPA process unless specifically stated in the claims.

[0043] Another example of C code suitable for defining low power modes for voltage sources (VDD) is presented below. In this example, the processor has two system level voltage rails that supply Vdd that are controlled for the digital and memory logic circuits, referred to in the code as "dig" and "mem". Placing the voltage lanes in low power mode requires a latency penalty associated with the new online bringing of the resource when exiting the low power mode. The control of these two voltage lanes is coupled because if a voltage lane is placed in a low power mode, the other voltage lane can also be placed in a low power mode without incurring an additional latency penalty since 55 the two resources can be "heated" in parallel. To handle this interdependence, the following code defines three low power modes for a single "system Vdds" resource, namely: minimization of dig and mem; mem-only minimization; and the minimization of dig-only.

const char * dig_mem_deps [] = {"lpr: // vdd_dig", "lpr: // vdd_mem"}; 60

LPM_Resource_Mode dig_mem =

{

.mode_name = "Dig / Mem Min";

.power_savings = dig_mem_power;

.latency = dig_mem_latency; / * this is approximately equivalent to dig_latency or 65

mem_latency-they could share this * /

.enter = dig_mem_enter; / * call the mpm controller * /

.exit = dig_mem_exit; / * call the cleaning of the mpm controller * /

LPRM_DEPENDENCY_ARRAY (dig_mem_deps);

LPRM_EMPTY_ARRAY (); / * without exclusions in this mode * /

const char * mem_deps [] = {"lpr: // vdd_mem"}; LPM_Resource_Mode mem_min 5

{

.mode_name = "Mem Min";

.power_savings = mem_power;

.latency = mem_latency;

.enter = mem_enter; / * call the mpm controller * / 10

.exit = mem_exit; / * call the cleaning of the mpm controller * /

LPRM_DEPENDENCY_ARRAY (mem_deps);

LPRM_EMPTY_ARRAY (); / * without exclusions in this mode * /

}

const char * dig_deps [] = {"lpr: // vdd_dig"}; LPM_Resource_Mode dig_min = 15

{

.mode_name = "Dig Min";

.power_savings = dig_power;

.latency = dig_latency;

.enter = dig_enter; / * call the mpm controller * / 20

.exit = dig_exit; / * call the cleaning of the mpm controller * /

LPRM_DEPENDENCY_ARRAY (dig_deps);

LPRM_EMPTY_ARRAY (); / * without exclusions in this mode * /

}

LPM_Resource_Mode * sys_vdds_modes [] = {mem_dig, mem_min, dig_min}; 25

LPM_Resource sys_vdds =

{

.resource_name = "System Vdds";

LPM_MODE_ARRAY (sys_vdds_modes); 30

};

// On commissioning:

sleep_define_lpr (&sys_vdds);

// The modes are now registered with / sleep / lpr and commissioning disabled.

// Next, how an NPA control node can enable them. 35

// Set up:

dig_client = npa_create_sync_client ("/ sleep / lpr", "/ rail / vdd_dig",

NPA_CLIENT_REQUIRED);

mem_client = npa_create_sync_client ("/ sleep / lpr", "/ rail / vdd_mem",

NPA_CLIENT_REQUIRED); 40

npa_query_type q;

q.reference = "lpr: // vdd_dig";

npa_query_by_client (dig_client, SLEEP_QUERY_LPRM_BITMASK, &q);

uint32 dig_bitmask = q.value;

q.reference = "lpr: // vdd_mem"; Four. Five

npa_query_by_client (mem_client, SLEEP_QUERY_LPRM_BITMASK, &q);

uint32 mem_bitmask = q.value;

npa_issue_required_request (mem_client, mem_bitmask);

// Only "Mem Min" mode enabled now

npa_issue_required_request (dig_client, dig_bitmask); fifty

// All three modes enabled now

npa_complete_request (mem_client)

// Only "Dig Min" mode enabled now

npa_complete_request (dig_client)

// Return to no mode enabled 55

[0044] The low dynamic power resource registration mechanism described and illustrated above allows the set of low power resources and modes to be dynamically extended. This capability includes providing "low power virtual modes", which are low power operating states that are not for resources, but if handled in a similar manner, may allow reduced power operations. An example of such low power virtual modes includes suspending display update processes when the processor enters an idle state since no new content will be generated that requires an update. Therefore, other operations and device components can be managed using the various aspects to allow reduced energy consumption even if the components are not resources per se. 65

[0045] In the various aspects, when a processor is able to enter a state of inactivity, a low power task may execute a "solver" process to determine at which low power modes for the various resources it should be entered as part of a low power system configuration for a given idle cycle. In such cases, it may be necessary to collect the low power modes and the characteristics of those low power modes for the different resources to be used by a rest task to be evaluated when it is time to enter the idle state. In one aspect, this can be implemented in a node power architecture (NPA) through an NPA node "/ sleep / lpr". Requests for "/ sleep / lpr" can be made in the form of bit masks that allow low power resource modes. In several ways, developers can register a low power resource mode through a sleep_define_lpr () function that lists the low power resource mode (and its low power resource bit masks) with node 10 NPA " / sleep / lpr ". In several respects, the NPA node "/ sleep / lpr" can be consulted at any time for the bitmask that represents the low resource power resource modes that are interested in enabling / disabling. NPA resources can also request that their low resource power resource modes be enabled at idle time by making a request in "/ sleep / lpr" with the correct bit mask. The standby solver can then query "/ sleep / lpr" at idle time for the list of 15 low power resource modes and the mask which are currently enabled.

[0046] As discussed above, in the various aspects, when a processor is able to enter a state of inactivity, a low power task may execute a "solver" process to determine at which low power resource modes. for the various resources you should enter. An example of this is illustrated in FIG. 1 illustrating how a process (i.e. node) within a node power architecture (NPA) 2 determines for a resource, such as a crystal oscillator 4, in which of the two available low power modes 6, 8 It can be entered. In the example illustrated in FIG. 1, the crystal oscillator resource 4 has two alternative low power modes, namely a closed operating state 6 and a complete stop 8. Select an optimal set of low power modes for each of the various resources necessary for Being placed in a low power mode implies selecting one of the modes available for each of the necessary resources. In one aspect, each of the selected low power resource modes can be entered by calling a "enter" function of the low power resource mode. Once the low power resource mode input function is called, the resource can be placed in a state of energy savings defined by its selected low power resource mode. While the processor is idle, the processor can perform an interrupt wait process (WFI) and / or an inactivity process. The selected processor and resources can remain in this state until an activation event occurs. When an activation event occurs, for each selected resource, an associated "output" function can be called to return the resource to the desired operating state (for example, a normal or full power state). 35

[0047] The processes for implementing the various aspects are illustrated in FIGs. 2-4. With reference to FIG. 2, in the aspect procedure 10, when a resource is no longer in use because a client has released the resource in block 12, the low power resource mode indicator can be enabled in the LPM mask in block 14, by example implementing an operation as illustrated in the examples listed above. At this point, the resource has indicated that it is available to be placed in a low power resource mode. When an activation event occurs and a client requests access to a resource, the procedure 16 illustrated in FIG. 3 can be implemented. When a client requests a resource in block 18, the low power resource mode indicator for the resource may be disabled in the LPM mask in block 20, such as by implementing an operation as illustrated in the examples listed above. In block 22, the resource can then be activated such as performing an associated "exit" function as mentioned above.

[0048] FIG. 4 illustrates an aspect procedure 24 by which a processor can identify an optimal low power configuration of the system (ie, an optimal set of low power 50 resource modes) to implement in a state of inactivity and / or low power particular. When an idle and / or idle task is initiated to place a processor in a low power state in block 26, the processor can identify those resources that can be placed in a low power resource mode by checking the resource mask of low power for resource mode indicators of low resource power. In block 28, the processor can check the LPM masks for low power resource mode indicators to identify the resources that can be placed in a low power resource mode. In block 30, the processor can check the latency requirements of active clients, tasks or subsystems that are executed in the system. For example, the processor can access a defined data structure for a customer and use that information to determine a latency budget. The latency budget can define the total latency that the system may contain during an activation from a state of low system power. 60

[0049] In one aspect, the latency budget can be defined as the minimum of all acceptable latencies for all concurrent clients and processors, or the worst case latency, or the strictest latency. For example, it may be necessary for a USB resource connected to a main device to respond within 1 millisecond when the main device initiates a communication with the USB. In this example, the requirement of 65 latency of the main device is 1 millisecond. Therefore, when the system is idle, the processor may

You cannot deactivate resources, or any combination of resources, that require more than one millisecond to activate again. This is because, at any given time, the main device may issue an interruption to reactivate the system, requiring that the resources return to a functioning state capable of handling the requested task. That is, the system is limited to implementing low power resource modes that do not require, together, more than 1 millisecond to exit when the main device emits an interruption. If, at some future time, the USB is disconnected from the main device, the response time of 1 millisecond is no longer necessary because USB is no longer a task that is being performed. In this circumstance, the worst case latency could change to some other value (for example, 5 milliseconds) because there may be some other task that has been running all the time with a higher latency requirement. Therefore, in the various aspects, the latency requirements can be a dynamic property depending on the state of the system that can be evaluated at that time, so that a low power mode configuration of the system can be determined based on the Current operating status requirements. In addition, low power resource modes can have their own latency requirements, as well as interdependent latencies. Therefore, in certain situations, you cannot enter all available low power resource modes to enter. This is because the entry into certain low power resource modes can result in a total system latency that violates the worst case latency requirements of the current operating state.

[0050] Returning to FIG. 4, in block 32, the processor can check the resource definition data for the idle input latency times of the mode and inactivity output for the various low power resource modes. In block 34, the processor can determine the expected downtime (that is, the duration in which the processor is expected to remain in the idle state before an activation event given the current conditions and operating status ). In block 36, the processor can determine the conditions of the current state, such as access to a data record that stores the current temperature and other sensor values. Using the current status and low power resource mode data collected in blocks 28-36, the processor can execute a "solver" function to identify an optimal low power configuration in block 38. The solver function You can use a number of different approaches to balance the various considerations necessary to identify an optimal acceptable low power configuration, some examples of which are described below with reference to FIG. 7-10. As part of one or more of blocks 28-38, the processor can calculate the potential energy savings that can be expected for each low power resource mode and every 30 combination of low power resource modes, such as calculating the savings of potential energy per unit of time at a current temperature (and other operating conditions) multiplied by the expected downtime, and use this value as part of the solver process in block 38. Once an optimal configuration has been identified low power, one or more low power resource modes are selected for each resource, task and / or subsystem, the processor can enter that low power configuration 35 in block 40, making each low power resource mode selected execute an associated input function. The system will remain in this idle state and / or low power state until an activation event occurs, such as a timer interrupt. When an activation or interruption event occurs, the processor and associated resources will exit the idle state in block 42, such as executing a series of output functions for each of the resources in low power resource modes 40 that return these resources to their normal operating state.

[0051] In the various aspects, there may be a known activation event that is associated with the timer sub-system that is known directly in block 42. The various aspects may also include an activation resource that allows customers to " suggest "that they believe an activation event will occur within a certain time. In several aspects, the system may include mechanisms that predict and / or control how long the resources and / or processors can remain in a given state of rest. In these aspects, the processor can postpone certain events to control how long the resources can wait to be at rest. In several respects, there may be a rigid activation point where resources are forced to activate. In several respects, the system can use the "suggestions" of the resources to determine an expected activation time period 50. The various aspects can implement predictive algorithms that can be used by the processor to estimate the most efficient activation time. The various aspects can use a combination of a rigid limit, suggestions and learning mechanisms to determine the expected activation time. The various aspects can use the expected activation time to determine how much energy would be saved if the various resources are placed in low power resource modes up to the determined expected activation time. Such expected energy savings can then be used in the process of selecting particular resources to place in a low power mode (i.e. select low power resource modes) to implement in a low power mode configuration of the system to an impending rest cycle.

 60

[0052] The various aspects can use both the sum of energy savings and the cost of energy to extract resources and put them back into operation to determine a power function. The various aspects can use the power function to determine which resources, if any, should be placed in a low power resource mode. The various aspects can also use the power function to determine the net energy savings associated with each of the potential low power configurations of the system provided by various combinations of low power resource modes.

implemented Different aspects can calculate net energy savings as the amount of energy saved over a calculated period of time, offset by the amount of work required to place the various resources in a low power resource mode and return them to an operating mode . In several aspects, the net power savings can be calculated using a function that uses a simple linear polynomial module, which has an expected downtime X with a slope M and a displacement B, in which the calculation energy savings are MX + B. Different aspects can calculate net energy savings periodically based on values stored in configurable system parameters.

[0053] In several respects, net energy savings can be tabulated for each resource. That is, the various aspects can pre-calculate a table containing the various net energy savings associated with each of the available low power resource modes. The various aspects can also generate a tabulated list on the fly, continuously or periodically, according to values stored in configurable system parameters. In several respects, the boundaries between decisions can be stored in a table and consulted when a determination is made of what potential low power configuration of the system is best suited to the current needs of the system and the operating status. For example, the system may store information indicating a number of preferred low power configurations based on time (e.g., preference for mode A to time X, preference for mode B to time Y, preference for modes A and B).

[0054] In various aspects, the LPM indicators are not restricted to regulating a resource explicitly, because the dependency checking process can be taken to the level at which the low power resource modes are selected to define a configuration of Optimal low power mode of the system. For example, suppose resource "A" has two low power resource modes "1" and "2". Since both modes "1" and "2" are of the same resource, they can share a common LPM mask bit that indicates that the resource can be put into a low power resource mode. Therefore, in this example modes "1" and "2" depend on bit 25 "A" within the LPM mask, and bit "A" is controlled by the NPA resource controller for the resource. However, there may be an additional complication in that mode "2" could be a specialized form of mode "1" that has a dependency that resource "A" may become at rest (ie not be used by no client or processor) and resource "B" can also become idle. In other words, the low power resource mode "2" of the resource "A" may depend on the resource "B" also being set to a low power mode. Therefore, in this example, mode "2" will depend on the LPM mask bits of both resources "A" and "B". Therefore, in this example, the LPM indicators do not explicitly regulate the resource due to the "2" mode dependency.

[0055] To illustrate static and dynamic dependencies, consider the example of a voltage regulator resource 35 that provides power to a clock controller resource and some other diverse hardware resource. The voltage regulator can have two modes of operation: normal and low power (that is, its low power resource mode). Putting the voltage regulator in a low power state can reduce the amount of power overload consumed by the voltage regulator, resulting in a globally lower system power demand. However, if more power is extracted from the voltage regulator than is allowed in its low power mode, the voltage regulator could fail and potentially damage the device hardware. For example, the clock controller may consume more power than the voltage regulator can provide in its low power mode. In this case, the voltage regulator may have a static dependence with respect to the clock controller (i.e., the clock must be able to be deactivated), and another static dependence with respect to the other diverse hardware (i.e., the miscellaneous hardware must be deactivated). In addition, the voltage regulator may have a dynamic dependence: as long as the clock controller remains activated, there will be too much power extracted from the voltage regulator to enter a low power mode. As soon as the clock controller is deactivated, then there will be no load on the voltage regulator and it will be able to enter a low power mode. Therefore, the deactivation mode of the clock controller is a dynamic dependence of the low power resource modes of the voltage regulator. fifty

[0056] As discussed above, while static dependencies can be predicted with some degree of certainty, dynamic dependencies are difficult to determine in advance. In addition, dynamic dependencies become exponentially more complex as the number of components and / or resources increases. In several aspects, a solver process is used to manage the various dynamic dependencies. In several aspects, an inactivity task is used to manage the different dynamic dependencies.

[0057] Operations of various aspects are illustrated in FIG. 5, which shows an illustration of resource graphs and programming nodes. FIG. 5 illustrates an operating state in which three clients 50, 52, 54 60 are active and three resources are available to be placed in a low power resource mode, specifically memory 70, a clock oscillator 78 and a rail of voltage 76. In this illustration, the processing nodes 58, 69, 70, 72, 74, 76 and 78 represent processes that are traversed when the system is ready to enter a low power resource mode by executing an idle task 60 Instead of probing the clients 50, 52, 54 with respect to votes, said process is eliminated and replaced by a resting client 65 that runs through the node diagram to put the system in a low power state. based on a

low power setting. In this illustration, client 1 50 (which was using the memory) releases the memory, as indicated by the arrow to node 70, and sets the appropriate low power resource mode enable bit in the LPM mask. Similarly, the client 2 52 can release the voltage rail resource and the clock as indicated by the arrows to nodes 74 and 76, which set the appropriate low power resource mode enable bits in the LPM mask . When the client 3 54 releases the processor as indicated by the arrow to node 69, the processor can execute the idle task 60 by checking the LPM mask, checking the latency of the system and checking the expected downtime before executing a process of low power mode solver 66. After the full graph has been traversed, idle client 64 can invoke the "input" functions of the low power resource mode with the set of active modes of low power resources selected for resources based on the current dynamic conditions given.

[0058] FIG. 6 illustrates a process node and a graph of similar resources for another aspect procedure. This aspect procedure provides the additional benefit of eliminating the path of the processor graph from the idle timeline. As illustrated in FIG. 6, the processor dependencies (illustrated by arrow 48 in FIG. 5) can be omitted in the process node chart by allowing the processor resources to use a special API to directly interact with the resource mode masks of low power. FIG. 6 also illustrates that the LMP mask 80 (illustrated in FIG. 5) can be replaced by an LPM mask for a low power state 90 of the system, an LPM mask for a low power idle state 92 and an LPM mask for a low power state 94. In this aspect, the resources available to be placed in a low power resource mode (for example, memory 70, clock oscillator 78 and voltage rail 76) can directly establish (the bit of) LPM enable and / or (the bit of) disable LPM in the LPM mask for a low power state of the system 90. When a client 3 54 releases the processor as indicated by the arrow to node 69 , the processor can execute the idle task 60 by checking the LPM mask for the low idle power state 92, checking the latency of the system and 25 checking the expected downtime. The low power resource mode "input" functions 86 of the idle task 60 can be invoked with the set of active low power resource modes selected for the current dynamic conditions given through the LPM mask for a state of low power 94.

 30

[0059] In an example aspect, low power resource modes can be implemented as a series of bit vectors. For example, there may be bit vectors for: the low power state of the system (ie, the currently active low power states due to the use of resources and clients outside the context of the client's path); the low power idle state (that is, the low power mode states currently active due to dynamic system conditions discovered in the idle task, such as latency and expected downtime); debugging / introduction conditions (for example, through non-volatile or similar elements); and one bit for each dependency of the main processor node. The default state for each bit can be the low power resource mode disabled. Clients that establish resource use requirements by transiting the node chart illustrated in FIG. 5 or 6 can cause any of the low power bits to be enabled, thereby allowing a particular resource to be placed in a low power resource mode. In one aspect, the inactivity task can collect data on other factors, such as dependencies between modes, latency, expected downtime and temperature, and set its own bit mask. In this aspect, which is not shown in the figures, the final LPM mask configuration can be determined by a bitwise addition of the system and inactive masks.

 Four. Five

[0060] In various aspects, a series of mechanisms can be used in the low power resource mode selection solver to identify an optimal set of low power resource modes based on the conditions and operating status. current. In general terms, the problem of selecting the optimal set of low power resource modes is a form of the "backpack problem" which is a well known problem in combinatorial optimization. A variety of heuristic solutions or 50 known algorithms for the backpack problem can be implemented in the low power resource mode selection solver. Such procedures may involve logical tree algorithms if / then / otherwise, a table search algorithm and comparison procedures that function systematically through the permutations and alternative combinations of alternative low power resource modes of different resources. 55

[0061] By way of example, FIG. 7 illustrates an aspect procedure 38a for selecting an optimal set of low power resource modes working through the various resources and alternative modes of low power resources. The procedure 38a can be performed as part of the procedure 24, described above with reference to FIG. 4 and, therefore, it can be assumed that the bitmaps and features 60 of low power resource mode have already been accessed, including potential energy savings, output latency time and dependencies. To evaluate all low power resource modes of all resources that can be placed in a low power resource mode, at the time of the current idle state, the processor can incrementally select each resource for which an LPM indicator is enabled in block 100 and then incrementally select each low power resource mode for the resource selected in block 102. The way in which the indicators set in the LPM mask are checked may vary.

depending on the implementation and interdependencies of the various resources. In one implementation, the processor can check the indicators in the LPM mask and not consider any of the low power resource modes for that resource if that bit is not set. For example, if the processor knows that all resource "A" low power resource modes require that bit "A" be set, the processor can check for the existence of bit "A" in box 100 and not consider any of the low power 5 resource modes for that resource if that bit is not set. However, the processor may still need to check the LPM mask in block 102 because some low power resource modes for the selected resource may require additional resource bits to also be set (or not set) according to their dependencies. Therefore, in one aspect, before selecting a particular low power resource mode for a resource selected in block 102, the processor can check whether other resource 10 LPM indicators that are required by a low power resource mode They also conform to the required values.

[0062] In a further aspect, as may be applicable for use with virtual resources, the determination of whether a resource is available to be placed in a low power resource mode may depend on 15 LPM indicators set for other resources. For example, if there is a virtual resource "C" for which low power resource modes "3" and "4" are defined, it could be that the availability of low power mode '"3" depends on the LPM mask bit for resource "A" while the availability of low power mode "4" would depend on the LPM mask bit for resource "B". Therefore, in this example, the availability of placing virtual resource "C" in a low power mode explicitly depends on a bit of LPM mask for resource 20 "C", since it is a virtual resource that enters one of the low power modes "3" or "4" depending on the status of resources "A" and "B". Therefore, in one aspect, the processor can select resources for evaluation considering the LPM mask bits in both blocks 100 and 102.

[0063] In the determination block 104, the processor can compare the low resource mode latency of selected resource power with the latency budget (which is determined in step 30 described above) to determine whether the resource mode Low power would be compatible with the latency requirements of the current system. If the output latency of the selected low power resource mode of the selected resource exceeds the latency budget (ie, determination step 104 = "No"), the processor can determine whether there is another low power resource mode for the resource selected in the determination block 112. If, on the other hand, the output latency of the selected low power resource mode of the selected resource is within the latency budget (ie, the determination step 104 = "Yes "), the processor can add the energy savings associated with the selected low power resource mode to the energy savings for the selected mode to obtain new net savings (ie, estimated energy savings for the low power configuration which includes the low power mode being evaluated) in step 106. In other words, the projected energy savings of the low power resource mode s selected can be added to the energy savings of other recourse low power resource modes that have already been evaluated to determine net energy savings that would be provided by the set of low power resource modes including the resource resource mode. low power of particular resource being evaluated. In one aspect, the projected energy savings for each low power resource mode can be determined as the product of potential energy savings per unit of time (or as a function of time) at a current temperature (and / or other conditions). of operation) multiplied by the expected downtime, or some function. In the determination block 108, the processor can compare the sum obtained in block 106 with the total energy savings of a better previously selected set of low power resource modes to determine whether to include the low power resource mode 45 of Selected resource results in greater energy savings. If the combination that includes the selected resource low power resource mode results in greater energy savings (ie, determination block 108 = "Yes"), the computing device may include the low power resource mode selected for the resource in the selected set of low power resource modes in block 110. 50

[0064] If the combination including the selected resource low power resource mode results in less energy savings (ie, determination block 108 = "No"), the processor can determine if there is another low resource mode power for the selected resource in the determination block 112. If there is another low power resource mode associated with the selected resource (ie, the determination block 112 = "Yes"), the processor may return to block 102 for Select the next low power resource mode for evaluation. If all the low power resource modes of the selected resource have been evaluated (ie the determination block 112 = "No"), the processor can determine if there is another resource that can be placed in a low power resource mode in the determination block 114. If there is another resource to be evaluated (ie, the determination block 114 = "Yes"), the processor may return to block 60 100 to select the next resource for the evaluation. Once all the resources have been evaluated (that is, the determination block 114 = "No"), the algorithm should have identified an optimal set of low power resource modes to implement, so that it can proceed to implement the selected set of low power resource modes, with reference to FIG. 4 and block 40.

 65

[0065] While a combinatorial calculation algorithm, such as that illustrated in FIG. 7, may be able to

To identify an optimal set of low power resource modes for a given operating condition, such calculations may be computationally too difficult to implement, particularly when the expected downtimes may be only a few milliseconds and the number of resources is large. Therefore, in several aspects, approximate solutions to the backpack problem and solutions that can be determined beforehand can be implemented. An example of a solution that can be determined by processor 5 before a rest cycle is one that uses a search procedure in the table. In a search procedure in the table, the processor can calculate the performance of several low power resource modes at runtime (ie, not defined in advance by a developer), in terms of expected downtime, temperature, Current system configuration and other parameters. The results of these calculations can be provided in the form of a table or graph that can be used by the processor to quickly identify an approximately optimal set of low power resource modes at the time of a standby cycle.

[0066] FIG. 8A illustrates a one-dimensional graph of three alternative sets of low operating power configurations 120, 122, 124 plotted in terms of energy savings versus expected downtime. As shown in the graph, the three alternative low power configurations can produce different relative energy savings at different intervals of expected downtime. FIG. 8A illustrates that the alternative low power configuration 120 initially results in negative energy savings (for example, from the start of idle time to the time indicated by arrow 126), but positive energy savings later. Thus, between the start of a processor idle cycle and the time indicated by arrow 126, only the low power configurations 122 and 124 produce energy savings, as indicated by item 128. FIG. 8A also illustrates that, in the period between the start of a rest cycle and the time indicated by arrow 126, the low power configuration 122 would provide greater energy savings than the low power configuration 124. From the time between the arrow 126 and arrow 130, the three low power configurations would produce positive energy savings, with the low power configuration 25 122 providing the greatest potential energy savings, followed by 124 and 120, respectively. This is illustrated by element 132, which shows that the low power configuration 122 has energy savings greater than 124, which in turn has energy savings greater than 120. In the time interval between arrow 130 and the arrow 136, the three low power configurations provide positive energy savings, with the three alternatives that provide potential energy savings of the order of 122, 120 and 124, as indicated by item 134. After the time indicated by the arrow 136, the three alternatives have potential energy savings of the order of 120, 122 and 124, as indicated by item 138.

[0067] In the aspect illustrated in FIG. 8A, the processor can determine a prioritized order of low power alternative configurations using the expected downtime as a search value. Although FIG. 8A illustrates this aspect in a two-dimensional graph (that is, energy savings versus expected downtime), the aspect procedure can be implemented with a multidimensional graph, including parameters such as temperature, latency, etc. In one aspect, the processor can use known three-dimensional graph analysis algorithms to identify an approximately optimal low power configuration 40 or a priority order of configurations based on multiple parameters. Again, such graphic representation can be performed by the processor at runtime, and not defined in advance by a developer.

[0068] Although the pre-calculation reduces the work required in the search process, the number of transition points increases along with the number of different low power modes (which is linked to the number of 45 different resources) and the number of dimensions (that is, the parameters used to select the optimal configuration of the low power mode of the system). In such cases, the space required to store such a search table may become prohibitive. Therefore, in a further aspect, heuristics can be used to consolidate different regions of the search table to reduce the number of discrete regions that need to be tracked, thereby reducing the size of the search table. FIG. 8B shows an example aspect in which the classified order of the low power configurations can be presented in the form of one or two alternative classification lists (illustrated by 140) in some regions of input parameters (for example, the region between arrows 126 and 136). FIG. 8B illustrates that consolidation of different regions can produce suboptimal results for some sets of conditions. For example, in the time region between arrows 126 and 136, the optimal results for the area closest to arrow 126 differ from the 55 optimal results for the area near arrow 136. To reduce the impact of these suboptimal results In several respects, the processor may place the incorrect classifications in regions that are relatively uninteresting. Regions can be classified as uninteresting if they describe conditions that are rare (for example, extreme temperatures). In several respects, the processor can determine that suboptimal results are acceptable by evaluating the error in the non-optimal classifications, and determining that the 60 errors are minimum or lower than a certain set threshold. The development of such heuristic rules can be performed by the processor at runtime, and not defined in advance by a developer.

[0069] As an extension of this aspect, the processor can collect statistics on what conditions the device experiences most frequently, and recalculate the search tables, as described more fully below, to customize the tables to the conditions most frequent experienced by the

concrete computing device For example, a cell phone used in Alaska can calculate a search table that allocates more of its table space to regions of cold temperature compared to a cell phone used in the Sahara. This aspect allows each computing device to make low power configuration decisions that are optimized to their typical conditions in terms of both environment (i.e. temperature) and measured usage patterns (e.g. expected downtime). 5

[0070] FIG. 9A illustrates an aspect procedure 38b for implementing a search procedure in the table for the solver process described above. In the procedure 38b in block 150 the processor can use the parameters determined in blocks 28-36 (as described above with reference to FIG. 4) to select a low power configuration. As mentioned earlier, in one aspect, this search process in the table may involve the use of a 3-D assignment analysis algorithm. Once an optimal low power configuration is identified, the processor can enter the mode selected in step 40 as described above.

[0071] FIG. 9B illustrates an alternative aspect procedure 38c for implementing a table search procedure that provides a classified list of alternative configurations for further evaluation. In procedure 38c in block 152, the processor can use the parameters determined in blocks 28-36 (as described above) to obtain a classified list of alternative low power configurations based on potential power savings. In block 154, the processor can select a low power alternative configuration of higher classification for evaluation. In block 20 of determination 156, the processor can determine whether the mode output latency of the selected configuration is less than the maximum acceptable system latency. If the latency of the selected low power configuration satisfies the system requirement (ie, determination block 156 = "Yes"), the processor may enter the mode selected in step 40 as described above. If the latency of the selected low power configuration does not satisfy the system latency requirement (ie, block 25 of determination 156 = "No"), the processor can select the following low power configuration for evaluation. This process can continue until all unacceptable low power settings are removed or until one or more low power settings that meet the system's latency requirements are identified. If all low power settings are eliminated or no satisfactory low power settings are identified, the processor can determine whether it should enter a low power setting or remain in an operating state based on the expected energy savings available, the operating requirements and other factors described above.

[0072] The search solver approach in the table described above can provide a flexible data-based approach for the elimination of the low power settings of the system and the identification of one or more optimal low power configurations that can be calculated. relatively quickly. However, in certain situations, this approach may not be able to identify an optimal low power configuration in all operating states and conditions, since it is based on calculations made in advance. FIG. 10 illustrates an alternative aspect procedure 38d that can be implemented to make use of both the combinatorial calculation algorithm procedure and the search procedure in the table depending on the expected downtime. In the determination block 160 the processor determines whether the expected idle time is going to be long enough (ie, longer than a predetermined threshold) to justify the calculation time required to directly determine an optimal configuration, or if a faster table search procedure. If the processor determines that the expected idle time exceeds the threshold and thus justifies the additional calculation time required to complete the most rigorous solver algorithm (ie, the determination block 160 = "Yes"), the processor can perform the algorithm described above with reference to FIG. 7 to determine the optimal low power configuration to be implemented in block 40. On the other hand, if the processor determines that the expected idle time is less than the threshold (ie, the determination block 160 = "No"), The processor can perform the search procedure in the table described above with reference to FIGs. 9A or 9B. In this way, the computing device can have the benefit of both solver procedures depending on how long the processor is expected to remain in the idle state.

[0073] In one aspect, the computing device may occasionally recalculate the search tables used in solver to determine an optimal low power configuration for a range of conditions 55 and states in order to make use of the information. statistics collected in relation to the operation of the computing device. By periodically recalculating the characteristics of the search tables, this aspect allows the computing device to learn from its current and past operations to better optimize the potential energy savings obtained by future low power configurations. To calculate the search tables, the computing device can be configured to assess the relative energy savings that can be achieved for each of the various operating conditions (e.g., different temperature conditions and different customer and application states) and each of the different resources and modes of low power of resource. Such calculations may be similar to those described above with reference to FIG. 7, and can be performed by the processor for a series of different configurations and temperature and other values of system operating conditions. 65

[0074] In several aspects, the computer device processor may be configured to calculate the search tables as a background task. That is, since the calculations are likely to involve a significant amount of processing, they can be configured to be carried out when the processor is not involved in performing higher priority operations. For example, the computing device may be configured to perform the calculations when one or more processors would otherwise be in a state of inactivity. Since such calculations probably consume significant power, the computing device can be additionally configured to perform these calculations only when the device is plugged into external power (for example, when charging the battery) and, therefore, when the power conservation is not It is a functioning priority and energy consumption is not a problem.

 10

[0075] FIG. 11 illustrates an aspect procedure 178 for calculating the search tables when the computing device is connected to an external power supply. In procedure 178 in the determination block 180, the processor can determine if the device is connected to an external power when the processor enters an idle state. If the processor determines that the device is not connected to an external power supply (ie, determination block 180 = "No"), the processor can perform the processes described above with reference to FIGs. 4 and 9A to identify an optimal low power configuration and enter the set of low power resource modes that constitute the low power configuration in block 40. If the processor determines that the device is connected to an external power supply (it is that is, block 180 = "Yes"), the processor can perform the calculations necessary to update the search tables. In block 182, the processor can select a particular operating state and condition 20 to calculate the optimal low power configuration. In block 184, the processor can select a first resource for evaluation, and in block 186, select a first low power resource mode for the selected resource. In block 188, the processor can determine the total resource latencies of a low power configuration that includes the selected mode using the latency of the selected low power resource modes. In block 190, the processor may add the energy savings associated with the selected low power resource mode to the energy savings associated with a selected set of low power modes to obtain a new mode energy saving.

[0076] In the determination block 192, the processor can determine whether the new mode energy savings exceed the savings of a previously selected low power configuration. If the selected low power resource mode 30 results in an increase in energy saving (ie, the determination block 192 = "Yes"), the processor can use the selected low power resource mode in a configuration provisional low power in block 194. Then, or if the selected low power resource mode does not result in an increase in energy savings (ie, the determination block 192 = "No"), the processor can determine if there is another low power resource mode associated with the resource 35 selected in the determination block 196. If there is another low power resource mode associated with the resource (ie, the determination block 196 = "Yes") , the processor may return to block 186 to select the next low power resource mode for the selected resource. If all the low power resource modes have been evaluated for the selected resource (ie the determination block 196 = "No"), the processor can determine if there is another resource to be evaluated for the conditions currently selected in the block 40 of determination 198.

[0077] If the processor determines that there is another resource to be evaluated (ie, determination block 198 = "Yes"), the processor may return to block 184 to select the next resource for evaluation. If the processor determines that all resources have been evaluated for the currently selected conditions (ie, the determination block 198 = "No"), the processor can update the selection table with the potential low power configuration, including values for the potential savings determined in block 190 and the latencies of the various low power resource modes determined in block 188. The processor can then determine if there is another condition to be evaluated in the determination block 202. If the processor determines that another condition has to be evaluated (ie, the determination block 202 = "Yes"), the processor 50 may return to block 182 to select the next condition to be evaluated. Once all the conditions have been evaluated and the search table has been updated accordingly (ie, the determination block 202 = "No"), the processor can continue with normal inactivity processes appropriate for the current condition (including being connected to an external power supply) in block 204.

 55

[0078] In a further aspect, the processor may be configured to take note of the operation statistics in order to adjust the parameters used to determine the optimum low power setting. As illustrated in FIG. 12, in the aspect procedure 210 in block 212, the processor can observe the low power configuration implemented, the estimated idle time used in the determination of the low power configuration and the start time of the low power configuration . When the processor leaves the low power configuration (that is, it activates), the processor can take into account the moment when the processor leaves the low power configuration, the necessary resources and the processor or client it requires the resources that caused the activation event in block 214. In block 216, the processor can use the information obtained in block 214 to calculate or refine statistics regarding the time of inactivity of resources for the resource, processors, clients and / or low power configuration 65 individuals. These statistics can refer to how much accuracy the downtime tends to estimate

expected, such as generating a correction factor, identifying the processors or particular clients that initiate activation events and identifying the idle time characteristics of particular low power configurations. In block 218, the processor can update the resource mode data parameters of low resource power with probabilities or correction factors for latencies, expected downtime estimates or adjusted energy savings based on usage statistics calculated in block 5 216. In this regard, a wide range of statistics can be collected with respect to the typical operations of the computing device, the resulting information being used to allow the solver module to better determine the most suitable low power configuration. In this way, the computing device can be adapted to its typical conditions of use and operation in order to further optimize the power that can be saved by implementing low power resource modes and / or low power settings. 10

[0079] In several aspects, a processor may be able to use the statistics regarding normal operation of the different processors in order to select low power configurations that produce greater energy savings on average than the configuration of another mode would be selected based on the resource parameters and the operating status of the processor. This can be clarified by referring to an example in which, for a given period of inactivity, a processor A can choose between low power mode for resource S (shared resource) or resource L (local), but has requirements for dynamic latency that does not allow entering both low power modes (that is, for this particular period of inactivity, the modes are mutually functionally exclusive). In absolute terms, resource S would save more energy by placing resource S in a low power state, but there is a non-zero probability that processor B 20 requires resource S during processor idle time A. Depending on how much time resource S is used by processor B, the optimal low power state for processor A could be to enter a low power resource mode for resource L, although in theory it saves less energy. To take this into account, the power model for resource S could be disqualified by the probability that it will be globally inactive, given that processor A is inactive while processor B is not. That is, instead of the calculation 25 of the power model for resource S being power_model (idle, temp), the calculation can be converted to E [power_model (idle, temp) | Proc A idle]. In several aspects, the probability distribution for the calculation of the expectation can be statically defined, either by domain, by profile or empirically determined at runtime by collecting actual usage statistics.

 30

[0080] The process of applying learning algorithms to gather statistical information regarding the conditions, performance, durations, and other features related to the application and performance of low power configurations can be applied in general to allow the performance of Energy savings of low power configurations are optimized to the characteristics of a particular computing device, as well as to the usage patterns of a particular user. To carry out such learning, the processor can perform statistical analysis algorithms using the various data obtained from low power mode operations to adjust mode selection procedures, resource performance values and otherwise adjust the implemented algorithms. in the solver to reflect the information obtained from the supervision of the device operations.

 40

[0081] In an additional aspect procedure 220 illustrated in FIG. 13, a processor can be configured to collect statistics on the actual energy savings achieved by various low power configurations to base the mode selection on the actual power consumption characteristics of the device. In block 222, the processor can take into account the particular low power configuration to be accessed, the temperature of the device, the expected idle time and the time at the beginning of a state of inactivity. In block 224, the processor can measure and store the actual power drain through the system when it has entered the selected low power configuration. This measurement can be performed at the beginning of the low power state, during the entire idle cycle, or at the end of the idle cycle, as part of the process of exiting the idle state. In step 226, the processor may take into account interrupt activation and / or timer activation at the end of the low power state. In block 228, the processor may update the low power resource resource mode data parameters and / or the low power resource mode selection table to reflect the actual energy savings achieved in the low power configuration. particular power at the current temperature based on the information collected in block 222-226. In block 230, the processor can calculate or update statistics regarding the distribution of interruptions and timer activations and use this information to update the selection table of low power resource mode in block 232. In this way, the Parameters used by the processor to select the optimal low power configuration based on the configuration data and operating condition can be refined based on the actual performance of the device. The energy savings that can be obtained in various low power resource modes may vary depending on temperature, production, age, specific component configuration and many other factors that cannot be anticipated 60 in advance. In addition, this aspect allows the processor to refine the calculations or low power resource mode selection tables used to select inactivity operating configurations based on actual use. Therefore, if a computing device typically experiences cold temperatures (for example, the owner of the computing device resides in Alaska), the low power resource mode selection table can be refined to provide greater granularity within the temperature range typically 65 experienced by the computing device, instead of trying to cover the entire potential temperature range

that the device could experience elsewhere. Thus, this aspect procedure allows the processor to determine an optimal low power configuration based on the actual operating characteristics of the device at the time and under the operating conditions.

[0082] In an additional aspect procedure 240 illustrated in FIG. 14, a processor can measure the 5 energy saving characteristics of each low power resource mode (i.e., each low power mode of each resource) by selectively implementing each mode and measuring the resulting change in current or power demand . By measuring the actual power savings achieved by each low power resource mode, the computing device can collect useful statistics to select an optimal low power mode configuration of the system. Since configuration changes and the age of the device can affect the energy savings achieved by particular low power resource modes, this procedure allows the computing device to make low power configuration decisions based on the configuration and operating conditions. current that may have changed since the device was manufactured. Such measurements can also be made at different temperatures in order to obtain or update information on the temperature sensitivities of the potential energy savings of the various low power resource modes.

[0083] Referring to FIG. 14, in procedure 240 in block 241, when the processor of the computing device determines that it is in a known stable state and in an operating condition that is conducive to the measurements, the processor can measure the temperature of the device and the demand of 20 current or power using sensors included in the device. In this block, the processor can measure other operating conditions that can influence the energy savings achievable with each low power resource mode. In block 242, the processor can select for measurement a resource that has a low power mode. In block 243, the processor can place the selected resource in a selected one of its low power resource modes. In block 244, the processor can then measure the system's current or power demand with the low power resource mode implemented. In block 245, the processor can calculate the energy savings achieved by placing the selected resource in the selected low power resource mode. This can be achieved by subtracting the power measured in block 244 from the initial power measured in block 241. In the determination block 246, the processor can determine if there is another resource to be measured. If so (ie, the determination block 246 = "Yes"), the processor may return to 30 block 242 to select the next resource for measurement. Once all resources have been selected and the corresponding low-power resource mode energy savings have been measured (that is, block 246 = "No"), the processor can use the measured energy savings to update the selection table Low power mode in block 247. The updated low power mode selection table can be used to select a low power mode setting of the system the next time the processor enters a standby cycle. In one aspect, procedure 240 may be repeated periodically, especially when the processor observes that the system temperature is different than in a previous measurement process. By measuring the energy savings achieved by each of the low power resource modes at different temperatures, the processor can calculate or estimate temperature sensitivities of potential energy savings of each low power resource mode by analysis 40 well-known arithmetic, such as curve fitting algorithms. Such temperature sensitivities can then be used in the process of selecting low power resource modes that will be implemented in a low power mode configuration of the system.

[0084] The various aspects provide a number of useful benefits to users and developers beyond 45 of simply saving additional battery power. As an advantage, the low power resource modes of various resources and their definitions are mostly independent of the code that implements the modes. Relevant controller calls can be included within the "input" and "output" functions, so the low power resource mode is not affected. The solver process (i.e. block 38 in the procedure 26 described above) can be responsible for determining when the low power resource mode should be entered or exited based on reliable data, such as power and latency data of each low power resource mode and dynamic constraints (e.g. latency requirements) and operating conditions present in the current operating state. Therefore, the developer does not have to attempt to provide combinations of such parameters in order to properly encode the appropriate low power resource modes in the device. 55

[0085] Another advantage of the aspects described above is that the computing device is not required to select a single low power resource mode defined from a pre-configured or predefined set of system modes, but can select a combination of Low power resource modes to dynamically implement a low power configuration for the system based on the current operating status, resources, operating condition, estimated idle cycle, device configuration, etc. This is advantageous because the above known power management systems are configured to select from a set of predefined low power configurations (for example, one of mode 1, mode 2 or mode 3), while the aspects described above allow a device dynamically select one or more low power resource modes for each available resource to enter 65 in a low power mode, providing greater flexibility to implement low power settings

system power that best suits current conditions and conditions. For example, suppose a particular processor has three resources A, B and C that have low power resource modes A ', B' and C 'respectively. The low power resource modes may have different latencies, as the low power resource mode A 'may have 0.4 ms latency, the low power resource mode B' may have 0.5 ms latency and the Low power resource mode C 'may have 0.6 ms latency. If a USB client is active so that there is a latency requirement of 1 millisecond in the system (for example, an allowable worst case latency of 1 ms), the low power modes of resources A, B and C can be enabled or disabled independently of each other as long as the combination of the selected low power modes meets the worst case latency requirement. For example, if the processor enters an idle state and resources A, B and C are all enabled, the system can select the low power resource mode A '(0.4 ms of 10 latency), the mode of low power resource B '(0.5 ms latency), low power resource mode C' (0.6 ms latency), modes A and B (0.9 ms latency) or modes A and C (1 ms of latency). Therefore, in the various aspects, a solver task can choose the best set of low power resource modes to save the most energy given the worst case latency tolerance of 1 ms.

 fifteen

[0086] In addition, typical power management systems require customers to have an inactive mode and an active mode, and latency tolerance depends on a current performance status. In the various aspects described above, customer mechanisms may be "present" or "not present" instead of "active" or "inactive". That is, in the various aspects, the various low power resource modes can be traversed to eliminate possible states, instead of being selected based on an operating state 20 (for example, active or inactive). In addition, the various aspects allow customers to create, register and / or ignore low power resource modes for the various resources and dynamically select a combination of low power resource modes to allow a large number of possible low power configurations of the system. This allows system customers to additionally control and fine tune the low power states of the device. 25

[0087] Another advantage of the aspects described above is that the computer device processor does not need to know the different modes of operation of the clients of the system. In various aspects, customers can directly send only their latency tolerance. As such, the processor does not need to know the various details associated with the operating states of each client. The processor only needs to know the registered latency tolerances of the customers and select the low power resources to enter a low power resource mode based on the indicated latency tolerances. In various aspects, the adjustment of tolerances and low power modes can be by discrete entities. For example, a USB client may establish a latency tolerance, but not necessarily a low power mode. Each low power resource mode may have a set of signaling mechanisms to indicate whether they can be entered in any idle cycle since it is completely independent of the latency consideration.

[0088] As an additional advantage, a new NPA programming node can be provided in one aspect to allow customers to specify the time they expect to be at rest. For example, NPA programming node 40 / "core / processor / activation" can be provided to allow customers to specify that they expect to be at rest (that is, without using the processor or resources) for no more than "X" microseconds (up to 71 hours). Such programming capability can simplify the development of client applications for compatibility with inactive processor states and low power configurations.

 Four. Five

[0089] In a further aspect, the results of the solver calculations, such as those described above with reference to FIG. 7, perhaps cached so that the optimal low power configuration can be reused without having to redo the solver algorithm when the same or similar operating conditions (for example, operating status, temperature and restrictions of latency) are present at the moment when you can enter a state of inactivity. In this way, the processor can quickly access the idle state by omitting the process of performing the solver algorithm, while obtaining optimal or almost optimal energy savings. In a further aspect, the conditions and the operating status can be statistically analyzed so that the optimal low power configurations stored in cache memory can be related to statistically determined condition ranges and conditions. 55

[0090] Typical mobile devices 250 suitable for use with the various aspects will have in common the components illustrated in FIG. 15. For example, an exemplary mobile receiving device 250 may include a processor 251 coupled to internal memory 252, a screen 253 and a speaker 259. Additionally, mobile device 250 may have an antenna 254 for sending and receiving electromagnetic radiation that connects 60 to a mobile multimedia receiver 256 coupled to processor 251. In some aspects, mobile multimedia receiver 256 may include an internal processor 258, such as a digital signal processor (DSP) to control the operations of receiver 256 and communicate with the device processor 251. Typically, mobile devices also include a 256 keypad or a miniature keyboard and oscillating buttons or menu selection switches 257 to receive user inputs. 65

[0091] The processor 251 can be any programmable microprocessor, microcomputer or chip or multi-processor chips that can be configured by processor-executable software instructions (applications) to perform a variety of functions, including the functions of the various aspects that have been described in this document. In addition, the functions of the various aspects can be implemented in a DSP 258 processor within receiver 256 configured with instructions executable by DSP. Typically, the 5 software applications and instructions executable by processor can be stored in internal memory 252 before being accessed and loaded into processor 251. In some mobile devices, processor 251 may include sufficient internal memory to store the Application software instructions. In some mobile devices, the secure memory may be in a separate memory chip coupled to the processor 251. In many mobile devices 250, the internal memory 252 may be a volatile or non-volatile memory 10, such as a flash memory, or a mixture of both. For the purposes of this description, a general reference to the memory refers to any memory accessible by the processor 251, including an internal memory 252, a removable memory connected to the mobile device and a memory in the processor 251 itself.

[0092] The descriptions of the foregoing procedures and process flow diagrams are provided simply as illustrative examples and are not intended to require or imply that the steps of the various aspects should be performed in the order presented. As one skilled in the art will appreciate, the steps in the above aspects can be performed in any order. Words such as "thereafter", "then", "next", etc. they are not intended to limit the order of the steps; These words are simply used to guide the reader through the description of the procedures. In addition, any reference to elements of the singular claim, for example, using the articles "a", "a", "ones", "ones", "the", "the", "the" or "the" no It should be interpreted as limiting the element to the singular.

[0093] The various logical blocks, modules, circuits and illustrative algorithm steps described in relation to the aspects disclosed herein can be implemented as electronic hardware, computer software or combinations of both. To clearly illustrate this interchangeability of hardware and software, previously described, in general, various components, blocks, modules, circuits and illustrative steps in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design restrictions imposed on the entire system. Those skilled in the art can implement the described functionality in different ways for each particular application, but it should not be interpreted that such implementation decisions imply an exit from the scope of this invention.

[0094] The hardware used to implement the various logic, logic blocks, modules and illustrative circuits described in relation to the aspects disclosed herein may be implemented or performed with a general purpose processor, a digital signal processor (DSP), a DSP on a multimedia broadcasting receiver chip, an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, transistor logic or discrete gates, discrete hardware components , or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor but, alternatively, the processor may be any conventional processor, controller, microcontroller or state machine. A processor can also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors together with a DSP core or any other such configuration. Alternatively, some steps or procedures may be performed by circuitry that is specific to a given function.

 Four. Five

[0095] In one or more aspects by way of example, the described functions may be implemented in hardware, software, firmware or any combination thereof. If implemented in software, the functions can be stored or transmitted as one or more instructions or code in a computer-readable medium. The steps of a procedure or algorithm disclosed herein can be implemented in a software module executable by a processor that can reside in a computer-readable medium. Computer-readable media includes both computer storage media and communication media, including any media that facilitates the transfer of a computer program from one place to another. A storage medium can be any available media that can be accessed by a computer. By way of example, and not limitation, said computer-readable media may comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage devices, magnetic disk storage or other magnetic storage devices or any other means that can be used to transport or store a desired program code in the form of instructions or data structures and which can be accessed by a computer. In addition, any connection properly receives the name of computer readable media. For example, if the software is transmitted from a website, server or other remote source, using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technologies 60 such as infrared , radio and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL or wireless technologies such as infrared, radio and microwave, are included in the definition of medium. The term disc, as used herein, includes a compact disc (CD), a laser disc, an optical disc, a digital versatile disc (DVD), a flexible disc and a Blu-ray disc where the discs usually play data magnetically, while the rest of the discs reproduce data optically with lasers. The 65 combinations of the above should also be included within the scope of computer readable media.

Additionally, the operations of a procedure or algorithm may reside as a code or as any combination or set of codes and instructions in a machine-readable medium and a computer-readable medium, which may be incorporated into a computer program product. The foregoing description of the disclosed embodiments is provided to allow any person skilled in the art to make or use the present invention. Various modifications of these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not intended to be limited to the embodiments shown herein, but is granted the broadest scope compatible with the following claims and the novel principles and features disclosed herein. 10

[0096] In accordance with one aspect of the present invention, a computer device is provided having at least one processor, comprising:

means for setting a flag bit associated with a resource when the resource is not in use, in which the resource is one of a plurality of resources;

means for identifying resources that can be placed in a low power mode based on the configuration of indicator bits when a processor can enter a state of inactivity;

 twenty

means to record a latency requirement for each of the identified resources;

means for selecting a more stringent latency requirement among the registered latency requirements;

means for evaluating in the computing device the low power modes for each resource that can be placed in a low power mode to eliminate any low power resource mode or any combination of low power resource modes that have a requirement of combined latency that exceeds the strictest latency tolerance selected;

means for selecting a combination of low power resource modes that maximizes potential energy savings and has a total latency requirement that is less than or equal to the worst case latency requirement selected; Y

means for entering the selected combination of low power resource modes by executing an input function of each of the low power modes selected in each of the resources identified.

[0097] The means for selecting a combination of low power resource modes may comprise means for executing a backpack troubleshooting algorithm for the various resources and low power modes. 40

[0098] The computing device may further comprise:

means for determining a time in which the processor is expected to remain in a state of inactivity; and 45

means for determining the potential energy savings of each low power resource mode evaluated based on potential energy savings per unit of time at a current temperature multiplied by the expected expected downtime.

 fifty

[0099] The computing device may further comprise:

means for measuring, when the device is in a known stable state, demand for temperature and power or temperature and current;

 55

means to select a resource for measurement;

means for placing the selected resource in a low power resource mode;

means for measuring the demand for current or power while the selected resource is in the low power 60 mode; Y

means for repeating the steps of selecting a next resource, placing the selected resource in a low power resource mode and measuring the power or current demand while the selected resource is in the low power resource mode until the current demand or power during a low power resource mode 65 has been measured for all resources that have a low power resource mode,

wherein means for selecting a combination of low power resource modes that maximize potential energy savings comprise means for utilizing the power demand or measured current associated with each low power resource mode for determining potential energy savings of a combination of low power resource modes.

 5

[0100] The computing device may further comprise:

means for repeating the operations set forth in claim 3 at different temperatures; Y

means for determining a temperature sensitivity of the current or power demand associated with each mode of low power resource,

wherein the means for selecting a combination of low power resource modes that maximize potential energy savings include:

means for measuring a temperature of the computing device; and 15

means for utilizing the determined temperature sensitivity of the power or current demand associated with each low power resource mode to determine the potential energy savings of a combination of low power resource modes at the temperature of the measured computing device.

 twenty

[0101] The means for the evaluation of low power resource modes for each resource that can be placed in a low power mode may comprise means for carrying out a search process in the table using the data selection table of the Low power mode using potential energy savings, estimated downtime and operating conditions.

 25

[0102] Operating conditions may include a temperature value.

[0103] The computing device may further comprise:

means for collecting statistics on the operating conditions in the computing device; and 30

means for updating the low power mode selection data table based on the statistics of operating conditions collected.

[0104] The operating conditions can be selected from the group that includes temperature, power consumption of certain low power resource modes, idle times experienced in different operating states, and typical device usage patterns.

[0105] The computing device may further comprise means for determining if the computing device is connected to external power, in which the means for updating the selection data table of the low power mode based on the condition statistics Operational are obtained when the computing device is connected to external power.

[0106] In accordance with one aspect of the present invention, an apparatus for conserving energy in a computer device is provided, comprising:

a buffer; Y

a processor coupled to the buffer, in which the processor is configured with instructions executable by processor to perform operations comprising: 50

establish a flag bit associated with a resource when the resource is not in use, in which the resource is one of a plurality of resources;

identify the resources that can be placed in a low power mode based on the configuration 55 of the indicator bit when a processor can enter an idle state;

register a latency requirement for each of the identified resources;

select a more stringent latency requirement among the registered latency requirements; 60

evaluate in the computing device the low power modes for each resource that can be placed in a low power mode to eliminate any low power resource mode or any combination of low power resource modes that have a combined latency requirement that exceed the most strict latency tolerance selected; 65

select a combination of low power resource modes that maximizes potential energy savings and has a total latency requirement that is less than or equal to the worst case latency requirement selected; Y

enter the selected combination of low power resource modes by executing a function of 5 input of each of the low power modes selected in each of the identified resources.

[0107] The processor may also be configured with instructions executable by processor such that the selection of a combination of low power resource modes comprises the execution of a backpack troubleshooting algorithm for the various resources and low power modes. The processor can be configured with instructions executable by the processor to perform operations that further comprise:

determine a time in which the processor is expected to remain in a state of inactivity; Y

determine the potential energy savings of each of the low power resource modes evaluated 15 based on energy savings per unit of time at a current temperature multiplied by the expected expected downtime.

[0108] The processor may be configured with instructions executable by processor to perform operations that further comprise:

measure, when the device is in a known stable state, demand for temperature and power or temperature and current;

select a resource for measurement; 25

place the selected resource in a low power resource mode;

measure the current or power demand while the selected resource is in the low power resource mode; and 30

Repeat the steps to select a next resource, place the selected resource in a low power resource mode and measure the power or current demand while the selected resource is in the low power resource mode until the demand for current or power during a low power resource mode for all resources that have a low power resource mode, 35

wherein the selection of a combination of low power resource modes that maximizes potential energy savings comprises the use of the measured power or current demand associated with each low power resource mode to determine the potential energy savings of a combination of low power resource modes.

 40

[0109] The processor may be configured with instructions executable by processor to perform operations that further comprise:

repeat the operations indicated in claim 3 at different temperatures; Y

 Four. Five

determining a temperature sensitivity of the current or power demand associated with each low power resource mode, in which to select a combination of low power resource modes that maximizes potential energy savings comprises:

measure a temperature of the computing device; and 50

use the determined temperature sensitivity of the current or power demand associated with each low power resource mode to determine the potential energy savings of a combination of low power resource modes at the temperature of the measured computing device.

 55

[0110] The processor may be configured with instructions executable by processor in such a way that the evaluation of low power resource modes for each resource that can be placed in a low power mode comprises carrying out a table search process using the low power mode selection data table using the potential energy savings, estimated downtime and operating conditions. 60

[0111] The processor may be configured with instructions executable by processor such that the operating conditions include a temperature value.

[0112] The processor may be configured with instructions executable by processor to perform 65 operations which further comprise:

collect statistics on the operating conditions in the computing device; Y

update the low power mode selection data table based on the statistics of operating conditions collected. 5

[0113] The processor can be configured with instructions executable by processor in such a way that the operating conditions are selected from the group including temperature, power consumption of certain low power resource modes, idle times experienced in different operating states and typical device usage patterns. 10

[0114] The processor may be configured with instructions executable by processor to perform operations that further comprise:

determine if the computing device is connected to an external power supply, 15

in which the updating of the low power mode selection data table based on the operating condition statistics is carried out when the computing device is connected to an external power supply.

 twenty

[0115] In accordance with one aspect of the present invention, a non-transient storage medium is provided having stored in the same software executable instructions per processor configured to cause a processor to perform power conservation operations on a computing device, operations comprising:

 25

establish a flag bit associated with a resource when the resource is not in use, in which the resource is one of a plurality of resources;

identify the resources that can be placed in a low power mode based on the configuration of the indicator bit when a processor can enter an idle state; 30

register a latency requirement for each of the identified resources;

select a more stringent latency requirement among the registered latency requirements;

 35

evaluate in the computing device the low power modes for each resource that can be placed in a low power mode to eliminate any low power resource mode or any combination of low power resource modes that have a combined latency requirement that exceed the most strict latency tolerance selected;

 40

select a combination of low power resource modes that maximizes potential energy savings and has a total latency requirement that is less than or equal to the worst case latency requirement selected; Y

enter the selected combination of low power resource modes by executing an input function 45 of each of the low power modes selected in each of the identified resources.

[0116] The stored processor-executable software instructions may be configured to cause a processor to perform operations such that the selection of a combination of low power resource modes comprises the execution of a backpack troubleshooting algorithm for the various 50 resources and low power modes.

[0117] The stored processor-executable software instructions may be configured to cause a processor to perform operations that further comprise:

 55

determine a time in which the processor is expected to remain in a state of inactivity; Y

determine the potential energy savings of each of the low power resource modes evaluated based on energy savings per unit of time at a current temperature multiplied by the expected expected downtime. 60

[0118] Stored processor executable software instructions may be configured to cause a processor to perform operations that further comprise:

measure, when the device is in a known stable state, demand for temperature and power or temperature and current; select a resource for measurement;

place the selected resource in a low power resource mode;

measure the current or power demand while the selected resource is in the low power resource mode; and 5

Repeat the steps to select a next resource, place the selected resource in a low power resource mode and measure the power or current demand while the selected resource is in the low power resource mode until the demand for current or power during a low power resource mode for all resources that have a low power resource mode, 10

wherein the selection of a combination of low power resource modes that maximizes potential energy savings comprises the use of the measured power or current demand associated with each low power resource mode to determine the potential energy savings of a combination of low power resource modes.

 fifteen

[0119] Stored processor executable software instructions may be configured to cause a processor to perform operations that further comprise:

repeat the operations indicated in claim 3 at different temperatures; Y

 twenty

determining a temperature sensitivity of the current or power demand associated with each low power resource mode, in which to select a combination of low power resource modes that maximizes potential energy savings comprises:

measure a temperature of the computing device; and 25

use the determined temperature sensitivity of the current or power demand associated with each low power resource mode to determine the potential energy savings of a combination of low power resource modes at the temperature of the measured computing device.

 30

[0120] The stored processor-executable software instructions may be configured to cause a processor to perform operations such that the evaluation of low power resource modes for each resource that can be placed in a low power mode comprises carrying out a process. Search in the table using the low power mode selection data table using the potential energy savings, estimated downtime and operating conditions. 35

[0121] The stored processor executable software instructions may be configured to cause a processor to perform operations such that the operating conditions include a temperature value.

 40

[0122] The stored processor-executable software instructions may be configured to cause a processor to perform operations that further comprise:

collect statistics on the operating conditions in the computing device; Y

 Four. Five

update the low power mode selection data table based on the statistics of operating conditions collected.

[0123] The stored processor-executable software instructions may be configured to cause a processor to perform operations such that the operating conditions are selected from the group including the temperature, the power consumption of certain low resource resource modes. power, idle times experienced in different operating states, and typical device usage patterns.

[0124] The stored processor-executable software instructions may be configured to cause a processor to perform operations that further comprise:

determine if the computing device is connected to an external power supply, in which the updating of the low power mode selection data table based on the operating condition statistics is carried out when the computing device is connected to a power supply external 60

Claims (15)

1. A method for conserving energy in a computing device that has at least one processor, comprising:  5 establish (14) an indicator bit associated with a resource, in which the resource is one of a plurality of resources used by a processor; identify (28) the resources that can be placed in a low power mode based on the indicator bit configuration; 10 register (30) a latency requirement for each of the identified resources; select (30) a shorter latency requirement among the registered latency requirements;  fifteen evaluate (38) in the low power modes of the computing device for each resource that can be placed in a low power mode to eliminate any low power resource mode or any combination of low power resource modes that have a requirement of combined latency that exceeds the shortest latency requirement selected;  twenty select (38) a combination of low power resource modes that maximizes potential energy savings and has a total latency requirement that is less than or equal to the shortest latency requirement selected; Y enter (40) in the selected combination of low power resource modes by executing an input function 25 of each of the low power modes selected in each of the identified resources; characterized in that the step of setting (14) the indicator bit associated with a resource is performed when the resource is not in use and the step of identifying (28) the resources that can be placed in a low power mode based on the Indicator bit setting is done when the processor can enter an idle state. 2. The method according to claim 1, wherein selecting a combination of low power resource modes comprises executing a backpack troubleshooting algorithm for the various low power resources and modes. 3. The method according to claim 1, further comprising: determine (34) a time in which the processor is expected to remain in a state of inactivity; Y determine (38) the potential energy savings of each low power resource mode evaluated based on potential energy savings per unit time at a current temperature multiplied by the expected expected downtime. Four. Five 4. The method according to claim 1, further comprising: measure (241), when the device is in a known stable state, the demand for temperature and power or temperature and current; fifty select (242) a resource for measurement; placing (243) the selected resource in a low power resource mode;  55 measure (244) the current or power demand while the selected resource is in the low power resource mode; Y repeat (246) the steps of selecting a next resource, placing the selected resource in a low power resource mode and measuring the power or current demand while the selected resource 60 is in the low power resource mode until the demand of current or power during a low power resource mode has been measured for all resources that have a low power resource mode, wherein the selection of a combination of low power resource modes that maximizes potential energy savings comprises the use of the power demand or measured current associated with each low power resource mode to determine (245) the savings potential energy of a combination of low power resource modes. 5. The method according to claim 4, further comprising: repeat the operations listed in claim 3 at different temperatures; and 5 determine a temperature sensitivity of the current or power demand associated with each low power resource mode, in which the selection of a combination of low power resource modes that maximizes potential energy savings comprises: 10 measure a temperature of the computing device; Y use the determined temperature sensitivity of the current or power demand associated with each low power resource mode to determine the potential energy savings of a combination of low power resource modes at the temperature of the measured computing device. 6. The method according to claim 1, wherein the evaluation of low power resource modes for each resource that can be placed in a low power mode comprises performing (150) a table search process 20 using a table Low power mode selection data using potential energy savings, estimated downtime and operating conditions. 7. The method according to claim 6, wherein the operating conditions include a temperature value. 25 8. The method according to claim 6, further comprising: collect statistics on the operating conditions in the computing device; Y  30 update the low power mode selection data table based on the statistics of operating conditions collected. 9. The method according to claim 8, wherein the operating conditions are selected from the group including temperature, energy consumption of particular low power resource modes, 35 idle times experienced in various operating states and typical patterns of use of devices 10. The method according to claim 8, further comprising determining (180) if the computing device is connected to an external power supply, in which the updating of the data table of low power mode selection based on the statistics of Operating conditions are achieved when the computing device is connected to external power. 11. A computing device that has at least one processor, comprising:  Four. Five means for setting an indicator bit associated with a resource, in which the resource is one of a plurality of resources used by a processor; means for identifying the resources that can be placed in a low power mode based on the indicator bit configuration; fifty means to record a latency requirement for each of the identified resources; means for selecting a shorter latency requirement among the registered latency requirements;  55 means for evaluating in the computing device the low power modes for each resource that can be placed in a low power mode to eliminate any low power resource mode or any combination of low power resource modes that have a latency requirement combined that exceeds the shortest latency requirement selected;  60 means for selecting a combination of low power resource modes that maximizes potential energy savings and has a total latency requirement that is less than or equal to the shortest latency requirement selected; Y means for entering the selected combination of low power resource modes by executing an input function of each of the low power modes selected in each of the identified resources; characterized in that the means to set the indicator bit associated with a resource set the indicator bit when the resource is not in use and the means to identify the resources that can be placed in a low power mode based on the bit configuration Indicator identifies 5 resources when the processor can enter a state of inactivity. 12. The computing device of claim 11, wherein means for selecting a combination of low power resource modes comprises means for executing a backpack troubleshooting algorithm for the various resources and low power modes. 10 13. The computing device of claim 11, further comprising: means for determining a time in which the processor is expected to remain in a state of inactivity; and 15 means for determining the potential energy savings of each low power resource mode evaluated based on potential energy savings per unit of time at a current temperature multiplied by the expected expected downtime.  twenty 14. The computing device of claim 11, further comprising: means for measuring, when the device is in a known stable state, demand for temperature and power or temperature and current;  25 means to select a resource for measurement; means for placing the selected resource in a low power resource mode; means for measuring current or power demand while the selected resource is in low power resource mode 30; Y means for repeating the steps of selecting a next resource, placing the selected resource in a low power resource mode and measuring the power or current demand while the selected resource is in the low power resource mode until the current demand or power 35 during a low power resource mode has been measured for all resources that have a low power resource mode, wherein means for selecting a combination of low power resource modes that maximize potential energy savings comprise means for utilizing the measured power or current demand associated with each low power resource mode to determine potential energy savings. of a combination of low power resource modes. 15. A non-transient storage medium having stored in the same processor-executable software instructions configured to cause a processor to implement a method according to any one of claims 1 to 10. 45