ES2365408T3 - CIRCUIT MODULE. - Google Patents

Abstract

A dielectric assembly (2000) comprising: a plurality of layers (2220, 2230) of substrate comprising an upper layer and one or more intermediate layers, the plurality of substrate layers being joined together in a stratified arrangement in which said layers (2220, 2230) of substrate comprise an integrated signal processing circuitry, said integrated signal processing circuitry comprising a fixed signal processing circuitry (2003, 2004) and an adjustable signal processing circuitry (2005, 2006); an input (2001) of signals and an output (2002) of signals, each connected to the integrated signal processing circuitry; and a cavity (2007) formed through the upper and intermediate layers, said cavity being configured to receive a circuit element added to the assembly after joining the substrate layers and exposing said cavity (2007) signal connection terminals connected to the integrated signal processing circuit to allow the connection of the added circuit element to said integrated signal processing circuitry; and in which the fixed circuitry (2003, 2004) of signal processing acts by altering the electrical characteristics of the signals coupled to that circuitry and in which the alteration characteristics of said fixed circuitry are predetermined at the time of joining the substrate layers, said dielectric assembly being characterized in that the adjustable signal processing circuitry (2005, 2006) acts by altering the electrical characteristics of the signals coupled to that circuitry and in which the alteration characteristics of said adjustable circuitry can be changed later to the joining of the substrate layers by means of the connection of the circuit components (2102-2109) to the connections of the signal paths in the exposed areas of the substrate surface; the fixed signal processing circuitry (2003, 2004) comprises first and second set impedance matching circuitry; The adjustable signal processing circuitry (2005, 2006) comprises first and second adjustable impedance matching circuitry; the first impedance matching circuitry is connected between the signal input (2001) and the first impedance matching adjustable circuitry; the second impedance matching circuitry is connected between the signal output (2002) and the second impedance matching circuitry; the first adjustable impedance matching circuitry is also connected to the signal connection terminals in the cavity (2007); the second adjustable impedance matching circuitry is also connected to the signal connection terminals in the cavity (2007); and the fixed and adjustable circuitry (2003, 2004 2005, 2006) of signal processing allows adaptation of the impedance between the signal input (2001) and the signal connection terminals in the cavity (2007) and between the output ( 2002) signal and signal connection terminals in the cavity (2007).

Description

Cross reference to related requests

The present application claims priority with respect to U.S. Patent Application No. 11 / 077,935, filed on March 11, 2005 and entitled "Circuitry Module," which is a continuation in part of U.S. Patent Application No. 10 / 659,542, filed. on September 10, 2003 and entitled “Coupler Resource Module”.

Background of the invention

The development of planar transmission media in the early 1950s had a fundamental impact on microwave circuits and component encapsulation technology. Microwave printed circuit technology and supporting analytical theories for the tape line and the micro tape were given at a rapid pace. The first years of tape line circuit design were devoted almost entirely to the design of passive circuits, such as directional couplers, power dividers, filter and antenna feed networks. The first implementations were housed in bulky metal housings and connected by coaxial connectors.

To reduce size and weight, couplers without cover and without connectors were developed. These later implementations were sometimes referred to as "film-like" and included laminated sets of tape lines joined together by fusion, or with thermoplastic or thermosetting films. Further improvements followed in fields such as dielectric materials used in these devices and in the microwave manufacturing process itself. A historical perspective of the development and applications of microwave integrated circuits can be found in “Microwave Integrated Circuits - An Historical Perspective” by H. Howe, Jr., IEEE Trans. MTT-S, Vol. MTT-32, pp. 991-996, September 1984, and in "Microwave Printed Circuits - The Early Years", by R. M. Barrett, IEEE Trans. MTT-S, Vol. MTT-32, pp. 983-990, September 1984.

The components of tape and micro tape lines have been integrated for various applications in housings and encapsulates, as well as monolithically on a common substrate. The integration and encapsulation procedures affect the interface and installation of the system, as well as the module's ability to withstand post-processing temperatures (i.e., post-fabrication of the tape and micro-tape component lines) and the ability to Operational thermal management of the module (i.e. its thermal transfer capacity). Common techniques for component integration require that they be bonded together using, for example, epoxy compounds, adhesives and welding. In some cases, a module using epoxy compounds, adhesives, welding and / or other binding agents will be subjected to subsequent processing steps that expose the module to high temperatures and other processing conditions. These subsequent processing steps must be compatible with the binding agent and with the material used in the formation of the modules. For example, when a module is formed using conventional epoxy compounds, adhesives and welding, it may be necessary to avoid a high temperature after processing, since it can cause deterioration in the module joint.

Planar modules for coupling and signal processing are desired that can be subjected to a wider range of manufacturing processes and retain their integrity under them. Consequently, there is a need to integrate coupling circuitry, DC blocking structures, impedance matching networks, polarization decoupling structures and RF load terminations into a modular planar structure that is capable of supporting, for example, high temperature processing or other processing steps to which the module can be subjected after its manufacture. Such processing can occur, for example, when the microwave module is integrated with other components in a circuit set. In addition, there is a need for a coupling circuit that can be easily customized by adding components after the coupling assembly is manufactured.

US 2005/051359 A1 describes a coupling module of resources of bonded layers of substrate and a metal flange layer. US-B2-6 815 739 discloses a system of phase antennas and other types of radiofrequency devices and systems that use micromechanical switches and a co-sintered ceramic technology at low temperature. US 2002/196085 A describes a high frequency transmitter module comprising transmit power amplifiers, switching circuits, directional couplers and a branching filter circuit.

Summary of the Invention

The invention is defined in the appended claims.

A coupler module that can be used, for example, for the integration of microwave couplers, impedance matching networks, polarization decoupling structures, RF load terminations and amplification circuitry is disclosed. The module, also called "resource module" in this document, has a multi-layer modular architecture that includes multiple layers of circuits linked together and, in some implementations, a metal flange. The metal flange can be used for device connection and thermal management and as an encapsulation interface and for installation. The resource module includes a device connection zone (also called "resource well" or "cavity" that crosses the substrate layers). The resource well allows the addition of devices to the module and the coupling of those devices to circuitry in the resource module, after the module itself has been formed. That is, additional devices can be added to the resource well after the resource module layers have joined. The resource well includes connection points within the well, through which an added device can have a signal connection with coupler circuitry formed in the dielectric layers of the resource module, and can be coupled to the metal flange of the module. This module can be used to provide a common platform for various microwave circuit applications and a system interface and installation procedure that offers a significant degree of freedom allowing, for example, high temperature device connection processing, as well as Optimal operational thermal management. This common platform can be customized by adding a wide variety of circuits and circuit elements to the resource module and by adding circuits to bare contacts in a surface layer. These circuit elements may include microwave circuits, transistors, varactor diodes, PIN diodes and Schottky diodes.

In one implementation, the coupler assembly includes multiple layers of composite substrate and a (optional) mutual fusion of flange layers in a stratified arrangement. The substrate layers are placed on top of the flange layer and include fixed integrated signal processing circuitry (for example, impedance matching tape line circuitry) connected to a signal input and signal output. A second "tunable" or "adjustable" circuitry zone, for example impedance matching microcircle circuitry, is coupled between the fixed integrated signal processing circuitry and a cavity formed through an area of the substrate layers. The cavity exposes signal connection terminals coupled to the adjustable integrated circuitry. These signal connection terminals are coupled to the adjustable integrated circuitry and allow the addition of a circuit element to the assembly after joining the substrate layers. The adjustable integrated circuitry is also coupled to the fixed integrated circuitry and allows the addition of circuit elements (for example, resistors and capacitors) in contact areas on the surface of the substrate to customize the adjustable circuitry. The assembly is configured in such a way that the integrated integrated circuitry has a predetermined impedance at the signal input and signal output terminals and also has predetermined impedance characteristics in the adjustable integrated circuitry. The adjustable integrated circuitry can then be "tuned", for example, by the addition of capacitive and resistive elements to allow impedance matching between the fixed integrated circuitry and any circuit elements coupled within the resource well. Therefore, such an implementation provides a module that can be easily customized for the addition of elements with different impedances within the cavity while providing a set that presents a standardized impedance to external devices.

The implementation may include one or more of the following features. The integrated signal processing circuitry (which may include, for example, microwave coupler circuitry, impedance matching circuitry, DC blocking circuitry, polarization decoupling circuitry and / or RF load terminations) may include a first signal processing circuitry coupled to the signal input and a first signal connection terminal exposed within the cavity and a second signal processing circuitry coupled to the signal output and a second signal connection terminal to the discovered inside the cavity. The cavity can be configured to receive an added circuit element, such as a microwave circuit, a transistor, a varactor diode, a PIN diode, a Schottky diode or other circuit elements. There may also be bare conductive terminals within the cavity and coupled to conductive terminals on an outer surface of the assembly to provide signal connections between a circuit element added to the cavity and external signal sources.

The implementations may also include one or more of the following features. The cavity can expose an upper surface of the flange layer that allows coupling (eg, electrical or thermal coupling) of the circuit element added to the flange layer. The flange layer may be formed of a substantially homogeneous metal core. Metal coatings (eg, nickel, gold or other metal that inhibits oxidation of the metal core) can be added to the surfaces of the flange layer. Interconnections between the substrate layers can be made using metallic interconnecting holes.

Manufacturing of the coupling assembly includes drilling of the substrate layers to create a plurality of tracks and forming cuts in the substrate layers. The cuts are positioned in such a way that, when the substrate layers are fused in a stratified arrangement, the cuts form a cavity that crosses the substrate layers, exposing an upper surface of a lower layer (e.g., the layer of flange). In some implementations, the upper layer may cover the cavity during bonding and then be drilled or milled to "open" the cavity and / or expose areas of the lower substrate layers, while in other implementations, the upper layer may Already have the cavity and / or other areas that leave exposed lower layers in advance to create an open cavity and exposed surfaces of the lower layers after joining.

Prior to joining, the surfaces of the substrate layers are metallized to form the elements of the integrated signal processing circuitry, both fixed and variable, the signal input and output terminals, the bare signal connection terminal within the cavity and conductive pathways that interconnect the above structures when the plurality of composite substrate layers are placed in a stratified arrangement.

Details of one or more implementations of the invention are set forth in the accompanying drawings and in the description below. Other features, other objects and other advantages of the invention will be apparent from the description and drawings and from the claims.

Description of the drawings

Figures 1 show a top, side and bottom view of a mounted resource module.

Fig. 2 is a block diagram showing components of the signal processing circuit which can be included in an implementation of the resource module of Fig. 1. Fig. 3 is a block diagram showing components of the signal processing circuit

which can be included in an alternative implementation of the resource module of Fig. 1.

Figures 4-6 show upper and lower metal layers of three dielectric substrates that implement the signal processing circuit of Fig. 2. Fig. 7 shows top and bottom views of a metal flange layer. Fig. 8 shows an array of panels. Figures 9-12 show different types of tape lines. Fig. 13 shows a rectangular rod transmission line. Fig. 14 shows an alternative embodiment of a resource coupler module. Fig. 15 shows top, side and bottom views of the resource coupler module of Fig. 14. Figures 16-18 show upper and lower metal layers of three dielectric substrates that

they implement the signal processing circuit of Fig. 14. Fig. 19 shows top and bottom views of a metal flange layer. Fig. 20 shows a complete circuitry assembly that includes a resource well, circuitry

integrated signal processing both fixed and adjustable and signal connection points that allow the addition of components to the assembly to adjust the electrical characteristics of the circuitry Integrated adjustable signal processing.

Fig. 21 shows the completed circuitry assembly of Fig. 20 with components 2102-2110 added to signal connection points.

Figures 22A, 22B, 22C show top, bottom and side views of the module of Fig. 20. Figures 23A, 23B, 24A, 24B, 25A and 25B show top and bottom views of the module layers. Fig. 20.

Fig. 26A shows another implementation of a coupler module configured in such a way that they can multiple power amplifiers are added within the module resource well. Fig. 26B shows the module of Fig. 26A with circuit elements added to the micro-tape circuitry formed in the module.

Figures 27-30 show the module layers of Figures 26A and 26B. Fig. 31 shows an implementation in which the module is divided. Fig. 32 shows the module of Fig. 31 with amplifier circuitry added.

Detailed description of the invention

It should be noted that the embodiments shown in Figures 1-19 are not part of the invention, but represent background data that are useful for understanding the invention.

A "resource module" structure is disclosed in this document. The top, side and bottom views of the module are shown in Fig. 1. As shown in the side view, and in more detail in Figures 4-7, the resource module 100 may be created from a stack of bonded layers of substrate and a metal flange layer. The substrate layers are preferably formed of polytetrafluoroethylene (PTFE), glass and ceramics. Each substrate layer may include circuitry on one or both sides. The circuitry may include, for example, microwave directional couplers and 3 dB quadrature couplers, impedance matching networks, DC locks, polarization decoupling and RF load terminations. The flange layer allows the mounting of the resource and improved thermal properties.

Figures 2 and 3 are block diagrams for different implementations of the resource module. The block diagram of Fig. 2 shows circuitry 200, which is formed in the substrate layers of Figures 4-6. An example of how this circuit operates in the case of 12.5 ohms will be given, although a similar operation occurs for circuits with other impedance values. The example shown is for the case of 3 dB couplers; however, other networks can be composed using couplers with other coupling values. In the figures used throughout this disclosure, the elements numbered identically refer to the same structure (either, for example, in the form of the block diagram of Figures 2 and 3 or in the shapes of the dielectric layers and of flange of Figures 4-7). The circuitry shown in the block diagram of Fig. 2 can be used when the impedance at input 15 and output 16 is different from the impedance of the devices added to resource well 17. In particular, circuitry 200 is for an implementation in which the inputs and outputs are 50 ohms and the module allows the connection of 12.5 ohm devices in the resource well 17. The circuitry in the block diagram of Fig. 3 is for an implementation in which the impedances of the input, the output and the connected resources are the same. The circuit elements shown in Fig. 3 are substantially identical to those in Fig. 2, except that the block diagram of Fig. 3 lacks the transformer elements 1, 14 of Fig. 2. The substrate layers to implement circuit 300 follow those of circuit 200 of Fig. 2.

Circuit 200 receives an RF input signal at terminal 15. The input signal is transformed from 50 ohms to 12.5 ohms by transformer 1, and the output signal 22 is then divided by a first coupler 2. The two resulting signals at 24, 25 are then supplied by means of individual couplers 4, 5, respectively. The couplers 4, 5 perform DC blocking functions. Two RF signals 26, 27 are now available at terminals 18, 19, respectively, of the resource well. The signals at terminals 18, 19 can be connected to devices such as transistors, varactor diodes, PIN diodes and Schottky diodes, which can be added to resource well 17 after module 100 is formed. Additional signal terminals may be present. in well 17 for, for example, ground connections or connections to external signal sources. In addition, other outstanding components, such as resistors, capacitors and inductors, can be placed in the resource well 17. Once RF signals are processed by well devices 17, terminals 20, 21 are output and processed by circuitry 8-14. Circuits 8-14 perform a complementary function to that of circuitry 1-7. That is, the signals from terminals 20-21 are provided at input points 33, 34 to couplers 10, 11 and to lines 8, 9 of quarter wave tape. The couplers 10, 11 serve to block the DC polarization of the input signals 33, 34. The output signals 31, 32 of the couplers are then recombined by an output coupler 14, and the output 30 of the coupler 12 is provided to the impedance transformer 14, which transforms the input signal 30 from an impedance of 12.5 ohms. at an output impedance of 50 ohms at signal point 16.

The devices used in the resource module 17 may require a DC polarization for operation. This DC polarization is contained in zone 17 of devices by blocks 4, 5, 10, 11 of

DC. DC polarization 28-29, 36-37 is connected to zone 17 of devices through polarization decoupling lines (i.e., lines 6-9 of quarter wave tape) that look like an open circuit for the RF signal in zone 17 of devices. The RF load terminations 3, 13 are connected to the couplers 2 and 12 at signal points 23, 35, respectively, and provide impedance adaptation to isolated ports of the couplers. The impedance of the terminations 3, 13 equals the impedance of the couplers.

The basic principles for the design of the design of microwave directional couplers and the circuitry of 3 dB quadrature couplers are well known to those skilled in the art and are described in monographs as "Shielded Coupled-Strip Transmission Line" by SB Cohn, IEEE Trans. MTT-S, Vol. MTT-3, No. 5, pp. 29-38, October 1955; “Characteristic Impedances of Broadside-Coupled Strip Transmission Lines”, by S. B. Cohn, IRE Trans. MTT-S, Vol. MTT-8, No. 6, pp. 633-637, November 1960; and “Impedances of Offset Parallel-Coupled Strip Transmission Lines”, by J. P. Shelton, Jr., IEEE Trans. MTT-S, Vol. MTT-14, No. 1, pp. 7-15, January 1966. Directional couplers are usually implemented as tape lines coupled by the edges (Fig. 10) or tape lines coupled at a drop (Figures 11, 12), while quadrature couplers are typically configured as belt lines coupled at a drop (Fig. 12) or tape lines coupled at a width (Fig. 9). The teaching of the present disclosure demonstrates that tape line couplers synthesized from these theories can be integrated into a resource module with integrated flange.

The resource module, including the circuitry of Fig. 2, can be implemented using three layers of dielectric substrate bonded together with a thick metal flange. These substrate layers may be formed of modern composite dielectric materials (containing PTFE, glass and ceramic). These materials have electrical and mechanical properties that are stable over a wide range of temperatures, and have low loss properties that improve performance at microwave frequencies. The thermal expansion coefficient values close to those of copper allow the formation of metallic through holes and grooves. These metallized through shapes are used to connect the conductive layers in stacked structures of tape lines, as well as to form separate ground planes. Ground grooves can be formed in mathematical proximity to the signal holes through the dielectric layers to form rectangular rod transmission lines that maintain a controlled impedance for propagation in the Z direction (i.e., from top to bottom through the layers of the stacked structure of dielectric layers).

Figures 4-6 show top, side and bottom views for three layers 400, 500, 600 of substrate forming the module 100. The top-side view can match the view of the bottom face by folding the page in the horizontal rectangle formed by the side view. The substrates 400, 500, 600 may be formed from polytetrafluoroethylene, glass and ceramic compounds, which have a range of relative dielectric constants (Er) of 2.1 to 20.0, and a range of thicknesses (h) of 0.03 to 1.52 mm. The substrates are metallized with copper foil (typically 0.02 mm thick, but can range between 0.003 and 0.08 mm) and are stripped to form circuits. Holes and grooves (i.e. elongated holes and openings) of interconnection, metallized with copper, connect one layer of substrate with another. Examples of slots include slots 401; Examples of interconnecting holes include holes 402 (other slots and other holes are shown in the drawings and left unnumbered). Details of each layer of the set are shown in Figures 4 to 7. The modules are manufactured in panels in a matrix, as shown in Fig. 8.

The resource modules described in this disclosure can be manufactured following the procedures disclosed in US Patent No. 6,099,677 and in US Patent No. 6,395,374. The layers 400, 500, 600 and a thick metal flange 700 (Fig. 7) are mutually joined, by means of a melting process, which uses a specific temperature and pressure profile to change the state of the material, and form a dielectric homogeneous while the dielectric is also permanently attached to the thick metal flange. The fusion joining of a thick metal flange directly to the dielectric layers provides a mechanical mounting interface for system installation. The multi-layer resource module can be screwed directly to a system assembly by means of flange mounting holes 701. Since the fusion bonding procedure is at temperatures between 350 ° C and 400 ° C, the resource module can easily withstand the high temperatures of the post-processing procedure used for the connection of the device within the resource well 17. These post-assembly process temperatures may include temperatures arising from the connection of devices using welding (Sn63, Sn96, Au / Si eutectic), epoxy compounds (silver filling epoxy, insulating epoxy) and adhesives (glass filling epoxy , silver filling cyanate ester).

The fusion joining of a thick metal flange 700 directly to the dielectric layers (in particular, to the lower layer 600) provides a heat sink for thermal management of the dissipated RF and DC power. The trimmed areas 475, 575, 675 in layers 400, 500, 600 allow the device to be mounted directly on the flange

or on the surface of the dielectric layer with thermal paths that conduct heat to the flange. In some implementations, clipped areas 475, 575, 675 may be progressively smaller (from the upper surface to the lower surface) to expose different connection zones in different dielectric layers. In the circuit layers, pickled metal film resistors and printed thick film resistors can be included, although the resistance components can also be connected in the resource well 17. All these resistors, typically configured as RF load terminations, can benefit from the connection to the heat sink edge, allowing them to operate at higher power levels.

The following steps summarize the construction of resource module 100 according to the procedure disclosed in US 6,099,677 and US 6,395,374. It should be understood that each substrate 400-600 and flange 700 are manufactured as part of a panel (for example, panel 800) which, in general, will include a number of identical substrate elements (although, in some cases, as when only It is necessary to manufacture some devices, panels with a number of different substrates could be manufactured to form differently configured resource modules).

The construction of an implementation of the resource module will be described below. The flange plate layer and each of the substrate layers can be manufactured as follows:

Flange plate manufacturing

one.

Each flange plate 700 is formed by selectively coating a copper panel with nickel and gold.

2.

Binding holes 723, as well as grooves and holes for alignment pins, can be drilled through flange plate 700. Joining holes 723 are included, for example, when the module is to be mounted by screws on another surface.

3.

The entire lower surface 710 may be nickel / gold plated, while the upper surface 720 may be nickel / gold plated the entire upper surface or, in some implementations, the nickel / gold plating may be limited to the area around the perimeter 724 of the surface 720 and in the area 722 surrounding the connecting holes 723 and the grooves.

Four.

Selective gold plating can be used in zone 721 of the resource well. Selective gold plating 721 provides improved corrosion resistance in zone 721 and helps ensure a good electrical connection between the flange plate 720 and the devices added in the resource well 17. A process with photosensitive resin can be used to define the area for selective gold plating.

Manufacturing of substrate layers

one.

Drill grooves and interconnection holes through the layers (400, 500, 600) of substrate. Alternatively, interlocking grooves and holes can be formed through the drilled substrate layers and then plasma stripping the bare substrate layers inside the hole and the grooves, before plating with copper.

2.

Next, the substrate layers (in particular, the hole and the grooves) are copper plated; first, using a seminal layer of non-electrolytic copper, followed by an electrolytic copper plate, preferably with a thickness of 0.01 to 0.03 mm.

3.

The substrate layers are then laminated with photosensitive resin on both sides of each layer. The photosensitive resin is exposed using photographic masks and then subjected to development to reveal selected areas of the substrate layers. After exposing and revealing the photosensitive resin, the photosensitive resin remains to protect the copper layer used to form structures 1-14 and interconnections (for example, 15-37). Next, the plated copper is stripped from the areas of the substrate layers that are not protected by photosensitive resin.

Four.

Then, resistors 3 and 13 are formed by further stripping copper in the areas of resistors 3, 13, revealing a thin film of nickel phosphate below the copper layer. To do this, photosensitive resin is reapplied to the substrate layers. Using a photographic mask, the photosensitive resin is exposed and revealed so that copper in zones 3, 13 is exposed, while copper in other areas is still coated by the photosensitive resin. The copper discovered in zones 3, 13 is then stripped to define resistances. Next, the photosensitive resin is removed.

5.

Next, selective gold plating is carried out for the connections of the input and output contacts, and the connections of the resource well contacts and the upper surface connections. To do this, photosensitive resin is again applied to both sides of all substrate layers, exposed and revealed. Then, the substrates are plated with nickel and gold. After plating, the remaining photosensitive resin is removed.

6.

Slots are then milled through all substrates. After milling, the plates are cleaned by rinsing them in alcohol, and then in hot distilled water (21.11 ° C) and dried under vacuum for 1 hour at 149 ° C.

7.

The final stage of assembly includes the joining of the dielectric layers using the fusion process described in US 6,395,374 and US 6,099,677. This connection can be carried out at a pressure of 1723.69 kPa and a temperature of 375 ° C. The grooves can then be milled in the module assembly, opening the formed cavities (ie, cavity 17). That is, the opening 475 of the cavity in the upper layer 400 can be formed after fusion bonding. Individual modules can be dispatched by machining.

The interconnection holes used in the formation of interconnections between the substrate layers and between the faces of a substrate can exhibit a performance degradation if they are not compensated by means of electromagnetic modeling and analysis. In general, these interconnection holes can be modeled as vertical rectangular rod transmission lines (Fig. 13). To provide controlled impedance interconnections in the Z plane, the teachings of "Microwave Transmission Line Impedance Data" by M.A.R. Gunston, pp. 63-82, Van Nostrand Reinhold Company, 1971. The exemplary coupler assembly disclosed herein includes, among other things, broadband broadband directional couplers and broadband quadrature couplers. Broadband directional couplers are normally synthesized from the formulas given, for example, by "General Synthesis Of Asymmetric Multi-Element Coupled-Transmission-Line Directional Couplers", by R. Levy, IEEE Trans. MTT-S, Vol. MTT-11, No. 4, pp. 226-237, July 1963; and "Tables For Asymmetric Multi-Element Coupled-Transmission-Line Directional Couplers", by R. Levy, IEEE Trans. MTT-S, Vol. MTT-12, No. 3, pp. 275-279, May 1964. On the other hand, broadband quadrature couplers can be synthesized from the tables given, for example, in “Theory And Tables Of Optimum Symmetrical TEM-Mode Coupled-Transmission-Line Directional Couplers ”by EG Cristal and L. Young, IEEE Trans. MTT-S, Vol. MTT-13, No. 5, pp. 544-558, September 1965. Another option is to follow the teaching set forth in “Four Port Networks Synthesized From Interconnection Of Coupled And Uncoupled Sections Of Line Lengths”, by Joseph D. Cappucci, U.S. Patent No. 3,761,843, September 25, 1973. Patent 3,761,843 discloses how to synthesize broadband broadband couplers from a series of coupled and uncoupled tape lines. In this case, a series of decoupled interconnections is combined with a series of coupled sections to form a broadband quadrature coupler. In addition, non-uniform coupled structures defined in “The Design And Construction Of Broadband, High Directivity, 90-Degree Couplers Using Nonuniform Line Techniques” by C.P. Tresselt, IEEE Trans. MTT-S, Vol. MTT-14, No. 12, pp. 647-656, December 1966; and “The Design And Computed Performance Of Three Classes Of Equal-Ripple Nonuniform Line Couplers,” by C. P. Tresselt, IEEE Trans. MTT-S, Vol. MTT-17, No. 4, pp. 218-230, April 1969, to provide very broadband performance, characterized by a high pass frequency response.

Figures 14-19 include a circuit block diagram (Fig. 14), top, side and bottom views of a completed module (Fig. 15), top and bottom metallizations for three substrate layers (Figures 16-18) and a flange layer 19 of an alternative embodiment. The alternative embodiment of Fig. 14 includes a second resource well 40 located on the input side of circuit 1400.

The circuit shown in Fig. 14 includes circuit elements and connections 9-14, 16, 17, 20-21, 30-37 substantially identical to those of Fig. 2. Embodiment 1400 also includes a step 50-66 of modified entry and a second resource well 40. The input stage receives an RF signal at input 50. The signal is transformed from 50 ohms to 12.5 ohms by the transformer 51 and the output signal is provided to a contact 52 in a resource well 40. Additional devices (for example, a diode, a resistor, a transistor or a simple bridging connection) can be coupled between terminals 52 and 64 of the resource well 40. The signal 52, as transformed by any device in the resource well 40, is provided to the terminal 64 and, from it, to a DC block coupler 59 and then to the signal coupler 61. The outputs 62-63 of the signal coupler 61 are provided to the contacts 65-66 in the resource well 17. A DC polarization can be provided through the contact points 36-37, 54, 80-87 of the upper surface. If similar, a DC bias can be provided at input 54 connected to line 53 of quarter wave tape and at input 36 connected to line 8 of quarter wave tape and at input 37 connected to line. 9 of quarter wave tape. The substrate layers 1600, 1700, 1800 and the flange plate 1900 can be manufactured and joined according to the procedure described for the implementation of Fig. 2. Other characteristics of the substrate layers 1600, 1700, 1800 and of the plate 1900 flanges are followed from the descriptions given with respect to layers 400, 500, 600 and flange plate 700.

Circuit module with adjustable microcircle circuitry

Fig. 20 shows an embodiment of an assembly 2000 of a circuit module suitable for use in power amplification applications and in which the integrated signal processing circuitry includes both tape line fixed circuitry and micro-tape adjustable circuitry Signal processing The micro-tape circuitry is formed by printing (i.e. depositing and stripping metal) on one side of a substrate layer. In module 2000, the micro-tape circuitry is exposed to the air after the assembly is attached and there is a ground plane on an opposite side of the substrate layer containing that circuitry. The fixed signal processing circuitry includes tape line circuitry that is between two layers of substrate. In addition, the two layers of substrate are placed between ground planes.

The signal processing characteristics of the adjustable signal processing circuitry can be altered by connecting circuitry components to the signal contacts on a bare surface of a substrate layer. More particularly, the set 2000 includes inputs 2001 and outputs 2002 that are coupled to the fixed signal processing circuitry integrated in zones 2003 and 2004 of the substrate. The signals from the fixed signal processing circuitry are coupled to the adjustable signal circuitry formed in zones 2005 and 2005 from deposited and stripped metal on a surface of a substrate layer and from a ground plane integrated into an opposite surface. The signals from that adjustable circuitry are, in turn, coupled to signal connections adjacent to the resource well 2007. A power amplifier or other circuit may be added in the resource well 2007 after joining the assembly 2000. The circuitry added in the resource well 2007 can be thermally coupled to a bare metal flange layer within the well 2007 resources and electrical signal contacts at the edges of the resource well. The electrical contacts at the edge of well 2007 allow the coupling of the added circuitry in well 2007 to the adjustable signal processing circuitry formed in zones 2005 and 2006. By adding circuit components to the bare signal contacts On the surface of zones 2005, 2006, the electrical characteristics of the adjustable circuitry in zones 2005, 2006 can be changed.

Fig. 21 shows the assembly of Fig. 20 with added circuit components. For example, Fig. 21 shows the assembly 2000 with a power transistor 2110 placed inside the resource well 2007, chip capacitor 21022107, resistors 2108 and interconnecting copper sheet 2109 added in the areas 2005, 2006 of the surface. The added circuitry 2102-2109 can perform the impedance matching function between transistor 2110 and integrated fixed circuitry created in zones 2003, 2004.

Figures 22A, 22B and 22C are top, bottom and side views of structure 2000. As seen in Fig. 22C, assembly 2000 is formed of three layers: a metal flange layer 2210, an intermediate substrate layer 2220 compound and a top layer 2230 of composite substrate. Figures 23A, 23B, 24A, 24B, 25A and 25B show top and bottom views of layers 2210,2220 and 2230. The procedure used for the construction of layers 2210, 2220 and 2230 may be the same as for construction, for example, of layers 400, 500 and 700 of Fig. 1. Furthermore, although embodiment 2000 includes only a single intermediate layer 2220, implementations may have multiple intermediate layers, each including integrated circuitry and including conductive elements. which can be connected to each other through interconnection paths.

Fig. 26A shows another implementation of a coupler module configured in such a way that multiple power amplifiers can be added into the module resource well. Fig. 26B shows the module of Fig. 26A with circuit elements added to the micro-tape circuitry formed on the module. Figures 2730 show the construction of layers of the module of Figures 26A and 26B.

It is further noted that, although flouropolymer composite substrate layers have been disclosed as an embodiment, implementations can use other types of substrate layers, for example ceramic substrate layers. Similarly, although fusion bonding is preferable for layers of flouropolymer composite substrate, in some implementations other bonding methods (eg, adhesive bonding films) may be used. Accordingly, other embodiments are within the scope of the following claims.

Claims (15)

1. A dielectric assembly (2000) comprising: a plurality of substrate layers (2220, 2230) comprising an upper layer and one or more intermediate layers, the plurality of substrate layers being joined together in a stratified arrangement in which said substrate layers (2220, 2230) comprise a integrated signal processing circuitry, said integrated signal processing circuitry comprising a fixed signal processing circuitry (2003, 2004) and an adjustable signal processing circuitry (2005, 2006); an input (2001) of signals and an output (2002) of signals, each connected to the integrated signal processing circuitry; Y a cavity (2007) formed through the upper and intermediate layers, said cavity being configured to receive a circuit element added to the assembly after joining the substrate layers and exposing said cavity (2007) connected signal connection terminals to the integrated signal processing circuit to allow connection of the added circuit element to said integrated signal processing circuitry; Y in which the fixed circuitry (2003, 2004) of signal processing acts by altering the electrical characteristics of the signals coupled to that circuitry and in which the alteration characteristics of said fixed circuitry are predetermined at the time of joining the substrate layers, said dielectric assembly being characterized because The adjustable signal processing circuitry (2005, 2006) acts by altering the electrical characteristics of the signals coupled to that circuitry and in which the alteration characteristics of said adjustable circuitry can be changed after joining the substrate layers by means of connecting the circuit components (2102-2109) to the connections of the signal paths in the exposed areas of the substrate surface; the fixed signal processing circuitry (2003, 2004) comprises first and second set impedance matching circuitry; The adjustable signal processing circuitry (2005, 2006) comprises first and second adjustable impedance matching circuitry; the first impedance matching circuitry is connected between the signal input (2001) and the first impedance matching adjustable circuitry; the second impedance matching circuitry is connected between the signal output (2002) and the second impedance matching circuitry; the first adjustable impedance matching circuitry is also connected to the signal connection terminals in the cavity (2007); the second adjustable impedance matching circuitry is also connected to the signal connection terminals in the cavity (2007); Y the fixed and adjustable circuitry (2003, 2004 2005, 2006) of signal processing allows the impedance to be adapted between the signal input (2001) and the signal connection terminals in the cavity (2007) and between the output (2002 ) of signals and signal connection terminals in the cavity (2007). 2. The assembly of claim 1 wherein: The adjustable signal processing circuitry (2005, 2006) comprises a micro-tape circuitry comprising printed circuitry formed on a face of the first of the substrate layers, said face of the first substrate layer being exposed to the air after joining the substrate layers and said micro tape also being located between said face exposed to the air and a ground plane on the other face; Y The fixed signal processing circuitry (2003, 2004) comprises a micro-tape circuitry comprising printed circuitry encased between two substrate layers in which said two substrate layers are also located between ground planes.

3.

The assembly of claim 2 wherein said ground planes are formed by metallizing faces of the substrate layers.

Four.

The assembly of claim 1 wherein the integrated signal processing circuitry further comprises microwave coupler circuitry.

5.

The assembly of claim 1 wherein:

The adaptive characteristics of the impedance of the adjustable circuitry (2005, 2006) of signal processing are alterable by means of the addition of discrete circuit components (2102-2109) to the connections of the signal paths in said exposed areas of the substrate surface, such that, by adding said discrete circuit components (2102-2109), an impedance level configured by the user is presented to the circuitry set (2003, 2004) at a connection point between the fixed and adjustable circuitry.

6.

The assembly of claim 1 wherein said integrated signal processing circuitry further comprises circuitry selected from the group comprising DC blocking circuitry, DC polarization circuitry and an RF load termination.

7.

The assembly of claim 6 wherein the assembly is configured for the addition of an added circuit element to the cavity (2007), said circuit element being selected from the group comprising a microwave circuit, a transistor, a varactor diode, a PIN diode and a Schottky diode.

8.

The assembly of claim 1 wherein:

The assembly further comprises a flange layer (2210) and the cavity (2007) exposes an upper surface of the flange layer (2210), which allows coupling of the added circuit element into the cavity (2007) with the flange layer (2210).

9.

The assembly of claim 8 wherein said flange layer (2210) comprises a substantially homogeneous metal core and said composite substrate layers (2220, 2230) comprise flouropolymer composite material.

10.

The assembly of claim 1 wherein the substrate layers (2220, 2230) comprise ceramic substrate layers that are bonded by adhesive.

eleven.

The assembly of claim 9 wherein the coupling of the circuit element added to the flange layer (2210) comprises a thermal coupling between said circuit element and the flange layer (2210).

12.

The assembly of claim 11 wherein said flange layer (2210) consists of said metal core and metal coatings added to the surfaces of said metal core.

13.

The assembly of claim 12 wherein said metal coatings added to the surface comprise a metal that inhibits the oxidation of said metal core.

14.

The assembly of claim 1 wherein the signal paths on different substrate surfaces are connected by means of metallic interconnecting holes.

fifteen.

A method of manufacturing an assembly (2000) according to any one of claims 1 to 14.