ES2167256B1 - Procedimiento de interconexion de pistas electroconductoras en circuitos impresos de doble cara para aplicaciones de potencia. - Google Patents

Procedimiento de interconexion de pistas electroconductoras en circuitos impresos de doble cara para aplicaciones de potencia.

Info

Publication number
ES2167256B1
ES2167256B1 ES200001796A ES200001796A ES2167256B1 ES 2167256 B1 ES2167256 B1 ES 2167256B1 ES 200001796 A ES200001796 A ES 200001796A ES 200001796 A ES200001796 A ES 200001796A ES 2167256 B1 ES2167256 B1 ES 2167256B1
Authority
ES
Spain
Prior art keywords
electroconductive
power applications
thin
printed circuits
interconnection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES200001796A
Other languages
English (en)
Other versions
ES2167256A1 (es
Inventor
Pitel Jose Luis Cubero
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lear Automotive EEDS Spain SL
Original Assignee
Lear Automotive EEDS Spain SL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lear Automotive EEDS Spain SL filed Critical Lear Automotive EEDS Spain SL
Priority to ES200001796A priority Critical patent/ES2167256B1/es
Publication of ES2167256A1 publication Critical patent/ES2167256A1/es
Application granted granted Critical
Publication of ES2167256B1 publication Critical patent/ES2167256B1/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

Procedimiento de interconexión de pistas electroconductoras en circuitos impresos de doble cara para aplicaciones de potencia, que parte de una placa de base (1) que comprende un substrato laminar dieléctrico (2) recubierto por ambas caras por sendas primeras capas delgadas electroconductoras (3) interconectadas mediante unas capas delgadas electroconductoras (5) de unos agujeros metalizados (4, 40) para posteriormente, ya sea antes o después de formar unas pistas (6) electroconductoras, someter la citada placa (1) a un baño electrolítico para depositar por crecimiento electrolítico una segunda capa gruesa (7) de material electroconductor sobre dichas capas delgadas electroconductoras (3, 5) del substrato dieléctrico (2) y agujeros metalizados (4, 40) hasta conseguir en conjunto un grosor total apto para aplicaciones de potencia. Cuando para realizar un agujero metalizado (4) se parte de un agujero inicial de diámetro mayor que dos veces el grosor final alcanzado, queda formado un pasaje ensu interior que es opcionalmente rellenado con material de soldadura (9).
ES200001796A 2000-07-19 2000-07-19 Procedimiento de interconexion de pistas electroconductoras en circuitos impresos de doble cara para aplicaciones de potencia. Expired - Lifetime ES2167256B1 (es)

Priority Applications (1)

Application Number Priority Date Filing Date Title
ES200001796A ES2167256B1 (es) 2000-07-19 2000-07-19 Procedimiento de interconexion de pistas electroconductoras en circuitos impresos de doble cara para aplicaciones de potencia.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ES200001796A ES2167256B1 (es) 2000-07-19 2000-07-19 Procedimiento de interconexion de pistas electroconductoras en circuitos impresos de doble cara para aplicaciones de potencia.

Publications (2)

Publication Number Publication Date
ES2167256A1 ES2167256A1 (es) 2002-05-01
ES2167256B1 true ES2167256B1 (es) 2003-10-16

Family

ID=8494327

Family Applications (1)

Application Number Title Priority Date Filing Date
ES200001796A Expired - Lifetime ES2167256B1 (es) 2000-07-19 2000-07-19 Procedimiento de interconexion de pistas electroconductoras en circuitos impresos de doble cara para aplicaciones de potencia.

Country Status (1)

Country Link
ES (1) ES2167256B1 (es)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4312897A (en) * 1978-09-18 1982-01-26 Hughes Aircraft Company Buried resist technique for the fabrication of printed wiring
JPS5932915B2 (ja) * 1981-07-25 1984-08-11 「弐」夫 甲斐 スル−ホ−ルを有する配線基板製造方法
FR2759528B1 (fr) * 1997-02-11 2006-12-22 Thomson Csf Procede de realisation de circuits imprimes a double epargne

Also Published As

Publication number Publication date
ES2167256A1 (es) 2002-05-01

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