ES2136153T3 - Procedimiento para impedir una modificacion no autorizada de los datos en un dispositivo con una memoria no volatil. - Google Patents

Procedimiento para impedir una modificacion no autorizada de los datos en un dispositivo con una memoria no volatil.

Info

Publication number
ES2136153T3
ES2136153T3 ES94118960T ES94118960T ES2136153T3 ES 2136153 T3 ES2136153 T3 ES 2136153T3 ES 94118960 T ES94118960 T ES 94118960T ES 94118960 T ES94118960 T ES 94118960T ES 2136153 T3 ES2136153 T3 ES 2136153T3
Authority
ES
Spain
Prior art keywords
data
procedure
prevent
volatile memory
unauthorized modification
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES94118960T
Other languages
English (en)
Inventor
Wolfgang Dipl-Phys Pockrandt
Hartmut Dr Rer Nat Schrenk
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Siemens Corp
Original Assignee
Siemens AG
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=6504502&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ES2136153(T3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Siemens AG, Siemens Corp filed Critical Siemens AG
Application granted granted Critical
Publication of ES2136153T3 publication Critical patent/ES2136153T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/30—Authentication, i.e. establishing the identity or authorisation of security principals
    • G06F21/31—User authentication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
    • G06F21/70—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
    • G06F21/78—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data
    • G06F21/79—Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer to assure secure storage of data in semiconductor storage media, e.g. directly-addressable memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Storage Device Security (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

EN UN DISPOSITIVO CON UNA UNIDAD CENTRAL DE PROCESO (CPU), UNA MEMORIA DE PROGRAMA (ROM) Y UNA MEMORIA PERMANENTE (NVM); LOS DATOS PUEDEN SER CAMBIADOS EN LA MEMORIA (NVM) PERMANENTE SOLAMENTE CUANDO A PARTIR DE UNA INSPECCION DEL RESULTADO DE MODIFICACION DE DATOS SE UTILIZA UN BIT DE CONTROL EN UN REGISTRO (KR) DE CONTROL. LA ORDEN PARA LA UTILIZACION DEL BIT DE CONTROL DEBE ENCONTRARSE SOLAMENTE EN UNA ZONA DE DIRECCION DEFINIDA DEL PROGRAMA DE MODIFICACION DE DATOS Y SER SUPERVISADA POR ELLO POR EL REGISTRO (KR) DE CONTROL.
ES94118960T 1993-12-08 1994-12-01 Procedimiento para impedir una modificacion no autorizada de los datos en un dispositivo con una memoria no volatil. Expired - Lifetime ES2136153T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4341887A DE4341887C2 (de) 1993-12-08 1993-12-08 Verfahren zum Verhindern einer unberechtigten Datenänderung bei einer Vorrichtung mit einem nichtflüchtigen Speicher

Publications (1)

Publication Number Publication Date
ES2136153T3 true ES2136153T3 (es) 1999-11-16

Family

ID=6504502

Family Applications (1)

Application Number Title Priority Date Filing Date
ES94118960T Expired - Lifetime ES2136153T3 (es) 1993-12-08 1994-12-01 Procedimiento para impedir una modificacion no autorizada de los datos en un dispositivo con una memoria no volatil.

Country Status (7)

Country Link
US (1) US5678027A (es)
EP (1) EP0657820B1 (es)
AT (1) ATE182699T1 (es)
DE (2) DE4341887C2 (es)
DK (1) DK0657820T3 (es)
ES (1) ES2136153T3 (es)
GR (1) GR3031269T3 (es)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2757972B1 (fr) * 1996-12-31 1999-02-19 Bull Cp8 Procede de securisation d'un module de securite, et module de securite associe
US5987557A (en) * 1997-06-19 1999-11-16 Sun Microsystems, Inc. Method and apparatus for implementing hardware protection domains in a system with no memory management unit (MMU)
US6535917B1 (en) * 1998-02-09 2003-03-18 Reuters, Ltd. Market data domain and enterprise system implemented by a master entitlement processor
FR2790324B1 (fr) * 1999-02-25 2001-12-28 St Microelectronics Sa Dispositif d'acces securise a des applications d'une carte a puce
EP1538507A1 (fr) * 2003-12-02 2005-06-08 Axalto S.A. Procédé de contrôle d'acces dans une memoire flash et systeme pour la mise en oeuvre d'un tel procédé
US8127145B2 (en) 2006-03-23 2012-02-28 Harris Corporation Computer architecture for an electronic device providing a secure file system
US8041947B2 (en) 2006-03-23 2011-10-18 Harris Corporation Computer architecture for an electronic device providing SLS access to MLS file system with trusted loading and protection of program execution memory
US8060744B2 (en) 2006-03-23 2011-11-15 Harris Corporation Computer architecture for an electronic device providing single-level secure access to multi-level secure file system
US7979714B2 (en) 2006-06-02 2011-07-12 Harris Corporation Authentication and access control device
EP2495690B1 (en) * 2011-03-01 2015-05-13 Nxp B.V. Transponder and method for monitoring access to application data in the transponder
US10635307B2 (en) 2015-06-30 2020-04-28 International Business Machines Corporation Memory state indicator
US10884945B2 (en) 2015-06-30 2021-01-05 International Business Machines Corporation Memory state indicator check operations

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4930578B1 (es) * 1970-09-30 1974-08-14
JPH03276337A (ja) * 1990-03-27 1991-12-06 Toshiba Corp マイクロコントローラ
JPH04357543A (ja) * 1991-02-06 1992-12-10 Fujitsu Ltd メモリのライトプロテクト方式
FR2683357A1 (fr) * 1991-10-30 1993-05-07 Philips Composants Microcircuit pour carte a puce a memoire programmable protegee.
US5325496A (en) * 1991-12-24 1994-06-28 Intel Corporation Selectable pointer validation in a computer system
JPH05225361A (ja) * 1992-02-07 1993-09-03 Mitsubishi Electric Corp レジスタ書換え方式
DE4205567A1 (de) * 1992-02-22 1993-08-26 Philips Patentverwaltung Verfahren zum steuern des zugriffs auf einen speicher sowie anordnung zur durchfuehrung des verfahrens

Also Published As

Publication number Publication date
GR3031269T3 (en) 1999-12-31
EP0657820B1 (de) 1999-07-28
DE59408543D1 (de) 1999-09-02
ATE182699T1 (de) 1999-08-15
DE4341887A1 (de) 1995-06-14
EP0657820A1 (de) 1995-06-14
DK0657820T3 (da) 2000-03-06
US5678027A (en) 1997-10-14
DE4341887C2 (de) 1996-12-19

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