ES2104562T3 - Matriz de memoria direccionable por su contenido. - Google Patents

Matriz de memoria direccionable por su contenido.

Info

Publication number
ES2104562T3
ES2104562T3 ES89304466T ES89304466T ES2104562T3 ES 2104562 T3 ES2104562 T3 ES 2104562T3 ES 89304466 T ES89304466 T ES 89304466T ES 89304466 T ES89304466 T ES 89304466T ES 2104562 T3 ES2104562 T3 ES 2104562T3
Authority
ES
Spain
Prior art keywords
command
commands
content
bus
array
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES89304466T
Other languages
English (en)
Inventor
Patrick T Chuang
Robert L Yau
Hiroshi Yoshida
Moon-Yee Wang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ES2104562T3 publication Critical patent/ES2104562T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90—Details of database functions independent of the retrieved data types
    • G06F16/903—Querying
    • G06F16/90335—Query processing
    • G06F16/90339—Query processing by using parallel associative memories or content-addressable memories

Abstract

UN SISTEMA DE MEMORIA DIRECCIONABLE INCLUYE UNA LINEA DE CELULAS DE MEMORIA DISPUESTAS EN FILAS Y COLUMNAS EN UN ALMACEN DE CELULAS DE N BITS POR M PALABRAS, CON N BITS POR PALABRA, Y UN BUS IÑO QUE TIENE UNA CAPACIDAD DE S BITS, SIENDO N UN MULTIPLO DE S, UN MODO GENERADOR PARA GENERAR UN CONJUNTO DE COMANDOS, QUE INCLUYEN UN COMANDO DE ESCRITURA, OTRO DE LECTURA, Y OTRO DE LECTURA DEL ESTADO, QUE SE CODIFICAN EN S BITS O MENOS, Y MEDIOS DE MULTIPLEXION PARA SUMINISTRAR LOS COMANDOS SELECCIONADOS DE LOS COMANDOS DEL BUS IÑO.
ES89304466T 1988-05-11 1989-05-04 Matriz de memoria direccionable por su contenido. Expired - Lifetime ES2104562T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/193,308 US4888731A (en) 1988-05-11 1988-05-11 Content addressable memory array system with multiplexed status and command information

Publications (1)

Publication Number Publication Date
ES2104562T3 true ES2104562T3 (es) 1997-10-16

Family

ID=22713090

Family Applications (1)

Application Number Title Priority Date Filing Date
ES89304466T Expired - Lifetime ES2104562T3 (es) 1988-05-11 1989-05-04 Matriz de memoria direccionable por su contenido.

Country Status (7)

Country Link
US (1) US4888731A (es)
EP (1) EP0341896B1 (es)
JP (1) JPH0218790A (es)
AT (1) ATE155909T1 (es)
DE (1) DE68928187T2 (es)
ES (1) ES2104562T3 (es)
GR (1) GR3024239T3 (es)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01223697A (ja) * 1988-03-01 1989-09-06 Mitsubishi Electric Corp 内容番地付け記憶装置
US5317708A (en) * 1990-06-29 1994-05-31 Digital Equipment Corporation Apparatus and method for an improved content addressable memory
US5999434A (en) * 1992-01-10 1999-12-07 Kawasaki Steel Corporation Hierarchical encoder including timing and data detection devices for a content addressable memory
US5619446A (en) * 1992-01-10 1997-04-08 Kawasaki Steel Corporation Hierarchical encoder including timing and data detection devices for a content addressable memory
FR2687004B1 (fr) * 1992-01-31 1994-03-18 France Telecom Architecture de memoire associative.
US6122706A (en) * 1993-12-22 2000-09-19 Cypress Semiconductor Corporation Dual-port content addressable memory
US5649149A (en) * 1994-08-01 1997-07-15 Cypress Semiconductor Corporation Integrated content addressable memory array with processing logical and a host computer interface
US5860085A (en) * 1994-08-01 1999-01-12 Cypress Semiconductor Corporation Instruction set for a content addressable memory array with read/write circuits and an interface register logic block
US5446686A (en) * 1994-08-02 1995-08-29 Sun Microsystems, Inc. Method and appartus for detecting multiple address matches in a content addressable memory
JP3140695B2 (ja) * 1996-10-17 2001-03-05 川崎製鉄株式会社 連想メモリ装置
KR100265362B1 (ko) * 1997-12-30 2000-09-15 김영환 직병렬 방식을 이용한 마이크로프로세서의 데이터송수신 방법
EP0936625A3 (en) 1998-02-17 2003-09-03 Texas Instruments Incorporated Content addressable memory (CAM)
US6336113B1 (en) * 1998-12-30 2002-01-01 Kawasaki Steel Corporation Data management method and data management apparatus
US6763425B1 (en) * 2000-06-08 2004-07-13 Netlogic Microsystems, Inc. Method and apparatus for address translation in a partitioned content addressable memory device
US6944709B2 (en) 1999-09-23 2005-09-13 Netlogic Microsystems, Inc. Content addressable memory with block-programmable mask write mode, word width and priority
US6934795B2 (en) 1999-09-23 2005-08-23 Netlogic Microsystems, Inc. Content addressable memory with programmable word width and programmable priority
JP2002288041A (ja) * 2001-03-23 2002-10-04 Sony Corp 情報処理装置および方法、プログラム格納媒体、並びにプログラム
US7017089B1 (en) * 2001-11-01 2006-03-21 Netlogic Microsystems, Inc Method and apparatus for testing a content addressable memory device
US7401181B1 (en) * 2002-05-29 2008-07-15 Core Networks Llc System and method for comparand reuse
US7174419B1 (en) * 2003-05-30 2007-02-06 Netlogic Microsystems, Inc Content addressable memory device with source-selecting data translator
US7920399B1 (en) 2010-10-21 2011-04-05 Netlogic Microsystems, Inc. Low power content addressable memory device having selectable cascaded array segments
US8467213B1 (en) 2011-03-22 2013-06-18 Netlogic Microsystems, Inc. Power limiting in a content search system

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2712575C2 (de) * 1977-03-22 1985-12-19 Walter Dipl.-Ing. 8011 Putzbrunn Motsch Assoziatives Speichersystem in hochintegrierter Halbleitertechnik
US4310901A (en) * 1979-06-11 1982-01-12 Electronic Memories & Magnetics Corporation Address mapping for memory

Also Published As

Publication number Publication date
GR3024239T3 (en) 1997-10-31
EP0341896A2 (en) 1989-11-15
ATE155909T1 (de) 1997-08-15
DE68928187D1 (de) 1997-08-28
EP0341896B1 (en) 1997-07-23
EP0341896A3 (en) 1992-10-21
DE68928187T2 (de) 1998-02-19
JPH0218790A (ja) 1990-01-23
US4888731A (en) 1989-12-19

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