ES2083296T3 - Sistema de ordenador con al menos un microprocesador y al menos un coprocesador y procedimiento para su obtencion. - Google Patents

Sistema de ordenador con al menos un microprocesador y al menos un coprocesador y procedimiento para su obtencion.

Info

Publication number
ES2083296T3
ES2083296T3 ES93917544T ES93917544T ES2083296T3 ES 2083296 T3 ES2083296 T3 ES 2083296T3 ES 93917544 T ES93917544 T ES 93917544T ES 93917544 T ES93917544 T ES 93917544T ES 2083296 T3 ES2083296 T3 ES 2083296T3
Authority
ES
Spain
Prior art keywords
processor
microprocessor
computer system
procedure
obtaining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES93917544T
Other languages
English (en)
Inventor
Klaus Buchenrieder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Application granted granted Critical
Publication of ES2083296T3 publication Critical patent/ES2083296T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units
    • G06F9/3893Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897Concurrent instruction execution, e.g. pipeline, look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path

Abstract

LA INVENCION SE REFIERE A UN SISTEMA DE ORDENADOR CON AL MENOS UN MICROPROCESADOR Y UN COPROCESADOR, SIENDO EL COPROCESADOR (COP) DE HARDWARE CONFIGURADO DE TAL MODO QUE LA FUNCION REALIZADA POR EL COPROCESADOR ES AJUSTABLE EN DEPENDENCIA DEL PROGRAMA A SER EJECUTADO. EL COPROCESADOR ESTA FABRICADO A PARTIR DE UNIDADES FUNCIONALES EJECUTANDO CADA UNA DE ELLAS UNA FUNCION Y CON CANALES DE CABLEADO PROGRAMABLES QUE PERMITEN UNA CONEXION A SER ESTABLECIDA ENTRE LA UNIDAD FUNCIONAL Y EL MICROPROCESADOR. CUANDO SE EJECUTA UN PROGRAMA DE APLICACION, ES POR TANTO POSIBLE LA CONFIGURACION DE UNO O MAS COPROCESADORES DE ACUERDO CON EL CODIGO DE PROGRAMA Y DE AQUI UNA EJECUCION DE PROGRAMA ACELERADA.
ES93917544T 1992-08-28 1993-08-11 Sistema de ordenador con al menos un microprocesador y al menos un coprocesador y procedimiento para su obtencion. Expired - Lifetime ES2083296T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4228761 1992-08-28

Publications (1)

Publication Number Publication Date
ES2083296T3 true ES2083296T3 (es) 1996-04-01

Family

ID=6466703

Family Applications (1)

Application Number Title Priority Date Filing Date
ES93917544T Expired - Lifetime ES2083296T3 (es) 1992-08-28 1993-08-11 Sistema de ordenador con al menos un microprocesador y al menos un coprocesador y procedimiento para su obtencion.

Country Status (5)

Country Link
EP (1) EP0657044B1 (es)
DE (1) DE59301609D1 (es)
DK (1) DK0657044T3 (es)
ES (1) ES2083296T3 (es)
WO (1) WO1994006077A1 (es)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19647181A1 (de) * 1996-11-14 1998-05-20 Siemens Ag Zur Abarbeitung von Softwareprogrammen ausgelegte integrierte Schaltung
DE19651527A1 (de) * 1996-12-11 1998-06-25 Siemens Ag Rechneranordnung und Verfahren zur Durchführung von einer Folge von Programmbefehlen
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
US6438737B1 (en) * 2000-02-15 2002-08-20 Intel Corporation Reconfigurable logic for a computer
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
WO2003025770A2 (de) * 2001-09-07 2003-03-27 Pact Xpp Technologies Ag Rekonfigurierbares system
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
GB0215034D0 (en) * 2002-06-28 2002-08-07 Critical Blue Ltd Architecture generation method
GB0215033D0 (en) * 2002-06-28 2002-08-07 Critical Blue Ltd Instruction set translation method
WO2004021176A2 (de) * 2002-08-07 2004-03-11 Pact Xpp Technologies Ag Verfahren und vorrichtung zur datenverarbeitung
KR20050085545A (ko) * 2002-12-12 2005-08-29 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 코프로세서, 코프로세싱 시스템, 집적 회로, 수신기, 기능유닛 및 인터페이싱 방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4694416A (en) * 1985-02-25 1987-09-15 General Electric Company VLSI programmable digital signal processor
US4829380A (en) * 1987-12-09 1989-05-09 General Motors Corporation Video processor
US5301344A (en) * 1991-01-29 1994-04-05 Analogic Corporation Multibus sequential processor to perform in parallel a plurality of reconfigurable logic operations on a plurality of data sets

Also Published As

Publication number Publication date
EP0657044B1 (de) 1996-02-07
WO1994006077A1 (de) 1994-03-17
EP0657044A1 (de) 1995-06-14
DE59301609D1 (de) 1996-03-21
DK0657044T3 (da) 1996-03-25

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