ES2004645A6 - Una arquitectura de computadora para una maquina entendedora de imagenes - Google Patents

Una arquitectura de computadora para una maquina entendedora de imagenes

Info

Publication number
ES2004645A6
ES2004645A6 ES8702097A ES8702097A ES2004645A6 ES 2004645 A6 ES2004645 A6 ES 2004645A6 ES 8702097 A ES8702097 A ES 8702097A ES 8702097 A ES8702097 A ES 8702097A ES 2004645 A6 ES2004645 A6 ES 2004645A6
Authority
ES
Spain
Prior art keywords
level
processing
processing elements
architecture
operating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES8702097A
Other languages
English (en)
Inventor
James G Nash
David B Shu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Publication of ES2004645A6 publication Critical patent/ES2004645A6/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G06F15/8023—Two dimensional arrays, e.g. mesh, torus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/20—Processor architectures; Processor configuration, e.g. pipelining

Abstract

SE DESCRIBE UNA ARQUITECTURA DE COMPUTADORA PARA ANALIZAR PROBLEMAS DE ENTENDIMIENTO AUTOMATICO DE IMAGENES. LA ARQUITECTURA ESTA DISEÑADA DE MODO QUE PUEDE REALIZAR EFICAZMENTE UN AMPLIO ESPECTRO DE TAREAS QUE VAN DESDE LAS TAREAS DE BAJO NIVEL O DE PROCESAMIENTO ICONICO HASTA LAS TAREAS DE ALTO NIVEL O DE PROCESAMIENTO SIMBOLICO. UN PRIMER NIVEL (12) DE ELEMENTOS DE PROCESAMIENTO DE IMAGEN ESTA PREVISTO PARA OPERAR EN LA MATRIZ DE IMAGEN SOBRE UNA BASE DE UN PIXEL POR ELEMENTO DE PROCESAMIENTO. UN SEGUNDO NIVEL (14) DE ELEMENTOS DE PROCESAMIENTO ESTA PREVISTO PARA OPERAR SOBRE UNA PLURALIDAD DE PIXELES ASOCIADOS CON UNA AGRUPACION DADA DE ELEMENTOS DE PROCESAMIENTO DEL PRIMER NIVEL. UN TERCER NIVEL (16) DE ELEMENTOS DE PROCESAMIENTO ESTA DISEÑADO PARA INSTRUIR A LOS ELEMENTOS DE PROCESAMIENTO DE LOS NIVELES PRIMERO Y SEGUNDO, ASI COMO PARA AOPERAR SOBRE UN SEGMENTO MAYOR DE LA MATRIZ. HAY DISPUESTA UNA COMPUTADORA CENTRAL (18) QUE COMUNICA DIRECTAMENTE CON AL MENOS CADA ELEMENTO DE PROCESAMIENTO DEL TERCER NIVEL. SE PROPORCIONA UN ALTO GRADO DE PARALELISMO DE MODO QUE LA INFORMACION PUEDE TRANSFERIRSE FACILMENTE DENTRO DE LA ARQUITECTURA A ALTAS VELOCIDADES.
ES8702097A 1986-07-18 1987-07-17 Una arquitectura de computadora para una maquina entendedora de imagenes Expired ES2004645A6 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/887,847 US4809347A (en) 1986-07-18 1986-07-18 Computer vision architecture

Publications (1)

Publication Number Publication Date
ES2004645A6 true ES2004645A6 (es) 1989-01-16

Family

ID=25391978

Family Applications (1)

Application Number Title Priority Date Filing Date
ES8702097A Expired ES2004645A6 (es) 1986-07-18 1987-07-17 Una arquitectura de computadora para una maquina entendedora de imagenes

Country Status (7)

Country Link
US (1) US4809347A (es)
EP (1) EP0276237B1 (es)
JP (1) JP2624733B2 (es)
DE (1) DE3780615T2 (es)
ES (1) ES2004645A6 (es)
IL (1) IL82826A (es)
WO (1) WO1988000737A1 (es)

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Also Published As

Publication number Publication date
JP2624733B2 (ja) 1997-06-25
US4809347A (en) 1989-02-28
EP0276237A1 (en) 1988-08-03
DE3780615T2 (de) 1993-03-11
IL82826A0 (en) 1987-12-20
DE3780615D1 (de) 1992-08-27
IL82826A (en) 1990-12-23
JPH01500780A (ja) 1989-03-16
EP0276237B1 (en) 1992-07-22
WO1988000737A1 (en) 1988-01-28

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 20010301