EP4592822A3 - Gleitkomma-umsetzungsverfahren, einrichtung, chip, einrichtung und medium - Google Patents

Gleitkomma-umsetzungsverfahren, einrichtung, chip, einrichtung und medium

Info

Publication number
EP4592822A3
EP4592822A3 EP25182135.1A EP25182135A EP4592822A3 EP 4592822 A3 EP4592822 A3 EP 4592822A3 EP 25182135 A EP25182135 A EP 25182135A EP 4592822 A3 EP4592822 A3 EP 4592822A3
Authority
EP
European Patent Office
Prior art keywords
data
floating
exponent
point
point number
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP25182135.1A
Other languages
English (en)
French (fr)
Other versions
EP4592822A2 (de
Inventor
Hexin BAO
Xueliang Du
Bowen Li
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunlunxin Technology Beijing Co Ltd
Original Assignee
Kunlunxin Technology Beijing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kunlunxin Technology Beijing Co Ltd filed Critical Kunlunxin Technology Beijing Co Ltd
Publication of EP4592822A2 publication Critical patent/EP4592822A2/de
Publication of EP4592822A3 publication Critical patent/EP4592822A3/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/01—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising
    • G06F5/012—Methods or arrangements for data conversion without changing the order or content of the data handled for shifting, e.g. justifying, scaling, normalising in floating-point computations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/483—Computations with numbers represented by a non-linear combination of denominational numbers, e.g. rational numbers, logarithmic number system or floating-point numbers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/499—Denomination or exception handling, e.g. rounding or overflow
    • G06F7/49942—Significance control
    • G06F7/49947—Rounding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
    • G06F7/556—Logarithmic or exponential functions
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
    • H03M7/14—Conversion to or from non-weighted codes
    • H03M7/24—Conversion to or from floating-point codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Optimization (AREA)
  • Nonlinear Science (AREA)
  • Complex Calculations (AREA)
EP25182135.1A 2024-09-05 2025-06-11 Gleitkomma-umsetzungsverfahren, einrichtung, chip, einrichtung und medium Pending EP4592822A3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202411244839.XA CN121680777A (zh) 2024-09-05 2024-09-05 用于浮点转换的方法、装置、芯片、设备和介质

Publications (2)

Publication Number Publication Date
EP4592822A2 EP4592822A2 (de) 2025-07-30
EP4592822A3 true EP4592822A3 (de) 2026-01-07

Family

ID=95938183

Family Applications (1)

Application Number Title Priority Date Filing Date
EP25182135.1A Pending EP4592822A3 (de) 2024-09-05 2025-06-11 Gleitkomma-umsetzungsverfahren, einrichtung, chip, einrichtung und medium

Country Status (5)

Country Link
US (1) US20250309915A1 (de)
EP (1) EP4592822A3 (de)
JP (1) JP2025131831A (de)
KR (1) KR20250097756A (de)
CN (1) CN121680777A (de)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20230214179A1 (en) * 2021-12-30 2023-07-06 Texas Instruments Incorporated Floating point fused multiply add with merged 2's complement and rounding

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20230214179A1 (en) * 2021-12-30 2023-07-06 Texas Instruments Incorporated Floating point fused multiply add with merged 2's complement and rounding

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
GOLDBERG DAVID: "Computer Arithmetic", COMPUTER ARCHITECTURE: A QUANTITATIVE APPROACH (SIXTH EDITION), 23 November 2017 (2017-11-23), XP093340375, ISBN: 978-0-12-811905-1, Retrieved from the Internet <URL:https://shop.elsevier.com/books/book-companion/9780128119051> *
SANTORO M R ET AL: "Rounding algorithms for IEEE multipliers", COMPUTER ARITHMETIC, 1989., PROCEEDINGS OF 9TH SYMPOSIUM ON SANTA MONICA, CA, USA 6-8 SEPT. 1989, WASHINGTON, DC, USA,IEEE COMPUT. SOC. PR, US, 6 September 1989 (1989-09-06), pages 176 - 183, XP010033240, ISBN: 978-0-8186-8963-5, DOI: 10.1109/ARITH.1989.72824 *

Also Published As

Publication number Publication date
KR20250097756A (ko) 2025-06-30
CN121680777A (zh) 2026-03-17
US20250309915A1 (en) 2025-10-02
EP4592822A2 (de) 2025-07-30
JP2025131831A (ja) 2025-09-09

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Weisstein Hypothesis testing

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