EP4473554A1 - Transistor non-volatil à effet de champ à base de gaz bidimensionnel d'électrons - Google Patents
Transistor non-volatil à effet de champ à base de gaz bidimensionnel d'électronsInfo
- Publication number
- EP4473554A1 EP4473554A1 EP23702347.8A EP23702347A EP4473554A1 EP 4473554 A1 EP4473554 A1 EP 4473554A1 EP 23702347 A EP23702347 A EP 23702347A EP 4473554 A1 EP4473554 A1 EP 4473554A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- remanent
- contact
- volatile
- channel
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
- H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D30/481—FETs having two-dimensional material channels, e.g. transition metal dichalcogenide [TMD] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/701—IGFETs having ferroelectric gate insulators, e.g. ferroelectric FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/031—Manufacture or treatment of data-storage electrodes
- H10D64/033—Manufacture or treatment of data-storage electrodes comprising ferroelectric layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/689—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having ferroelectric layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/253—Multistable switching devices, e.g. memristors having three or more electrodes, e.g. transistor-like devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/223—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements using MOS with ferroelectric gate insulating film
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
- G11C11/225—Auxiliary circuits
- G11C11/2275—Writing or programming circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
- G11C2213/50—Resistive cell structure aspects
- G11C2213/53—Structure wherein the resistive material being in a transistor, e.g. gate
Definitions
- the present invention relates to a non-volatile two-dimensional electron gas field effect transistor.
- a field-effect transistor is often referred to by the acronym FET, which refers to the corresponding English name of “Field-Effect Transistor”. Such a transistor is often used as a switch or an amplifier.
- a field-effect transistor is a unipolar device with three terminals (drain, source and gate) based on the action of an electric field on the conductivity of a channel located between the drain and the source.
- the carriers, electrons or holes are free to move between the source and the drain under the action of a voltage applied between these two terminals.
- the conductance of the channel is controlled by applying a voltage to the gate.
- Many types of field effect transistors exist depending on the nature of the carrier (electron or hole) or the nature of the electrical control exerted on the channel.
- Field-effect transistors are currently constructed using various semiconductor materials, including mostly single-crystal silicon-based materials. Other materials are nevertheless used, such as amorphous silicon, polycrystalline silicon, gallium arsenide or gallium nitride.
- a power supply makes it possible to maintain the on state (i.e. non-zero channel conductivity) or off state (zero channel conductivity) of the transistor, since this state depends on the voltage applied to the grid.
- This state is volatile: if the power supply is cut, the voltage applied to the gate necessarily becomes zero, and the state is not preserved. Applying a voltage constantly to maintain the memory state results in the consumption of power to maintain the state of the transistor. This consumption is said to be static because it is linked to the appearance of leakage currents, and not to the dynamic process of writing or reading the memory.
- Non-volatile field effect transistors therefore able to maintain the state of the transistor in the absence of electrical power, makes it possible to eliminate the consumption of static energy, and therefore to reduce energy consumption.
- Non-volatility can also make it possible to consider a transistor with additional functionalities, such as a memory function or a logic calculation function.
- Fe-FET ferroelectric field effect transistor
- the Fe-FET comprises a ferroelectric element between the gate and the drain-source channel making it possible to maintain the on or off state in the absence of electrical power.
- Known Fe-FET transistors suffer in particular from limited endurance and contrast between the on state and the off state (sometimes referred to as “ON/OFF contrast”).
- the description describes a non-volatile field effect transistor, the transistor comprising a first electrode called gate electrode comprising a first contact, a second electrode called source, the source comprising a second contact, a third electrode called drain , the drain comprising a third contact, a channel between the drain and the source, the channel consisting of a two-dimensional electron gas, a remanent state subassembly, the remanent state subassembly having at least two states electrically controllable remanent states, the subassembly with remanent states being in contact with the channel, the subassembly with remanent states comprising at least one layer of oxide, and a reducing layer made of at least one reducing material of the metal type, each reducing material of the metal type having an atomic concentration of metallic elements greater than or equal to 50%.
- the first electrode is in contact with the subassembly with remanent states and the application of a voltage between the first contact and a contact among the second contact and the third contact causes a non-volatile modulation of the conductivity of the two-dimensional gas constituting the canal.
- the reducing layer makes it possible to create the two-dimensional gas of electrons forming the channel at the interface between the reducing layer and the subassembly with remanent states.
- the non-volatile transistor has one or more of the following characteristics, taken separately or according to all the technically possible combinations:
- the reducing layer makes it possible to create the two-dimensional gas constituting the channel at the interface between the reducing layer and the remanent state subassembly.
- the reducing layer is a monolayer of metal-type reducing material or a multilayer of metal-type reducing materials, this or these reducing materials each having an atomic concentration of metallic elements greater than or equal to 50%.
- the sub-assembly with remanent states comprises at least one non-volatile dielectric layer or multilayer with electrical control, by ferroelectric effect, by trapped charge effect, by ion migration effect or by combination of several of these effects.
- each metal-type reducing material has an atomic concentration of metallic elements greater than or equal to 80%.
- each metallic element is chosen from the list consisting of aluminium, tantalum, yttrium, magnesium and ruthenium.
- the transistor comprises a substrate on which rests the drain, the source and the reducing layer, the reducing layer, the channel and the sub-assembly with remanent states forming in this order a stack, and the first electrode rests on the sub-assembly in remanent states.
- the sub-assembly with remanent states rests on the first electrode, the drain, the channel and the source rest on the sub-assembly with remanent states, and the reducing layer is placed on the channel.
- the non-volatile transistor further comprises a protective layer on the reducing layer.
- the subassembly with remanent states comprises a layer chosen from an oxide layer of perovskite oxides, an oxide layer of (Hfi. x Zr x )02, x varying between 0 and 1, optionally doped, and a layer poly(vinylidene fluoride).
- the transistor comprises a read unit, the read unit comprising a sub-unit for applying a voltage between the drain and the source and a sub-unit for measuring the current between the drain and the source.
- the source and the drain are in contact with the ends of the channel.
- FIG. 1 is a schematic representation of an example of a non-volatile two-dimensional electron gas field effect transistor
- FIG. 2 is a schematic representation of another example of a non-volatile two-dimensional electron gas field effect transistor
- FIG. 3 is a graph showing the dependence of the resistance between two contacts as a function of an applied voltage
- - Figure 4 is a graph illustrating the current-voltage characteristic of an example of a transistor in the on and off states
- - Figure 5 is a schematic representation of an example of a transistor with its read and write units.
- a transistor 10 is shown in Figures 1 and 2.
- Transistor 10 is a non-volatile field-effect transistor.
- Transistor 10 comprises three electrodes, a first electrode called gate electrode 12 comprising a first contact C1, a second electrode 14 called source 14 and comprising a second contact C2 and a third electrode 16 called drain 16 and comprising a third contact C3.
- Electrodes are advantageously metallic in nature, or made of a heavily doped semiconductor material.
- Transistor 10 also comprises a sub-assembly with remanent states 18, a channel 20 constituted by a two-dimensional gas of electrons and located between drain 16 and source 14 and a reducing layer 22.
- transistor 10 also includes a read unit 40 and a write unit 42.
- the read unit 40 also includes a voltage application sub-unit 44 and a current measurement sub-unit 46.
- the layers of a stack are layers stacked along a stacking direction.
- the relative notions of bottom and top with respect to the stacking direction are also defined.
- a layer is located lower than another layer if it is lower in the representation on the sheet in Figure 1.
- the non-volatile transistor 10 comprises a substrate 24 on which rests the drain 16, the source 14 and a stack 26 of layers, comprising the reducing layer 22, the channel 20 and the subassembly with remanent states 18, stacked in this order when the stack 26 is traversed from the bottom to the top (the bottom corresponding to the substrate in this case).
- the thickness of a layer is defined as the dimension along the stacking direction of the layer, i.e. the distance between its two faces.
- the gate electrode 12 is in contact with the remanent state subassembly 18.
- the order of the layers of the stack 26 can be reversed as shown in figure 2.
- the stack 28 comprises a protective layer 30 resting on the reducing layer 22.
- the protective layer 30 is, for example, SiOs.
- the source 14 and the drain 16 are in contact with a respective end of the channel 20.
- the remanent state subassembly 18 has at least two electrically controllable remanent states. Electrical control is obtained here by applying a voltage between the first contact C1 and the second or third contact C2 or C3.
- the remanent state subassembly 18 is characterized by a non-linear relationship between the applied voltage and the apparent stored charge following a hysteresis cycle, and giving rise to at least two remanent states.
- the subassembly with remanent states 18 is a dielectric layer or a stack of non-volatile dielectric layers electrically controlled by ferroelectric effect, by trapped charge effect, by ion migration effect or by combination of several of these effects.
- the remanent states correspond to variations in the ferroelectric polarization, in the amount of trapped charges, or in the positions of the ions, or combinations of these variations.
- the subassembly comprises at least one oxide layer made of a material chosen from perovskite oxides, or oxides based on HfOs, possibly doped with other elements, such as (Hfi. x Zr x ) 02 or (Hfi. x Ga x )C>2 (x varying between 0 and 1), or their alloys, or poly(vinylidene fluoride).
- a material chosen from perovskite oxides, or oxides based on HfOs possibly doped with other elements, such as (Hfi. x Zr x ) 02 or (Hfi. x Ga x )C>2 (x varying between 0 and 1), or their alloys, or poly(vinylidene fluoride).
- Perovskite oxides exhibit an ABO3 type structure where A and B are cations.
- [1 -x]Pb(Mgi / 3 Nb2/3)O3 - xPbTiOs with x varying between 0 and 1) are examples of such materials.
- BiFeOs possibly doped, for example with rare earths on the Bi site, or with Mn on the Fe site
- SrTiOs possibly doped
- KTiOs are examples of such materials.
- Pro 2 Cao 2 MnOs (optionally doped) or YMnOs (optionally doped) are examples of such materials.
- the use of the dielectric material to produce the sub-assembly with remanent states 18 makes it possible to electrically control in a non-volatile manner the conductivity of the channel 20.
- the existence of the remanent states comes from a ferroelectric effect, a trapped charge effect, an ion migration effect or a combination of several of these effects.
- the predominant effect depends on the materials and the deposition conditions of the layers constituting the subassembly with remanent states 18.
- the coercive electric field of the dielectric element and its thickness are sufficiently weak so that the writing device 14 can write the remanent states at voltages compatible with microelectronic technologies, that is to say voltages below 10 volts ( ⁇ 10 V).
- a thickness of less than 100 nm and advantageously less than 50 nm in the aforementioned materials makes it possible to obtain such properties.
- the subassembly with remanent states 18 is also enduring to cycling, typically capable of withstanding at least 10 4 cycles.
- the channel 20 is constituted by a two-dimensional gas of electrons, that is to say a confined gas of electrons which forms at the interface between two layers, whereas it does not exist in the volume of the materials. taken separately.
- the channel 20 is therefore an electron gas forming at the interface between the sub-assembly with remanent states 18 and the reducing layer 22. It comprises a present high density of carriers (typically greater than or equal to 10 10 cm' 2 ). The confinement is such that it can be considered that this gas is two-dimensional, only the vicinity of the interface being conductive.
- the electron gas of the channel 20 being created at the interface between the sub-assembly with remanent states 18 and the reducing layer 22, its properties and in particular its resistance depend directly on the state of the sub-assembly with remanent states 18.
- the resistance of the two-dimensional electron gas and therefore of the channel 20 is therefore electrically adjustable in a non-volatile manner according to the state of the subassembly with remanent states 18. It is thus possible to modulate the resistance of the channel 20 by choosing the remanent state of the subset with remanent states 18.
- the reducing layer 22 makes it possible to create the two-dimensional gas of electrons forming the channel at the interface between the reducing layer 22 and the remanent state subassembly 18.
- the reducing layer 22 is made of a reducing material having an atomic concentration of metallic elements greater than or equal to 50%, preferably greater than or equal to 80%.
- the atomic concentration is the ratio between the number of atoms of metallic elements and the total number of atoms.
- the reducing layer 22 is a reducing layer that can be described as metal type.
- each metallic element of the reducing layer 22 is chosen from among Al, Ta, Ru, Pt, W, Ir, Mo, Ti, Y, Au, or an alloy of these elements such as PtW.
- each metallic element is chosen from the list consisting of aluminium, tantalum, yttrium, magnesium and ruthenium.
- the reducing layer 22 is a multilayer.
- each layer of said multilayer has, here again, an atomic concentration of metallic elements greater than or equal to 50%, preferably greater than or equal to 80%.
- the reducing layer 22 allows the formation of the two-dimensional gas of electrons in contact with the subassembly with remanent states 18.
- the channel 20 formed by a two-dimensional gas of electrons is very different from the channel of a conventional transistor field effect, in which there is no reducing layer.
- the carriers appear reversibly in the semiconductor material (generally in doped Si), by application of a gate voltage creating an electrostatic field.
- the reducing layer 22 has a thickness less than or equal to 15 nanometers (nm).
- the thickness of the reducing layer 22 is preferably chosen so that it is completely oxidized by bringing it into contact with the remanent state subassembly 18, so that its conductivity is as low as possible.
- the source 14 and the drain 16 are in contact with a respective end of the channel 20, and thus electrically connected to each other via this channel 20.
- Each of the electrodes 12, 14 and 16 are preferably made of metallic conductive material or doped semiconductor, so as to have a high conductivity.
- transistor 10 is now described with reference to Figures 3 and 4.
- the subassembly with remanent states 18 has two states denoted A and B.
- FIG. 3 shows the dependence of the resistance between the second contact C2 and the third contact C3 as a function of the voltage applied between the first contact C1 and the second contact C2 (gate voltage V g ). It is clearly observed that the variation in conductivity of channel 20 as a function of the gate voltage exhibits a hysteresis, corresponding to the 2 remanent states A and B of the subassembly.
- writing is performed by the writing unit by applying a voltage between the first contact C1 and the second contact C2.
- Writing could also be done by replacing the second contact C2 with the third contact C3.
- the application of a negative voltage between the first contact C1 and the second contact C2 initializes the remanent state subassembly 18 in the remanent state A, resulting in a low conductivity of the channel 20.
- the application of a positive voltage induces a strong conductivity of the channel 20, corresponding to the remanent state B of the subset with remanent states 18.
- the sign of the voltages giving the remanent states of high and low resistance can be reversed.
- it may be the application of a positive voltage between the first contact C1 and the second contact C2 which results in a remanent state with low conductivity of the channel 20.
- it is the application of a voltage negative which will induce a remanent state corresponding to a strong conductivity of the channel 20.
- the read unit 40 non-destructively reads the remanent state by applying a voltage between the second contact C2 and the third contact C3 using the voltage application sub-unit 44 and measuring the resulting current between these two contacts C2 and C3 using the measurement subunit 46.
- the current-voltage characteristic between the second contact C2 and the third contact C3 which corresponds to the output characteristic of the transistor 10, is thus controlled by the remanent state of the remanent state subassembly 18.
- the voltage application subunit 44 applies a voltage between the first contact C1 and the second contact C2 so as to obtain any state of the hysteresis cycle.
- Channel 20 conductivity can take more than two states, and thus be used to encode analog, non-binary information, such as a synaptic weight in a neural network for artificial intelligence.
- the transistor 10 which has just been described is a non-volatile field-effect transistor based on a channel 20 of two-dimensional electron gas at the interface between an oxide layer and a reducing layer 22 of the metal type. It is the association of an oxide layer of the sub-assembly with remanent states 18 with the reducing layer 22 which makes it possible to carry out a non-volatile control of the conductivity of the channel 20.
- the presence of an assembly formed by the oxide layer, the two-dimensional electron gas and the reducing layer 22 makes it possible, with respect to non-volatile field effect transistors of the state of the art, to optimize the conductivity of the channel 20, to obtain better endurance, and an improved contrast between the on state and the non-on state.
Landscapes
- Semiconductor Memories (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
Description
Claims
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| FR2200906A FR3132386B1 (fr) | 2022-02-02 | 2022-02-02 | Transistor non-volatil à effet de champ à base de gaz bidimensionnel d’électrons |
| PCT/EP2023/052391 WO2023148196A1 (fr) | 2022-02-02 | 2023-02-01 | Transistor non-volatil à effet de champ à base de gaz bidimensionnel d'électrons |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| EP4473554A1 true EP4473554A1 (fr) | 2024-12-11 |
Family
ID=81749463
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| EP23702347.8A Pending EP4473554A1 (fr) | 2022-02-02 | 2023-02-01 | Transistor non-volatil à effet de champ à base de gaz bidimensionnel d'électrons |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20250159921A1 (fr) |
| EP (1) | EP4473554A1 (fr) |
| JP (1) | JP2025504099A (fr) |
| KR (1) | KR20240147665A (fr) |
| FR (1) | FR3132386B1 (fr) |
| WO (1) | WO2023148196A1 (fr) |
-
2022
- 2022-02-02 FR FR2200906A patent/FR3132386B1/fr active Active
-
2023
- 2023-02-01 WO PCT/EP2023/052391 patent/WO2023148196A1/fr not_active Ceased
- 2023-02-01 EP EP23702347.8A patent/EP4473554A1/fr active Pending
- 2023-02-01 US US18/834,270 patent/US20250159921A1/en active Pending
- 2023-02-01 KR KR1020247025797A patent/KR20240147665A/ko active Pending
- 2023-02-01 JP JP2024545993A patent/JP2025504099A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| US20250159921A1 (en) | 2025-05-15 |
| FR3132386B1 (fr) | 2024-11-22 |
| WO2023148196A1 (fr) | 2023-08-10 |
| FR3132386A1 (fr) | 2023-08-04 |
| KR20240147665A (ko) | 2024-10-08 |
| JP2025504099A (ja) | 2025-02-06 |
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