Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
  • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
  • H01L21/02301—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment in-situ cleaning
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
  • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
• • H—ELECTRICITY
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  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
  • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
  • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
• • H—ELECTRICITY
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  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
  • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
  • H01L21/02181—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
  • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
  • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
  • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
  • H01L21/02299—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
  • H01L21/02312—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour
  • H01L21/02315—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02367—Substrates
  • H01L21/0237—Materials
  • H01L21/02373—Group 14 semiconducting materials
  • H01L21/02381—Silicon, silicon germanium, germanium
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02518—Deposited layers
  • H01L21/02521—Materials
  • H01L21/02538—Group 13/15 materials
  • H01L21/0254—Nitrides
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02365—Forming inorganic semiconducting materials on a substrate
  • H01L21/02656—Special treatments
  • H01L21/02658—Pretreatments
  • H01L21/02661—In-situ cleaning
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
  • H01L21/28008—Making conductor-insulator-semiconductor electrodes
  • H01L21/28264—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being a III-V compound

Definitions

• the present invention relates to the preparation of a microelectronic component comprising the cleaning of a layer based on an III-V material. It finds for example for advantageous application the field of micro-electronics and more particularly the fields of power electronics, sensors and optoelectronics.
• III-V semiconductor materials make these materials particularly attractive for many applications in the field of sensors, optoelectronic components and also power electronics. These materials are generally used in multilayer stacks, at the interface with other materials such as dielectrics. The quality of these interfaces is decisive in the proper functioning of the microelectronic components comprising these stacks.
• LEDs may comprise one or more layers based on gallium nitride (GaN) and/or indium-gallium nitride (InGaN). Defects at the interface of these layers induce recombination phenomena, degrading the operation of the LEDs.
• GaN gallium nitride
• InGaN indium-gallium nitride
• HEMT high-electron-mobility transistors
• GaN and/or AIGaN the defects at the interface between the semi- conductor and insulator strongly degrade the electrical performance of the components. In particular, this poor interface quality results in instabilities and a shift of the threshold voltage towards negative values.
• these transistors display a positive threshold voltage, one then speaks of “normally-off” HEMT transistors.
• wet and/or dry preparation processes are generally employed.
• An object of the present invention is therefore to propose a solution for improving the interface between a layer of type III-V material, more particularly of type III-N, and a layer deposited subsequently.
• a process for preparing a microelectronic component comprising: - a supply of a structure comprising an exposed layer based on an III-V material and having a surface, in a plasma reactor comprising a reaction chamber inside which a substrate comprising said structure is arranged,
• a cleaning of the surface of the exposed layer by a cyclic plasma treatment comprising several treatment cycles, each treatment cycle comprising at least: o a purge of the reaction chamber, o an injection of at least one gas into the reaction chamber and formation of a plasma from said gas in the reaction chamber, during which a bias voltage V bias-substrate is applied to the substrate,
• a layer based on a III-V or III-N material in interface with a layer based on an III-V material and/or based on a metal oxide, the structural defects at the layer interfaces, such as dislocations, element implantation, dangling bonds or gaps, as well as surface contamination such as oxidation of III-V and III-N materials or carbon contamination will degrade the properties of the microelectronic component obtained.
• a cyclic plasma treatment allows a considerably improved cleaning of the surface of the exposed layer while minimizing, and preferably avoiding, a possible degradation of the structure as it can be observed for existing cleaning solutions, in particular those using continuous plasma.
• the exposed layer is thus particularly suitable for receiving the deposition of a second layer, to form a good quality interface.
• the preparation process thus makes it possible to improve the quality of the interface between the layer based on an III-V material and the subsequent layer, compared to existing solutions.
• the application of a bias voltage to the substrate makes it possible to increase the energy of the plasma ions in a precise, controlled manner and independent of the plasma potential V piasma .
• the control of the energy of the ions by the plasma source is limited and unreliable.
• the efficiency of the cyclic plasma treatment can thus be modulated in a precise and controlled manner to further improve the properties of the interface obtained.
• the electrical performance of the component is therefore improved.
• the method in particular avoids shifting the threshold voltage towards negative voltages, and improves the slope below the threshold. The process is thus particularly advantageous for the preparation of transistors, in particular power transistors, having good electrical properties, and in particular for HEMT type transistors.
• the process allows a reduction in the interface states, which can induce parasitic recombinations reducing the light emission efficiency of the LEDs.
• a second aspect relates to a microelectronic component obtained by the method according to the first aspect.
• the component is an LED.
• the component is a transistor, an active layer of which is the layer based on a cleaned III-V material, preferably the microelectronic component is a power transistor, and more preferably a transistor of the HEMT type.
• FIG. 1 schematically represents a cyclic plasma treatment cycle, according to an embodiment of the invention.
• FIG. 2 schematically represents an example of a deposition reactor that can be used to implement the method according to the invention.
• FIG. 3 represents a cross-sectional view of an example of a capacitive electronic component of the metal-insulator-semiconductor type obtained by the method according to the invention.
• FIGS. 4A and 4B represent a graph of the electrical characteristics of the electronic component illustrated in FIG. 3, after treatment by an in-situ N2-H2 plasma, respectively cyclic and continuous on the surface of the GaN-based layer.
• FIG. 5 represents a graph of the evolution of the parameters extracted from FIGS. 4A and 4B, as a function of a cyclic or contained plasma treatment, these parameters being (A): the voltage V3 of the forward curve extracted at a capacity of 8 ⁇ 10 10 F; (B) the hysteresis H between forward and reverse scan extracted for the same capacitance; (C) the slope S of the forward curve calculated between a capacity of 5x10 10 F and 8x10 10 F.
• FIGS. 6A and 6B represent a graph of the electrical characteristics of the electronic component illustrated in FIG. 3, for different gases from which the plasma is formed, according to various embodiments of the method.
• the method includes fabricating the structure.
• the structure is a layer.
• the structure may not be a layer. It can comprise a nanostructure or a plurality of nanostructures.
• a nanostructure is a structure of which at least one dimension is less than 1 millimeter and preferably less than 500 nm (10 9 meters) and preferably less than 100 nm.
• a nanostructure can be three-dimensional (3D). It may for example be a pad or a wire extending along a main direction perpendicular to one face of the support substrate and having, in a plane perpendicular to this main direction, a section of less than 1 millimeter, preferably less than 500 nm, and preferably less than 100 nm.
• the nanostructure can also be a trench or a rib.
• the nanostructure can also be a structure intended to be part of or to form a device such as a transistor or a micromechanical or electromechanical device (MEMS, NEMS, etc.) or even an optical or optoelectronic device (MOEMS, etc.).
• the nanostructure is point-like. It does not extend over the entire substrate. Thus, a face of the substrate extends mainly in a plane and nanostructures extend from this face and in a direction perpendicular to this plane. These nanostructures are therefore discontinuous.
• V bias-substrate and V piasma S have independent.
• V bias-substrate and V piasma are controlled independently.
• the bias voltage V bias-substrate is applied to the platter.
• the bias voltage V bias-substrate is applied only to the platter.
• the bias voltage V bias-substrate is non-zero.
• is substantially greater than or equal to 0 Volts, preferably greater than or equal to 10 Volts. According to an example, the absolute value of the bias voltage
• the bias voltage V bias-subst r at is applied for at least 70% of the plasma formation time TP, preferably at least 90%. According to one example, the bias voltage V bias-subst r at is applied throughout the duration TP of plasma formation.
• the at least one gas injected is based on nitrogen, hydrogen, ammonia, argon, helium or a mixture thereof.
• Neutral gases such as argon or helium can have a physical effect of controlled bombardment of surfaces leading to an improvement in the quality of interfaces by the process.
• Nitrogen and hydrogen can have a physical effect, and also a chemical one, in particular at the level of the vacancies of the III-V material, for example in a GaN network.
• the at least one injected gas is based on at least one of nitrogen and hydrogen, preferably the at least one injected gas comprises dinitrogen, dihydrogen, ammonia , argon or a mixture thereof.
• the gas injected is a mixture of dinitrogen and dihydrogen. It was observed during the development of the invention that this mixture made it possible to improve the electrical properties of the electronic component obtained.
• the at least one injected gas comprises dihydrogen.
• the dihydrogen fraction can be substantially greater than 1%.
• the dihydrogen fraction can be substantially less than 99%.
• the dihydrogen fraction can be substantially between 1% and 99%, preferably substantially equal to 33%.
• the duration of the formation of the plasma is substantially greater than 7 seconds, preferably substantially greater than or equal to 10 seconds. According to one example, the duration of plasma formation is substantially equal to 15 seconds.
• the duration of the purge is substantially greater than or equal to 1 second, preferably substantially greater than or equal to 3 seconds. According to one example, the duration of the purge is substantially equal to 6 seconds.
• the cleaning of the surface comprises a number of cycles less than or equal to 20 cycles, preferably less than or equal to 10 cycles. So, the properties electrical properties of the electronic component obtained are further improved.
• the cleaning cycle comprises only the purge, the injection of the gas and the formation of the plasma from this gas.
• the cycle is preferably free of an additional injection of additional gas during which no plasma is generated.
• the cleaning of the surface comprises a number of cycles greater than or equal to 3 cycles, preferably greater than or equal to 5 cycles, preferably greater than 10 cycles.
• the formation of the plasma is carried out by a remote source.
• the energy of the ions is better controlled, which ensures good cleaning efficiency and good reproducibility of the process.
• the source is an inductive radio frequency source.
• the power of the inductive radiofrequency source is between 100 W and 300 W, preferably 300 W,
• the temperature of the substrate is substantially between 200°C and 350°C.
• the temperature of the substrate is substantially equal to 300°C.
• the temperature of the substrate is substantially equal to the deposition temperature of the second layer.
• the pressure in the reaction chamber is less than or equal to 50 mTorr, preferably equal to 10 mTorr, at least during the formation of the plasma, preferably during cleaning.
• each cycle includes at least one stabilization of the gases injected into the reaction chamber.
• the stabilization is preferably carried out at least before the formation of the plasma.
• each cycle only comprises the steps of purging, stabilizing and forming the plasma.
• the structure is taken from: a layer, a three-dimensional structure, a plurality of three-dimensional structures.
• the exposed layer is based on or made of an III-N material. According to one example, the exposed layer is based on or made of gallium nitride.
• the second layer deposited on the cleaned surface is based on a dielectric material, for example a metal oxide or a metal nitride, for example based on alumina.
• the second layer deposited on the cleaned surface is based on a semiconductor material, for example based on a III-V material, and preferably based on aluminum nitride.
• the microelectronic component is a transistor, an active layer of which is the layer based on a cleaned III-V material, preferably the microelectronic component is a power transistor, and more preferably a transistor of the HEMT type.
• the microelectronic component is a light-emitting diode.
• the microelectronic component being a light-emitting diode, the second layer deposited on the cleaned surface is based on a semiconductor material.
• a substrate, a film, a layer, a gaseous mixture, a plasma "based" on a species A we mean a substrate, a film, a layer, a gaseous mixture, a plasma comprising this species A only or this species A and possibly other species.
• a substrate comprising a structure with an exposed layer can be:
• - either, preferably, a stack in which the structure is a layer deposited on a support layer
• the structure can be self-supporting, i.e. it supports its own weight.
• a plasma based on nitrogen and/or hydrogen can be based on a chemistry comprising only nitrogen and/or hydrogen or comprising nitrogen and/or hydrogen and optionally one or more several other species, for example neutral gases.
• a structure based on a III-V material is a structure made of, or comprising a material comprising at least one species from column III of the periodic table and at least one species from column V of this table.
• a structure based on an III-N material is a structure made of, or comprising a material comprising at least one species from column III of the periodic table and nitrogen (N).
• a lll-N material can therefore for example be taken from among GaN, AIGaN, AlinGaN, InN.
• a structure based on a metal oxide is a structure made of, or comprising a material comprising at least one metal or one metalloid and oxygen.
• a structure based on a metal nitride is a structure made of, or comprising a material comprising at least one metal or one metalloid and nitrogen.
• successive steps of the manufacturing method are described below.
• the adjective “successive” does not necessarily imply, even if this is generally preferred, that the stages follow each other immediately, intermediate stages possibly separating them.
• the term “step” means the performance of part of the method, and can designate a set of sub-steps.
• stage does not necessarily mean that the actions carried out during a stage are simultaneous or immediately successive. Certain actions of a first step can in particular be followed by actions linked to a different step, and other actions of the first step can be repeated later. Thus, the term step does not necessarily mean unitary and inseparable actions in time and in the sequence of the phases of the process.
• dielectric describes a material whose electrical conductivity is low enough in the given application to serve as an insulator.
• a dielectric material preferably has a dielectric constant greater than 4.
• a gas mixture when expressed with percentages, these percentages correspond to fractions of the total flow rate of the gases injected into the reactor.
• a gas mixture for example intended to form a plasma, comprises x% of gas A, this means that the injection rate of gas A corresponds to x% of the total rate of gas injected into the reactor to form the plasma. .
• HEMT type transistors (English acronym for “High Electron Mobility Transistor”) field effect transistors with high electron mobility, sometimes also referred to by the term field effect transistor with heterostructure.
• a transistor includes the superposition of two semiconductor layers having different forbidden bands which form a quantum well at their interface. Electrons are confined in this quantum well to form a two-dimensional electron gas. For reasons of high voltage and temperature resistance, the materials of these transistors are chosen so as to have a wide forbidden energy band.
• microelectronic device any type of device made with the means of microelectronics. These devices include in particular, in addition to devices for purely electronic purposes, micromechanical or electromechanical devices (MEMS, NEMS, etc.) as well as optical or optoelectronic devices (MOEMS, LED, etc.).
• MEMS micromechanical or electromechanical devices
• MOEMS optical or optoelectronic devices
• It can be a device intended to provide an electronic, optical, mechanical function, etc. It can also be an intermediate product intended solely for the production of another microelectronic device.
• the thickness of a layer or of the substrate is measured in a direction perpendicular to the surface along which this layer or this substrate has its maximum extension. The thickness is thus taken along a direction perpendicular to the main faces of the substrate on which the various layers rest.
• the thickness of a layer extending over a side of this element can be measured perpendicular to this side.
• the terms “over”, “overcomes”, “covers”, “underlying”, “opposite” and their equivalents do not necessarily mean “over”. contact of”.
• depositing, transferring, gluing, assembling or applying a first layer to a second layer does not necessarily mean that the two layers are directly in contact with each other, but means that the first layer at least partially covers the second layer by being either directly in contact with it, or by being separated from it by at least one other layer or at least one other element.
• a parameter “substantially equal/greater/less than” a given value means that this parameter is equal/greater/less than the given value, to plus or minus 10%, close to this value.
• a parameter “substantially between” two given values means that this parameter is at least equal to the smallest given value, to plus or minus 10%, close to this value, and at most equal to the largest given value, plus or minus 10%, close to this value.
• Figure 1 illustrates the different steps of a cyclic plasma treatment cycle 1.
• this cycle 1 of steps is repeated several times.
• Each cycle 1 comprises a sequence of purging 10 and formation of a plasma 11 in a plasma reactor 200.
• This reactor can be a plasma deposition reactor such as that illustrated in FIG. 2 and which will be described later.
• it is a reactor configured to perform atomic layer deposition (PEALD).
• PEALD atomic layer deposition
• a substrate comprising a structure 3 comprising an exposed layer 30 based on a III-X material and having a surface 30a is placed in a reaction chamber 210 of the reactor 200.
• Such a structure is for example based on a III-N material.
• this structure is based on or made of GaN. More precisely, this structure will be described as being a layer of GaN. All the characteristics, steps and technical effects which will be described subsequently are perfectly applicable to a structure based on or made of a III-V material other than GaN. Furthermore, all the characteristics, steps and technical effects which will be described subsequently are perfectly applicable to a structure, possibly other than a layer, such as a nanostructure, for example in three dimensions, or a plurality of such structures.
• the substrate can be formed solely from this structure 3 in III-V material.
• this substrate may comprise a support layer surmounted by at least one such structure 3.
• the structure has a free surface 30a, exposed to the species present in the reaction chamber 210.
• Each cycle 1 comprises at least two, and preferably three, main steps.
• Each cycle includes a step 10, usually referred to as purging.
• the function of the purge 10 is to evacuate any gaseous species present in the reaction chamber 210, for example to evacuate the reaction by-products following the plasma treatment.
• the purge is carried out before the formation of the plasma 11.
• This purge 10 generally consists of injecting a neutral gas such as argon (Ar) into the reaction chamber 210.
• Each cycle 1 further comprises an injection of at least one gas into the reaction chamber 210 and a formation of a plasma 11 from this gas. During the formation of the plasma 11, the gases are preferably injected continuously.
• Each cycle comprising an alternation of a purge 10 and the formation of a plasma 11, and this cycle being repeated several times during cleaning, the application of the plasma is split over time. This treatment is therefore referred to as cyclic plasma, as opposed to a treatment where the cleaning is carried out by applying a plasma continuously.
• a bias voltage V bias-subst r at is applied to the substrate, for example via a voltage regulation device such as a radiofrequency power generator.
• the bias voltage of the substrate can be zero, which is not equivalent to not applying a voltage to the substrate.
• the substrate can be biased intrinsically at a voltage different from 0. It is understood that a bias voltage can be applied to the substrate so that V bias-subst r at is zero.
• the bias voltage V bias-subst r at can for example be strictly less than 0 ( ⁇ 0 V).
• This bias voltage V bias-subst r at applied to the substrate is distinct from the potential of the plasma Vpi as m a .
• the bias voltage V bias-subst r at differs indeed of the potential of the plasma V pias m a which is induced, in a perfectly conventional manner by the source of the plasma in order to generate the ions and radicals and thus to initiate the deposition of dielectric.
• the bias voltage V bias-subst r at is controlled independently of the potential of the plasma Vpi as m a induced by the source.
• the bias voltage V bias-subst r at is more particularly applied to a plate for receiving the substrate.
• the reaction chamber 210 comprises a tray 220 for receiving the substrate. This tray can also be qualified as a sample holder.
• the bias voltage V bias-subst r at is applied to the platter.
• the bias voltage V bias-subst r at is applied only to the plate.
• the plate 220 is electrically conductive and the bias voltage V bias-subst r at is applied to this plate 220 by a voltage regulator device 270 to be transmitted to the substrate 3.
• this bias voltage V bias-subst r brings considerable advantages.
• this polarization makes it possible to modulate the energy of the plasma ions in a controlled manner thanks to the regulation device 270.
• the energy of the ions depends in fact on the potential of the plasma and on the polarization voltage of the substrate, according to the following relationship:
• V bias-subst r By applying a bias voltage V bias-subst r at , the effectiveness of the surface ion bombardment can be increased, while preserving the exposed surface 30a. Surface cleaning is thus improved, and therefore the quality of the interface between the exposed layer 30a of III-V material and a subsequent layer 40 is improved. Its repeatability is also improved compared to existing solutions, in particular those using the potential of the plasma V pias m a induced by the plasma source to modulate the ion bombardment which are in practice difficult to control in order to obtain a repeatable result.
• applied is less than 160 V (volts), preferably less than 130 V. It will be noted that this bias voltage is much lower than the bias voltages usually used to carry out etchings or implantations by plasma. Furthermore, this method is preferably implemented in a plasma deposition reactor. Etching plasma reactors are not configured to apply such low bias voltages to the substrate.
• is between 0 volts and 130, for example between is between 10 volts and 130 volts, preferably substantially 40 volts.
• the bias voltage V bias-subst r at is applied for at least 70% of the plasma 11 formation duration TP, preferably at least 90%, and even more preferably for the entire plasma 11 formation duration TP. an example, the bias voltage V bias-subst r at is applied only during the formation of the plasma 11.
• the cycle 1 comprises a stabilization phase 12 of the injected gases.
• This phase is configured in particular to stabilize the flow rate of the gases injected into the reaction chamber 210.
• the gases are injected into the reaction chamber 210 without plasma formation, preferably until their flow rate is stabilized. 'injection.
• the subsequent formation of plasma 11 is better controlled.
• the pressure in the reaction chamber 210 is less than or equal to 50 mTorr, preferably equal to 10 mTorr (with 1
• the chamber pressure during the plasma is adjusted so as to have a non-collision sheath.
• the mean free path of the ions is greater than the thickness of the plasma sheath.
• the pressure in the reaction chamber 210 can in particular be adjusted according to the flow rate of gas injected and the suction by the pump 250.
• the flow rate of injected gas(es) is substantially between 5 and 100 sccm (unit of standard cubic centimeters per minute, abbreviated from English Standard Cubic Centimeters per Minute, and commonly used in the field to measure the flow rate of a gas).
• the flow rate of injected gas(es) is substantially equal to 30 sccm.
• FIG. 2 illustrates a schematic of a plasma reactor 200 that can be used to implement the method.
• the method is implemented in a plasma deposition reactor, in particular to allow the deposition of a dielectric just after the cleaning of the exposed layer.
• the reactor 200 comprises a plasma source 260 offset with respect to the reaction chamber 210.
• the potential of V pias m a is offset from the substrate.
• the effect of the bias voltage V bias-subst r at increases the energy of the plasma ions at the level of the substrate. In the absence of V bias-subst r at , for a zero voltage, the energy of the ions is equal to the product of the charge of the ion by the potential of the plasma V pias m a .
• the effectiveness of the ion bombardment on the surface 30a can thus be better controlled than with respect to a non-remote source or a remote source which is not associated with the application of a bias voltage V bias-subst r at , for example by a second device for regulating the voltage of the substrate.
• the repeatability of cleaning is therefore improved.
• the use of a remote source makes it possible to avoid any direct contact between the plasma in its formation zone and the substrate, which could damage the substrate.
• the use of a remote plasma source also minimizes the directivity of the plasma treatment. The processing of a three-dimensional structure 3, in particular of a nanostructure, is facilitated.
• the method is implemented in an inductively coupled plasma reactor, usually qualified by its acronym ICP from the English term Inductively Coupled Plasma.
• the source is a radiofrequency inductive source, which makes it possible to have a stable plasma at a much lower power compared to other sources, for example a microwave source, typically from 1500 W to 2000 W.
• the power of the inductive radiofrequency source is between 100 and 300 W, preferably 300 W. The more the power of the inductive radiofrequency source is increased, the more the flow of ions which can reach the substrate is increased.
• the reactor 200 comprises a reaction chamber 210 inside which is arranged a plate 220.
• This plate 220 is configured to receive the substrate comprising the structure 3.
• the substrate rests on the plate 220 via a rear surface.
• the front surface 30a of the structure 3 is exposed to the species present in the reaction chamber 210.
• the substrate forms the structure 3 whose exposed surface 30a is to be cleaned.
• the front surface of the substrate therefore constitutes the surface 30a of the structure 3.
• the plate 220 is electrically conductive.
• the reactor comprises a gas inlet 230 making it possible to inject inside the chamber 210 the gases intended to form the chemistry of the plasma as well as the gases intended for the purge phases 10.
• the plasma source 260 is according to one example, an induction coupling device 260, one coil of which is illustrated in FIG. 2, and which allows the formation of the plasma.
• the reactor 200 also includes a valve 240 insulation of the reaction chamber 210.
• the reactor 200 also includes a pump 250 to control the pressure inside the reaction chamber 210 synergistically with the flow rate of the gases injected, and to extract the species present in the chamber reaction 210.
• this reactor 200 comprises a bias device 270 configured to allow the application of the bias voltage V bias-subst r at to the plate 220, for example via a radiofrequency power generator.
• This voltage can ultimately be applied to the substrate 3, at least to its face facing the plate 220, whether this face is electrically conductive or not.
• This polarization device 270 is preferably separate from the plasma source 260.
• This polarization device 270 comprises a control device 271 and makes it possible to apply an alternating voltage to the plate 220.
• this control device 271 comprises a control unit automatic adaptation (qualified by its English term of auto match unit) which adapts the impedance in the chamber and of the ion source to that of the radiofrequency generator.
• This bias device 270 is configured to allow the application to the plate 220 of the bias voltage V bias-subst r at whose amplitude is low, typically less than 160 volts, preferably less than 130 volts.
• the bias device 270 and the plasma source 260 are configured so as to be able to adjust the bias voltage V bias-subst r at applied to the plate 220 independently of the potential of the plasma V pias m a .
• V bias-subst r at and V pias m a Are independent.
• V bias-subst r at and V pias m a are independently controlled.
• the second layer 40 is directly deposited on the cleaned surface.
• the second layer 40 can be deposited by the reactor 200, and more particularly without removing the substrate 3 from the chamber 210 between the cleaning and the deposition of this layer.
• the deposition of this layer 40 can be done by deposition of atomic layers, and preferably by deposition of atomic layers assisted by plasma.
• the second layer 40 can be based on or made of a material based on a chemical element chosen from an element of column III and an element of column V of the periodic table and/or based on a metal oxide.
• the second layer 40 can be based on S1O2 silica.
• the second layer 40 can be based on or made of a dielectric material, for example based on hafnium oxide HfC>2 and preferably based on alumina.
• a layer 30 of GaN is deposited on a silicon substrate and comprises a superficial layer of NID-GaN (NID being the abbreviation for “Unintentionally doped”) with a thickness of 100 nm deposited on a layer of 1 ⁇ m of n-GaN doped at 5 ⁇ 10 17 cm ⁇ 2 .
• NID being the abbreviation for “Unintentionally doped”
• the samples were covered with a layer 40 of alumina produced in-situ by atomic layer deposition (ALD).
• ALD atomic layer deposition
• the alumina layer 40 is obtained thermally during deposition with water vapor as an oxidizing source.
• Nickel then gold electrical contacts 41 are then deposited.
• ALD atomic layer deposition
• the components 4 are characterized by electrical measurements of the "Capacitance-Voltage” (C-V) type at a frequency of 10 kHz and on a plot size of 600 ⁇ m.
• C-V Capacitance-Voltage
• Vi indicates high voltage
• V2 indicates low voltage to represent the polarities for making C-V measurements.
• FIGS. 4A and 4B are graphs respectively illustrating the effect of cyclic plasma (4A) compared to a continuous plasma (4B), for zero bias voltage.
• Figures 4A and 4B compare the effect of a cyclic or continuous N2-H2 chemistry plasma with application of a bias voltage V bias-substrate on the electrical performance of CAPAMIS.
• the plasma duration 11 is 15s and the purge duration 10 is 6s.
• the total duration of the plasma for all the repeated cycles is equal to the duration of the continuous plasma applied to the components, and its duration in seconds is indicated for each curve.
• the plasma duration per cycle is 15 s, i.e. a number of cycles of 0, 5, 10, 20 and 40.
• the curves labeled 0 correspond to curves without plasma cleaning. Parameters of plasma chemistry, purge times 10 and plasma formation 11 are described later.
• a first difference is induced heating of the substrate 3.
• a continuous plasma can induce a significant increase in the temperature of the substrate whereas, during In a cyclic plasma, the purge phases 10 allow it to be cooled between each plasma formation phase 11.
• the cyclic plasma therefore offers better preservation of the structure 3, while allowing effective cleaning of its surface.
• Another notable difference can be observed at the level of the voltage shift of the curves and the slope in the desertion regime. Under the same experimental conditions, continuous plasma treatment induces a shift in the CV curves towards negative voltages, and therefore a decrease in the threshold voltage towards negative values.
• the voltage of the forward curve (V 3 ) taken for a capacitance taken arbitrarily at 8.10 10 F, the hysteresis (H) between the outward and return sweep for the same capacitance and finally the slope of the forward curve (S) taken between a capacity of 5 and 8.10 10 F, are extracted from the CV curves.
• Curves 5a correspond to cyclic plasmas and curves 5b correspond to continuous plasmas.
• the voltage V 3 stagnates up to a total plasma duration of 75 s (ie 5 cycles), gradually decreases and then ends up reaching a new plateau for durations greater than 300 s (ie 20 cycles).
• this voltage V 3 drops abruptly and monotonously when the plasma duration increases.
• the hysteresis H improves and is found to be less than 0.2 V.
• the slope S improves to a duration of 75s then degrades slightly until reaching a plateau.
• it is constant for low plasma durations, improves and stagnates beyond 150 s.
• a continuous plasma or a cyclic plasma therefore each makes it possible to considerably reduce the hysteresis and to improve the slope S of the CAPAMIS.
• the major disparities between these two plasmas appear at the level of the shift in voltage characteristics. Indeed, continuous plasma treatment generates a systematic shift of the CVs towards negative voltages. It is now considered that the underlying mechanism is probably linked to the formation, at the interface, of positive fixed charges whose density would be correlated with the voltage shift and would then increase sharply with the duration of the plasma.
• this voltage reduction should be avoided for many microelectronic components, in particular for the preparation of “normally-off” HEMT type transistors.
• the total plasma formation time T iotai(P) has an influence on the cleaning of the GaN layer.
• the cleaning of the surface comprises a number of cycles less than or equal to 20 cycles, and preferably less than or equal to 10 cycles.
• the total duration of the plasma that is to say the duration of formation of the plasma 11 over all the repeated cycles is less than 150 s, and preferably less than 100 s.
• the duration of plasma formation is greater than 7 seconds, preferably greater than or equal to 10 seconds, and preferably equal to 15 seconds.
• the plasma duration is thus long enough to allow effective cleaning of the layer, while limiting heating of the structure 3.
• the duration of the purge 10 is substantially greater than or equal to 1 second.
• the duration of the purge 10 is substantially greater than or equal to 3 seconds, and more preferably substantially equal to 6 seconds.
• the purge phase is thus long enough to remove the by-products of the reaction between the plasma and the surface 30a of the treated layer.
• Figures 6A and 6B compare the effect of a cyclic plasma on the electrical performance of CAPAMIS, on a GaN layer formed by epitaxy (6A) or on an etched GaN layer (6B), for different plasma chemistries, for a number of cycles of 5, the plasma duration per cycle being 15 s, ie a total plasma duration of 75 s.
• the total gas flow rate was set at 30 sccm to keep constant the residence time of the species formed during the formation of the plasma 11 in the reaction chamber 210.
• the injected gas, or the mixture of injected gases can be based on at least one of nitrogen and hydrogen.
• the at least one injected gas comprises dinitrogen, dihydrogen, ammonia, argon or a mixture thereof.
• the injected gas can be based on nitrogen and hydrogen. It has been observed that treatment with a cyclic plasma based on a mixture of dinitrogen N 2 and dihydrogen H 2 , or ammonia NH 3 made it possible to reduce the hysteresis of the CV curves compared to a plasma based on of dinitrogen without hydrogen, as illustrated by Figures 6A and 6B.
• the gas injected is a mixture of dinitrogen and dihydrogen.
• a plasma formed from a mixture of dinitrogen and dihydrogen was particularly advantageous for cleaning the surface of a layer of GaN , in particular by limiting the offset of the CV curves, and therefore of the threshold voltage, towards negative values, as illustrated by FIGS. 6A and 6B.
• One explanation considered for this would be a better efficiency of a plasma of an N 2 -H 2 mixture to clean the GaN surface, passivate the GaN nitrogen vacancies and fill the dangling bonds. Together with a sufficient plasma duration, the plasma treatment makes it possible to further improve the nitriding of the surface of the GaN layer.
• the dihydrogen fraction is substantially between 1% and 99%, preferably substantially equal to 33%.
• Very low hysteresis was observed for a dihydrogen fraction of substantially 7% (2H 2 -28N 2 ) to 80% (24H 2 -6N 2 ).
• the smallest shift in the CV curves was observed for a dihydrogen fraction of substantially 33% (IOH 2 -2ON 2 ).
• the invention proposes a solution improving the interface of a layer of material of type III-V and more particularly III-N and a layer deposited consecutively.
• the invention is not limited to the embodiments previously described and extends to all the embodiments covered by the invention.
• the present invention is not limited to the examples described above. Many other variant embodiments are possible, for example by combining features previously described, without departing from the scope of the invention. Furthermore, features described in relation to one aspect of the invention may be combined with another aspect of the invention.
• the exposed GaN-based layer is made of GaN.
• the present invention also extends to embodiments in which the GaN-based layer is a layer based on an III-V material.
• the III-N material layer may include at least one of indium and aluminum.
• this GaN-based layer can be GaN, AIGaN, InGaN or AUnGaN.
• the second layer is made of alumina.
• the present invention also extends to the embodiments in which the second layer is based on a metal oxide and/or based on a chemical element chosen from an element of column III and an element of column V of the periodic table.
• all the examples, characteristics, steps and technical advantages mentioned above with reference to a second layer of alumina are applicable to a second layer based on a metal oxide and/or based on a chemical element chosen from one element from column III and one element from column V of the periodic table.
• the invention also extends to embodiments in which the structure is deposited on a silicon-based substrate. Furthermore, in the examples described above, the structure is a layer.
• the structure can be a nanostructure or comprise a plurality of nanostructures.
• the second layer can be a nanostructure or include a plurality of nanostructures.

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