Classifications

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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
  • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
  • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
  • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
  • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
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  • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
  • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
  • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
  • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/02104—Forming layers
  • H01L21/02107—Forming insulating materials on a substrate
  • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
  • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
  • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
  • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
  • H01L21/0228—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
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  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
  • H01L21/28008—Making conductor-insulator-semiconductor electrodes
  • H01L21/28264—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being a III-V compound
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  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
  • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
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  • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
  • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
  • H01L29/51—Insulating materials associated therewith
  • H01L29/511—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
  • H01L29/513—Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
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  • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
  • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
  • H01L29/51—Insulating materials associated therewith
  • H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
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  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
  • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
  • H01L29/92—Capacitors having potential barriers
  • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
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  • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
  • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
  • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
  • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
  • H01L29/2003—Nitride compounds
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  • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
  • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
  • H01L29/76—Unipolar devices, e.g. field effect transistors
  • H01L29/772—Field effect transistors
  • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface

Definitions

• the present invention relates to the production of a dielectric layer, for example based on alumina (Al 2 0 3 ) on a structure, such as a layer or nanostructures based on III-V materials. It finds, for example, for advantageous application the field of microelectronics and more particularly the fields of power electronics, sensors and optoelectronics.
• One of the particularly advantageous applications concerns the production of alumina gate dielectrics to manufacture high electron mobility transistors (HEMTs).
• HEMTs high electron mobility transistors
• HEMTs based on gallium nitride GaN
• an alumina layer is produced by atomic layer deposition, usually designated by the acronym ALD for the English term “atomic layer deposition”.
• ALD techniques are based on a process of self-limiting growth in which the material is deposited layer by layer. It is thus possible to design films at the nanometric scale.
• the ALD technique consists of sequentially injecting precursors of a first species (reagent A), then precursors of a second species (reagent B) into the reaction chamber of a reactor.
• Figure 1 illustrates different steps of an example of cycle 1 of ALD deposition.
• a first step 10 consists in injecting reagent A which reacts with the uncovered surface of the substrate by chemisorption.
• a purge step 20 is then carried out to eliminate the unreacted reagents A as well as the reaction products.
• Reagent B is then injected which reacts with the exposed surface by chemisorption.
• a purge step 40 is then carried out to eliminate the unreacted reagents B as well as the reaction products.
• this cycle 1 is repeated sequentially.
• the dotted arrow and the number N illustrate this iterative nature and the number of cycles carried out.
• alumina (Al 2 0 3 ) by ALD can be done; either by so-called “thermal” ALD, in this case the oxygen-based precursor is water (H 2 0) or ozone (0 3 ); or by so-called “plasma” ALD, in this case the oxygen-based precursor is a plasma based on dioxygen (0 2 ).
• Document US 2015/0137138 A1 discloses a method for manufacturing a transistor comprising the deposition, on a layer of GaN surmounted by an AIGaN layer, of a first gate layer and a second gate layer of alumina.
• Document US2016/0013282 A1 discloses a method for depositing, on a GaN layer, a first gate layer and a second gate layer, for example of alumina.
• the properties of the deposited alumina layers can still be improved.
• a method for producing, on a structure based on a III-V material, a dielectric layer comprising at least one dielectric material capable of being deposited by layer deposition (ALD) using a precursor based on water (H 2 0), ozone (0 3 ) or dioxygen (0 2 ).
• the method comprises the following sequences performed in a plasma reactor comprising a reaction chamber inside which said structure is arranged: producing a first dielectric film by ALD by performing a plurality of first cycles each comprising at least:
• the first dielectric film includes at least the first material and oxygen.
• Plasma-assisted ALD by performing a plurality of second cycles each comprising at least:
• the second film dielectric comprising at least the second material and said species.
• the dielectric layer thus composed of a "thermal” film surmounted by a “plasma” film has significantly improved electrical properties. Furthermore, the quality of the interface between this dielectric layer and the structure underlying it is also significantly improved.
• the thermal dielectric film acts as a protective layer with respect to the surface of the underlying structure and on the other hand that the deposit in plasma mode allows to improve the electrical characteristics of the overall dielectric layer. More precisely, the film deposited in thermal mode limits the oxidation by the plasma of the exposed surface of the underlying structure. On the contrary, it would seem that the deposition in plasma mode oxidizes and passives the underlying structure. For example, in the case of the production of an alumina layer on GaN, the thermal alumina avoids, or even prevents, the oxidation of the exposed surface of GaN at the level of the Al 2 0 3 /GaN interface.
• a precursor based or made of water (H 2 0) is injected into the reaction chamber.
• the water-based precursor is less oxidizing than an ozone-based precursor, and therefore less reactive with the underlying layer.
• the water-based precursor made it possible to limit and preferably to avoid degradation of the underlying layer of the structure with respect to the existing solutions, in particular those implementing an ozone-based precursor.
• the properties of the dielectric layer deposited on the underlying layer based on III-V materials, as well as the interface between these layers, are improved.
• the process can also have at least one of the following characteristics, which can be taken separately or in combination:
• the first material is identical to the second material.
• the first material is different from the second material.
• the plasma based on said species is a plasma based on oxygen (O) created from a precursor consisting of dioxygen (0 2 ) or comprising dioxygen (0 2 ).
• the plasma based on said species is a plasma based on nitrogen (N) created from a precursor consisting of dinitrogen (N 2 ) or comprising dinitrogen (N 2 ).
• N nitrogen
• at least one of the first material and the second material is taken from one of the following materials: aluminum (Al), titanium (Ti), Tantalum (Ta), Zirconium (Zr), Hafnium (Hf ), silicon (Si).
• the first dielectric film is taken from the following materials: Al 2 0 3 , Hf0 2 , Ti0 2 , Ta 2 0 5 , Zr0 2 , Si0 2 , and SiN.
• the second dielectric film is taken from the following materials: Al 2 0 3 , Hf0 2 , Ti0 2 , Ta 2 0 5 , Zr0 2 , Si0 2 , SiN and AlN.
• the first material and the second material are aluminum, the first dielectric film and the second dielectric film are made of Al 2 0 3 .
• the precursor based on the first material and the precursor based on the second material are taken from trimethylaluminium and aluminum trichloride.
• the first dielectric film has a thickness e 71A and the second dielectric film has a thickness e 71B , with e 71A ⁇ e 71B .
• e 71A is between 0.5 and 2 nm.
• the first dielectric film has a thickness e 71A , such that e 71A 3 0.5 nm. This thickness makes it possible to effectively limit the oxidation of the surface of the structure underlying the electrical layer.
• the first dielectric film has a thickness e 71A , such that e 71A £ 2 nm (10 9 meters). This thickness allows the characteristics of the dielectric layer to be mainly dictated by the layer produced by plasma deposition.
• the thickness of the first dielectric film is strictly less than 2 nm, and preferably less than or equal to 1.7 nm. Surprisingly, a thickness strictly less than 2 nm, and preferably less than or equal to 1.7 nm, makes it possible to obtain satisfactory electrical qualities for layer 71.
• each second cycle comprises at least one reaction chamber purge step, the purge step comprising the injection into the reaction chamber of an inert gas, the at least one purge step being carried out at least one and preferably at each of the following instants: after the injection of the precursor based on the second material and before the formation of the plasma, and after the formation of the plasma.
• each second cycle comprises at least one step of stabilizing the gases present in the reaction chamber, the stabilization step being carried out at least before the formation of the plasma.
• the injection of the precursor based on the first material is carried out after the injection into the reaction chamber of the precursor based on water (H 2 0) or ozone (0 3 ).
• the injection of the precursor based on the second material is carried out after the injection into the reaction chamber of the precursor based on basis of the given species and the formation in the reaction chamber of a plasma.
• the structure is one of: a layer, a three-dimensional structure, a plurality of three-dimensional structures.
• the structure is based on a material taken from among the III-N materials.
• the material may be GaN. So the structure is made of
• the second dielectric film is formed directly in contact with the first dielectric film.
• the first dielectric film is formed directly in contact with the structure.
• the structure is a layer.
• it has a face that extends over the entire plate. It may have a flat face. Alternatively, it can take on the shape of reliefs which are underlying it.
• the structure may not be a layer. It can comprise a nanostructure or a plurality of nanostructures.
• a nanostructure is a structure of which at least one dimension is less than 1 millimeter and preferably less than 500 nm (10 9 meters) and preferably less than 100 nm.
• a nanostructure can be three-dimensional (3D). It may for example be a pad or a wire extending in a main direction perpendicular to one face of the support substrate and having, in a plane perpendicular to this main direction, a section of less than 1 millimeter, preferably less than 500 nm, and preferably less than 100 nm.
• the nanostructure can also be a trench or a rib.
• the nanostructure can also be a structure intended to be part of or to form a device such as a transistor or a micromechanical or electromechanical device (MEMS, NEMS, etc.) or even an optical or optoelectronic device (MOEMS, etc.).
• the nanostructure is point-like. It does not extend over the entire plate. Thus, one face of the plate extends mainly in one plane and nanostructures extend from this face and in a direction perpendicular to this plane. It's nanostructures are therefore discontinuous.
• the structure is arranged on a substrate located in the reaction chamber, and, during the formation of the plasma, a bias voltage Vbias is applied to the substrate, in the following designated V iaS-substrate, preferably non-zero .
• the energy of the ions which arrive on the exposed surface of the substrate is perfectly controlled.
• the polarization of the structure during the injection of the precursor based on the given species makes it possible to considerably improve the quality of the second dielectric layer.
• the application of a bias voltage V biaS-substrate to the substrate makes it possible to increase the energy of the plasma ions in a controlled manner and independent of the bias voltage V piaSma induced by the source used to generate the plasma.
• the efficiency of the plasma treatment can thus be modulated in a controlled manner to further improve the properties of the interface obtained.
• the electrical performance of the component is therefore improved.
• the method in particular avoids shifting the threshold voltage towards negative voltages, and improves the slope below the threshold.
• the process is thus particularly advantageous for the preparation of transistors, in particular power transistors, having good electrical properties.
• the structure is made of GaN and is intended to form at least part of a GaN-based device such as a HEMT
• the application of a bias voltage thus makes it possible to considerably increase the performance of such devices. This is the case when the dielectric layer forms a gate dielectric for this type of transistor.
• the bias voltage V ias _substrate is controlled independently of a voltage V piasma induced by a source of said plasma.
• the absolute value of the bias voltage IV ias.SU bstrat I is less than or equal to 160 Volts.
• the absolute value of the bias voltage IV ias.SU bstrat I is greater than or equal to 10 Volts.
• IV bias.SUbstrat l is between 10 Volts and 130 Volts and preferably V ias.SUbstrat is between -10 Volts and -130 Volts. According to one example, IV iaS-substrate l is equal to 85 Volts.
• the bias voltage V biaS-substrate is applied for at least 70%, and preferably 90%, of the duration T 0 of plasma formation. According to one example, the bias voltage V ias -substrate is applied throughout the duration T 0 of the formation of the plasma.
• the bias voltage V ias _substrate is not applied during the injection into the reaction chamber of the precursor based on the second material.
• the bias voltage V ias _substrate is applied only during the plasma formation.
• V ias _substrate is applied throughout the duration of each second cycle.
• each first and second cycle comprises at least one step of purging the reaction chamber, the purging step comprising the injection into the reaction chamber of an inert gas, the at least one step purging being carried out at least one and preferably at each of the following instants: - after the injection of the precursor based on the first material, after the injection of the precursor based on water, after the injection of the precursor based on the second material, and before the formation of the plasma, and after the formation of the plasma.
• the method comprises at least ten first cycles and preferably at least fifty first cycles. Preferably it comprises at least one hundred first cycles and preferably approximately five hundred first cycles.
• the method comprises at least ten second cycles and preferably at least fifty second cycles. Preferably it comprises at least one hundred second cycles and preferably approximately five hundred second cycles.
• FIG. 1 schematically represents a cycle classic of an ALD deposit.
• FIG. 2 schematically represents an example of a method according to the invention. This figure shows that this method comprises a first sequence during which a first cycle is repeated then a second sequence during which a second cycle is repeated.
• FIG. 3 is a diagram of a capacitive device of the Metal-Insulator-Semiconductor type comprising metallic contacts (nickel/gold), a dielectric layer, for example of alumina, surmounting a structure, for example a layer of GaN .
• FIG. 4 schematically represents an example of a deposition reactor that can be used to implement the method according to the invention.
• Figure 5A is a graph illustrating the capacitance - voltage (C-V) characteristics of a device such as that of Figure 3 and comprising a layer of thermal alumina only.
• FIG. 5B is a graph illustrating the measurements of the capacitance-voltage (C-V) characteristics of devices such as that of FIG. 3 and comprising a plasma alumina layer only. These curves also make it possible to compare the impact of the bias voltages used for the deposition.
• C-V capacitance-voltage
• Figure 6 includes graphs, taken from the measurements of Figures 5B and 5A, illustrating the forward curve voltage for a given capacitance, the hysteresis between the forward and reverse sweep for a given capacitance, and the slope of the forward curve .
• FIG. 7 is a graph illustrating the capacitance-voltage (CV) characteristics of devices comprising a thermal alumina layer only or a plasma alumina layer only or even a bilayer formed of a thermal alumina film and a plasma alumina film.
• CV capacitance-voltage
• Figure 8 has graphs, taken from the measurements in Figure 6, illustrating the voltage of the forward curve for a given capacitance, the hysteresis between the forward and reverse sweep for a given capacitance, and the slope of the forward curve.
• Figure 9 is a graph illustrating the capacitance - voltage (C-V) characteristics of devices comprising an alumina bilayer formed of a thermal alumina film and a plasma alumina film.
• the devices studied differ by the relative proportion of the plasma alumina film compared to the thermal alumina film, as well as by the bias voltage used for the deposition of the plasma alumina film.
• thermal dielectric film thermal alumina film or thermal alumina, we mean respectively a dielectric film, an alumina film and alumina produced by a so-called thermal deposition.
• Plasma dielectric film, plasma alumina film or plasma alumina are understood to mean respectively a dielectric film, an alumina film and alumina produced by a so-called plasma deposit.
• a substrate comprising a structure such as a layer or nanostructures based on III-V materials can be: either, preferably, a stack comprising the structure based on III-V material and a layer, typically a support layer on which the structure rests, or a stack comprising only the structure based on III-V material.
• the structure can be self-supporting, i.e. it supports its own weight.
• a substrate based on an III-V material also designates a substrate whose layer based on the III-V material is surmounted by one or more layers deposited during the process described below.
• an exposed surface of the substrate based on the III-V material can be a surface formed by the structure or formed by one or more layers or films deposited on the structure.
• an oxygen-based plasma can be based on a chemistry comprising only oxygen or comprising oxygen and possibly one or more other species, for example neutral gases.
• a nitrogen-based plasma can be based on a chemistry comprising only nitrogen or comprising nitrogen and possibly one or more other species, for example neutral gases.
• a structure based on a III-V material is a structure made from or comprising a material comprising at least one species from column III of the periodic table and at least one species from column V of this table.
• a structure based on a III-N material is a structure made of, or comprising a material comprising at least one species from column III of the periodic table and nitrogen (N).
• a III-N material can therefore for example be taken from among GaN, AlGaN, AlInGaN, InN.
• step refers to the performance of part of the process, and may designate a set of sub-steps.
• stage does not necessarily mean that the actions carried out during a stage are simultaneous or immediately successive. Certain actions of a first step can in particular be followed by actions linked to a different step, and other actions of the first step can be repeated later. Thus, the term step does not necessarily mean unitary and inseparable actions in time and in the sequence of the phases of the process.
• dielectric describes a material whose electrical conductivity is low enough in the given application to serve as an insulator.
• a dielectric material preferably has a dielectric constant greater than 4.
• the spacers are typically formed from a dielectric material.
• HEMT type transistors (acronym for "High Electron Mobility Transistor”) field effect transistors with high mobility of electrons, sometimes also referred to by the term field effect transistor with heterostructure.
• Such a transistor includes the superposition of two semiconductor layers having different forbidden bands which form a quantum well at their interface. Electrons are confined in this quantum well to form a two-dimensional electron gas. For reasons of high voltage and temperature resistance, the materials of these transistors are chosen so as to have a wide forbidden energy band.
• microelectronic device any type of device made with the means of microelectronics. These devices include in particular, in addition to devices for purely electronic purposes, micromechanical or electromechanical devices (MEMS, NEMS, etc.) as well as optical or optoelectronic devices (MOEMS, etc.).
• MEMS micromechanical or electromechanical devices
• MOEMS optical or optoelectronic devices
• the thickness of a layer or of the substrate is measured in a direction perpendicular to the surface along which this layer or this substrate has its maximum extension. The thickness is thus taken along a direction perpendicular to the main faces of the substrate on which the various layers rest.
• the terms “over”, “overcomes”, “covers”, “underlying”, “opposite” and their equivalents do not necessarily mean “over”. contact of”.
• depositing, transferring, gluing, assembling or applying a first layer to a second layer does not necessarily mean that the two layers are directly in contact with each other, but means that the first layer at least partially covers the second layer by being either directly in contact with it, or by being separated from it by at least one other layer or at least one other element.
• FIG. 2 illustrates the different steps involved in each production of a dielectric layer 71 on a structure 70 based on an III-V material. These steps are repeated several times until this dielectric layer has the desired thickness.
• Figure 3 illustrates an example of a structure that can be obtained by implementing the method of Figure 2.
• the proposed method is based on the deposition of the dielectric layer 71 in the form of a stack of two films 71 A and 71 B thus forming a bilayer 71.
• the first film 71 A is deposited in so-called “thermal” mode, that is to say with a precursor based on water (H 2 0) or ozone (0 3 ).
• This first film 71 A has the effect of limiting the oxidation of the surface 70' of the structure 70 on which the dielectric layer is deposited.
• a precursor based on or made of water (H 2 0) is used.
• the oxidation of the surface 70' of the structure 70 on which the dielectric layer is deposited is then still limited, the water (H 2 0) being less oxidizing than the ozone (0 3 ) for the surface 70' of the underlying structure 70.
• the second film 71B is deposited in so-called “plasma” mode, that is to say with the formation of a plasma. It is a plasma based on a given species, taken from oxygen (O) and nitrogen (N). The plasma is formed by injecting a gas comprising said species. It may for example be dioxygen (0 2 ) or dinitrogen (N 2 ).
• This second film 71 B has the advantage of improving the electrical properties of the dielectric layer 71 with respect to thermal deposition. This second film 71 B therefore makes it possible to improve the performance of the device comprising this dielectric layer 71.
• these two films 71 A, 71 B are produced in-situ in the same plasma deposition reactor configured to perform deposition by atomic layer plasma-assisted (PEALD).
• PEALD atomic layer plasma-assisted
• a substrate comprising the structure 70 intended to receive these two films 71A, 71B is placed in a reaction chamber of the reactor. based on a III-V material, for example based on a III-N material.
• this structure 70 is based on GaN. More precisely, this structure 70 will be described as being a layer of GaN. All the characteristics, steps and technical effects that will be described later are perfectly applicable to a structure based on an III-V material other than GaN. Furthermore, all the characteristics, steps and technical effects which will be described subsequently are perfectly applicable to a structure, possibly other than a layer, such as a nanostructure, for example in three dimensions, or a plurality of such structures.
• the substrate can be formed solely from this structure 70 in III-V material.
• this substrate may comprise a support layer surmounted by at least one such structure 70.
• the structure 70 has a free surface 70', exposed to the species present in the reaction chamber.
• the method comprises the following main sequences and steps illustrated in FIG. 2. The method comprises two sequences.
• a first sequence aims to produce the first film 71 A deposited in “thermal” mode.
• a second sequence aims to produce the second film 71 B deposited in “plasma” mode.
• the first sequence comprises the iteration of several cycles referenced 1A in FIG. 2.
• Each cycle 1A comprises at least the following steps.
• a first step comprises the injection 10A into the reaction chamber 210 of a precursor based on a first material.
• This first material is taken from one of of the following materials: aluminum (Al), titanium (Ti), Tantalum (Ta), Zirconium (Zr), Hafnium (Hf), silicon (Si).
• a second step is a purge step 20A.
• This purge 20A is carried out to eliminate the excess of the precursor based on the first material, that is to say to evacuate the reagents of the precursor based on the first material which would not have reacted, as well as the reaction products.
• inert gas such as argon (Ar) or dinitrogen (N 2 ) is injected into the reaction chamber. This step, although advantageous, is only optional.
• a third step comprises an injection 30A into the reaction chamber 210 of a water-based precursor (H 2 0), preferably in the form of vapor. Alternatively or in combination, it may be an injection of an ozone-based precursor (0 3 ).
• a fourth step is a purge step 40A.
• This purge 40A is carried out to eliminate the excess of the water-based precursor (H 2 0), as well as the reaction products or ozone (0 3 ).
• the solid arrow gives an indication, by way of example only, of the relative durations of the cycle and each of its stages.
• the first stage and the third stage can be reversed, each being accompanied by a purge stage.
• the method can be implemented on the following chronology: 30A, 40A, 10A, 20A.
• Each 1A cycle allows the formation of a portion of the “thermal” dielectric film.
• This first sequence includes the iteration of several cycles referenced 1B in figure 2.
• the 1B cycles are carried out after all the 1A cycles have been carried out and completed.
• Each 1B cycle includes at least the following steps.
• a first step comprises the injection 10B into the reaction chamber 210 of a precursor based on a second material.
• This second material is taken from one of the following materials: aluminum (Al), titanium (Ti), tantalum (Ta), zirconium (Zr), hafnium (Hf), silicon (Si).
• a second step is a purge step 20B. This purge 20B is carried out to eliminate the excess of the precursor based on the second material. Typically, this step includes the injection into the reaction chamber 210 of an inert gas.
• a third step 30B comprises the injection into the reaction chamber of a precursor based on a given species, then the formation of a plasma 32B whose chemistry includes this species.
• This species may be oxygen.
• the injected gas can for example be dioxygen or comprise dioxygen.
• this species can be nitrogen.
• the injected gas can for example be dinitrogen or comprise dinitrogen.
• This third step 30B can include a stabilization phase 31B of the gases used for the plasma based on the given species. This stabilization phase 31 is carried out after injection of a precursor based on the given species and before the formation 32B of the plasma.
• a fourth step is a purge step 40B. This 40B purge is performed to remove excess precursor based on the given species.
• the first stage and the third stage can be reversed, each being accompanied by a purge stage.
• the method can be implemented on the following chronology: 30B, 40B, 10B, 20B. Each 1B cycle allows the formation of a portion of the “plasma” dielectric film.
• this cycle 1B is repeated N B times as shown in FIG. 2.
• the dielectric film 71 B produced has a thickness e 71B .
• All purge steps 40A, 20B, 30B can be performed as described with reference to purge step 20A.
• the plasma sequence is performed only after the thermal sequence.
• the thickness of the film 71A or 71B formed is less than 1.5 Angstroms (10 1 ° meters). Preferably this thickness is less than 1.2 Angstroms. Preferably, this thickness is between 0.8 Angstrom and 1.2 Angstrom.
• the dielectric layer 71 thus produced and composed of the thermal film 71 A surmounted by the plasma film 71 B has significantly improved electrical properties. Furthermore, the quality of the interface between this dielectric layer 71 and the structure 70 which is underlying it is also markedly improved.
• the film thermal dielectric 71 A plays the role of a passivation layer with respect to the surface 70' of the underlying structure 70 and that the plasma dielectric film 71 B makes it possible to improve the electrical characteristics of the overall dielectric layer . More precisely, the thermal film 71 A limits the oxidation by the plasma of the exposed surface 70' of the structure 70. On the contrary, it would seem that the plasma deposit oxidizes and passives the underlying structure 70.
• a thickness strictly less than 2 nm, and preferably less than or equal to 1.7 nm makes it possible to obtain satisfactory electrical qualities for the layer 71, for example with regard to the mobility of the charge carriers.
• the thickness of the plasma film e 71B is greater than or equal to 5 nm. This makes it possible to have an overall dielectric layer exhibiting very good electrical performance.
• a bias is applied to the structure 70 based on III-V material, in this example a layer based on GaN.
• the voltage of this polarization can be qualified as V iaS-substrate , by differentiation with the polarization voltage V piaSma which is induced, in a perfectly conventional way, by the source of the plasma in order to generate the ions and radicals and thus initiate the deposition of dielectric.
• the bias voltage V bias-substrate is controlled independently of the bias voltage V ias-piasma induced by the source.
• the reaction chamber comprises a tray for receiving the substrate.
• the plate is electrically conductive and the bias voltage V ias _ substrate is applied to this plate also designated sample holder, supporting the substrate. It can thus be said that this voltage is transmitted to the substrate and thus to the structure 70. It will be noted that the expression “applied to the substrate” means that the V iaS-substrate bias voltage is applied to the plate on which the substrate rests, whether the substrate is conductive or not.
• the plasma generated by a main source (ICP or CCP) is remote from the substrate 70.
• a zone of positive space charge called the sheath forms between the plasma and the substrate due to the difference in mobility between heavy ions and electrons. This sheath quite simply corresponds to the difference between the potential of the plasma Vpiasma and the potential of the substrate.
• the bias voltage applied to the substrate V ias _ substrate may be zero, which is not equivalent to not applying a voltage to the substrate.
• the substrate can be biased intrinsically to a voltage different from 0. It is understood with this example that a bias voltage can be applied to the substrate so that V ias -substrate is equal to 0V.
• V ias-SU bstrat preferably non-zero, for example strictly less than 0 ( ⁇ 0). It is therefore possible to increase/adjust the energy of the ions independently of V piasma since the energy of the ions indeed depends on the voltage of the plasma and the bias voltage of the substrate V ias-SU bstrat, according to the following relationship, with q the charge of the ion:
• V ias.SU bstrat brings considerable advantages.
• this polarization makes it possible to improve the quality of the second film 71 B.
• V ias-SU bstrat bias voltage By applying a non-zero V ias-SU bstrat bias voltage, the effectiveness of the surface ion bombardment can be increased and adjusted, while preserving the surface 70a of the substrate 70.
• the quality of the second film 71B and the quality of the interface of this second film 71B and the first film 71A are considerably improved.
• the repeatability of this method is also improved compared to existing solutions, in particular those having recourse to a single plasma source which makes it possible to control only the flow of ions reaching the substrate and therefore to play on V piasma .
• the bias voltage V ias.SU bstrat applied is less than 160 volts, preferably less than 130 volts. It will be noted that this bias voltage is much lower than the bias voltages usually used to perform etchings or implantations by plasma. Furthermore, this process is preferably implemented in a plasma deposition reactor. Etching plasma reactors are not configured to apply such low bias voltages to the substrate.
• the bias voltage V iaS-substrate is applied only during the plasma based on nitrogen or oxygen and not during the deposition of species based on aluminium.
• the alumina precursor (TMA for example) decomposes thermally. Nitrogen or oxygen require much more energy and therefore require plasma to break it down. Therefore, it is possible to apply V bias-substrate only during nitrogen- or oxygen-based plasma. Alternatively, V bias-substrate is applied throughout the second cycle.
• Figure 4 illustrates a diagram of a plasma reactor that can be used to implement the proposed method.
• the deposition sequences in thermal mode and in plasma mode are carried out in situ in this same reactor.
• the proposed method is implemented in a plasma deposition reactor. More particularly in an inductively coupled plasma reactor, usually qualified by its acronym ICP from the English term Inductively Coupled Plasma.
• the reactor 200 comprises a reaction chamber 210 inside which is arranged a plate 220.
• This plate 220 is configured to receive the substrate.
• the substrate rests on the plate 220 by a rear surface.
• the surface 70a of the substrate, opposite its rear surface, is exposed to the species present in the reaction chamber 210.
• the substrate forms the structure on which it is desired to deposit the dielectric layer, for example a layer of alumina .
• This front surface 70a of the substrate therefore constitutes the surface 70' of the structure 70.
• the plate 220 is electrically conductive.
• the reactor comprises a gas inlet 230 making it possible to inject inside the chamber 210 the gases intended to form the chemistry of the plasma as well as the gases intended for the purge phases.
• the reactor 200 also includes a valve 240 for isolating the reaction chamber 210.
• the reactor 200 also includes a pump 250 to extract the species present in the reaction chamber 210.
• the method is implemented in an inductively coupled plasma reactor, usually qualified by its acronym ICP from the English term Inductively Coupled Plasma.
• the source is a radiofrequency inductive source, which makes it possible to have a stable plasma at a much lower power P piaS ma compared to other sources, for example a microwave source, typically 1500 W to 2000 W
• the power of the inductive radiofrequency source is between 100 and 300 W, preferably 300 W.
• this reactor 200 comprises a bias device 280 configured to allow the application of the V iaS-substrate bias voltage to the plate 220.
• this voltage can ultimately be applied to the substrate 70, at least on its face facing the plate 220, whether this face is electrically conductive or not.
• This bias device 280 comprises a control device 281 and makes it possible to apply an alternating voltage to the plate 220.
• an automatic adaptation unit qualified by its English term of auto match unit
• This bias device 280 is configured to allow the application to the plate 220 of the bias voltage Vbias_substrate, the amplitude of which is low, typically less than 160 volts, preferably less than 130 volts.
• the bias device 280 and the plasma source 260 are configured so as to be able to adjust the bias voltage V biaS-substrate applied to the plate 220 independently of the voltage of the plasma Vpi aS ma ⁇ V ias-SU bstrat and V piasma are independent.
• V bias-SU bstrat and V piasma are independently controlled.
• FIGS. 5A to 9 illustrate the electrical properties of the dielectric layers produced by implementing the proposed method. More specifically, in FIGS. 5A, 5B, 7 and 9, these properties are illustrated by curves resulting from the measurement of the capacitance as a function of the voltage on capacitive devices of the Metal-Insulator-Semiconductor type. An example of these capacitive devices is shown in Figure 3.
• the capacitive device illustrated in FIG. 3 comprises a layer of GaN, for example forming said structure 70 which can be assimilated in this example to a substrate.
• the structure 70 is surmounted, preferably being directly in contact, with a dielectric layer 71 of alumina.
• the first film 71A is an alumina layer deposited in thermal mode and the second film 71B is an alumina layer deposited in plasma mode.
• Nickel and gold studs 72 surmount the alumina layer 71.
• Spikes 73, 74 are placed on the studs 72 to carry out the electrical measurements.
• the capacitive device illustrated in FIG. 3 may comprise only one of the films 71 A and 71 B. Such is the case for the curves of FIGS. 5A, 5B, 6 in particular.
• Figures 5A and 5B illustrate the capacitance/voltage (C-V) characteristic for a thermal alumina film ( Figure 5A) and for a plasma alumina film ( Figure 5B).
• curve 501 corresponds to a plasma alumina film deposited with zero bias voltage
• curve 502 corresponds to a plasma alumina film deposited with a bias voltage of -170 volts (V)
• curve 503 corresponds to a plasma alumina film deposited with a bias voltage of -130V
• curve 504 corresponds to a plasma alumina film deposited with a bias voltage of -85V
• curve 505 corresponds to a plasma alumina film deposited with a bias voltage of -50V.
• the number N B of cycles (cycle 1B illustrated in FIG. 2) is constant.
• N B 125.
• the measurement frequency is 10 kHz, the sweep was performed from -5V to +5V then from +5V to -5V.
• the size of the measured spots is 600 ⁇ m. It emerges from these curves that the electrical characteristics of the alumina films strongly depend on the following conditions: nature of the deposit: deposit in thermal mode or deposit in plasma mode
• the electrical characteristics impacted by these conditions are in particular: the voltage of the curves, modification of the slope in the desertion regime, the hysteresis and also the maximum capacity.
• V of i a ⁇ urbe aiier increases up to a bias voltage of -85 V then decreases sharply.
• the hysteresis (graph 602) and the slope in the desertion regime (graph 601) both decrease monotonically.
• the use of a bias voltage of -85V is judicious to positively shift the CV characteristics.
• Figure 8 makes it possible to compare the properties of the alumina bilayer comprising the thermal alumina film 71A and the plasma alumina film 71B with the alumina layers obtained by conventional thermal process or conventional plasma.
• This figure 8 illustrates the CV measurements for: alumina deposited by a thermal process (curve 701). a plasma process (curve 702). processes combining thermal and plasma deposition (curves 703, 704).
• the abscissa axis indicates the fraction of plasma alumina in the overall alumina layer. Thus, when the plasma alumina fraction is zero, this means that the alumina layer is entirely formed by thermal deposition.
• the total number of cycles is here again 125.
• the alumina layer of curve 703 was obtained by carrying out 10 thermal 1A cycles and 115 plasma 1B cycles.
• the alumina layer of curve 704 was obtained by carrying out 45 thermal 1A cycles and 80 plasma 1B cycles.
• This figure 8 shows a significant variation in the C-Vs for the different bilayers tested. To quantify these variations, the same parameters as previously were extracted from the C-Vs of figure 8 and brought together in figure 8 in the form of graphs 801, 802, 803.
• This graph shows the marked improvement in the electrical properties of the alumina layer produced by implementing the proposed method combining deposition in thermal mode and deposition in plasma mode.
• the presence of a thin layer of thermal alumina formed before the deposition of the plasma alumina makes it possible to obtain markedly improved performance.
• this two-layer structure makes it possible to obtain an increase V of the forward curve (graph 803) while maintaining an excellent slope of the forward curve (graph 801) and a very low hysteresis (graph 802).
• the layer of thermal alumina 71 A is thin. It is formed by performing 10 to 15 cycles. This leads to a thickness of about 0.8 to 1.2 nm for this layer.
• thermal dielectric film here thermal alumina
• thermal alumina plays the role of a protective layer with respect to the surface 70' of the structure 70, here GaN.
• This thermal film limits the oxidation of the GaN surface by the plasma and thus preserves the Al 2 0 3 /GaN interface. It is then possible to improve the parameter V of the forward curve while retaining the advantages of plasma alumina seen previously (excellent slope and low hysteresis).
• the properties of the total dielectric layer of alumina approach those of thermal alumina and are then found to be degraded.
• the alumina layer composed of thermal and plasma films makes it possible to improve the electrical qualities of this layer as well as the interface between this alumina layer and the underlying GaN structure.
• Figure 9 illustrates the CV characteristics for two different alumina layers.
• Curve 901 illustrates the CV characteristic for an alumina layer deposited solely by plasma with an average bias voltage of ⁇ 130V. This alumina layer therefore does not comprise a thermal alumina film.
• Curve 902 illustrates the CV characteristic for an alumina layer, forming a bilayer of thermal alumina and plasma alumina.
• the thermal alumina film was deposited by performing 15 thermal alumina cycles.
• the plasma alumina film was deposited by performing 110 plasma alumina cycles with an average bias voltage of -135V. It has been observed that the application of the bias voltage to the substrate V ias - substrate makes it possible to change the charge plane at the interface between the GaN and the gate stack and makes it possible to shift the threshold voltage towards the positive voltages .
• Aluminum-based precursors commonly used for ALD or PEALD can be used such as trimethylaluminum or aluminum trichloride. These precursors can be used for cycles in thermal mode 1A and in plasma mode 1B.
• the precursor based on the given species can be dioxygen (0 2 ). injection time
• the precursor injection time must be long enough to saturate the exposed surface.
• the duration of injection of the aluminum-based precursor is greater than or equal to 20 ms.
• the water or ozone injection time is for example greater than 50 ms (10 3 seconds), preferably greater than or equal to 100 ms.
• the duration of the dioxygen-based plasma is for example greater than 2 s, preferably greater than or equal to 5 s. These values make it possible to obtain a particularly high quality for the plasma film.
• the pressure of the chamber during the injection of the precursors is at least 10 mTorr. Preferably the pressure is about 80 mTorr.
• the pressure of the chamber during the plasma must be adjusted so as to have a non-collision sheath.
• the chamber pressure during the injection of the aluminum-based precursor is at least 10 mTorr. Preferably the pressure is about 80 mTorr.
• the chamber pressure during plasma based on the given species is less than 50 mTorr. It is preferably between 5 and 20 mTorr. For example, it is around 15 mTorr.
• the RF-ICP power must be large enough to have a stable plasma. This power is preferably between 100-300W. Preferably is equal to 300W.
• the plasma duration must be long enough to allow the oxidation of the layer preceding the plasma.
• a bias voltage is only optional. If a bias voltage is applied, it is between -10 V and -160 V, preferably between -10 V and -130 V. Preferably, it is between -75 V and -95 V. Preferably it is of the order of -85V.
• the purge steps use an inert gas, preferably dinitrogen (N 2 ) or argon (Ar).
• the purge time should be long enough to remove excess reagent and/or reaction by-products. Typically, it is several seconds, about 1.5 seconds for the step following the injection of the aluminum-based precursor. This purge duration is for example:
• the temperature range of the substrate on which the structure 70 rests is preferably between 200°C and 350°C.
• the substrate temperature is 300°C.
• the thermal alumina thickness e 71A is preferably less than the thickness of the plasma alumina thickness e 71B .
• the thickness of thermal alumina e 71A is less than or equal to 2 nm. It is preferably greater than or equal to 0.5 nm. Preferably, it is equal to 1.2 nm. These values make it possible to have effective protection against the oxidation of the underlying layer, typically of GaN.
• the plasma alumina thickness e 71B is greater than or equal to 5 nm. This makes it possible to have an overall dielectric layer exhibiting very good electrical performance.
• the proposed method offers a particularly effective solution for improving the quality of a dielectric layer, for example of alumina, and for improving the quality of the interface of this dielectric layer with the underlying structure.
• the proposed method is then particularly advantageous for producing alumina gate dielectrics in order to manufacture high electron mobility transistors (HEMTs).
• HEMTs high electron mobility transistors
• the GaN-based layer on which the alumina-based layer is formed consists of GaN.
• the present invention also extends to embodiments in which the GaN-based layer on which the alumina-based layer is formed is a layer made of a gallium nitride and of at least one among indium and aluminum.
• this GaN-based layer can be GaN, AIGaN, InGaN or AlinGaN.
• the structure on which the dielectric layer, for example the alumina layer, is deposited is based on a material taken from among the III-N materials other than a layer based on GaN.
• all the examples, characteristics, steps and technical advantages mentioned above with reference to a structure based on GaN are applicable to a structure based on a material chosen from among the III-V materials.
• the dielectric layer is an alumina layer
• the invention also extends to processes which allow the production of a dielectric layer other than alumina.
• this process can be implemented to produce a layer made of one of the following materials or comprising one of the following materials: Hf0 2 , Zr0 2 , Ta 2 0 5 , or Ti0 2 , Si0 2 , SiN and AIN.
• the precursor used for thermal deposition for plasma deposition can be taken from one of the following materials: Hafnium (Hf), titanium (Ti), Zirconium (Zr), Tantalum (Ta), silicon (Si) .
• the dielectric layer is formed by two films composed of identical materials (alumina in this non-limiting example)
• the invention also extends to the embodiments in which the first film is made of a different material than the second film.
• the first film/second film pair can be formed from one of the following pairs: Al 2 0 3 /Hf0 2 , Al 2 0 3 /Zr0 2 , Al 2 0 3 /Ti0 2 , Al 2 0 3 /Si0 2.
• the given species on which the chemistry of the plasma is based is oxygen-based
• the invention extends to the case where this plasma is based nitrogen.
• the structure is a layer. Nevertheless, all the examples, characteristics, steps and technical advantages mentioned above with reference to a structure forming a layer are applicable to a structure not forming a layer but forming a point structure, for example a three-dimensional relief.
• the structure can be a nanostructure or comprise a plurality of nanostructures.

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