EP4031490A1 - Connection component for a branch for individual electron motion - Google Patents

Connection component for a branch for individual electron motion

Info

Publication number
EP4031490A1
EP4031490A1 EP20792281.6A EP20792281A EP4031490A1 EP 4031490 A1 EP4031490 A1 EP 4031490A1 EP 20792281 A EP20792281 A EP 20792281A EP 4031490 A1 EP4031490 A1 EP 4031490A1
Authority
EP
European Patent Office
Prior art keywords
electronic component
gate electrode
potential well
quantum dot
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP20792281.6A
Other languages
German (de)
French (fr)
Inventor
Matthias KÜNNE
Hendrik BLUHM
Lars SCHREIBER
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Forschungszentrum Juelich GmbH
Rheinisch Westlische Technische Hochschuke RWTH
Original Assignee
Forschungszentrum Juelich GmbH
Rheinisch Westlische Technische Hochschuke RWTH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Forschungszentrum Juelich GmbH, Rheinisch Westlische Technische Hochschuke RWTH filed Critical Forschungszentrum Juelich GmbH
Publication of EP4031490A1 publication Critical patent/EP4031490A1/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
    • G06N10/40—Physical realisations or architectures of quantum processors or components for manipulating qubits, e.g. qubit coupling or qubit control
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66977—Quantum effect devices, e.g. using quantum reflection, diffraction or interference effects, i.e. Bragg- or Aharonov-Bohm effects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/7613—Single electron transistors; Coulomb blockade devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/92—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of superconductive devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • H10N60/11—Single-electron tunnelling devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00—Superconducting devices
    • H10N60/10—Junction-based devices
    • H10N60/128—Junction-based devices having three or more electrodes, e.g. transistor-like structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/40—Bus coupling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/762—Charge transfer devices

Definitions

  • the invention relates to an electronic component which is formed by a semiconductor component or a semiconductor-like structure with gate electrode arrangements for moving a quantum dot, comprising a) a substrate with a two-dimensional electron gas or electron hole gas; b) electrical contacts for connecting the gate electrode arrangements to voltage sources, c) a first gate electrode arrangement with gate electrodes, which is arranged on a surface of the electronic component, for generating a potential well in the substrate; d) the first gate electrode arrangement has parallel running electrode fingers, wherein e) the electrode fingers are interconnected periodically alternating, which cause an almost continuous movement of the potential well effect the substrate, a quantum dot being translated in one direction with this first potential well.
  • the invention also relates to a method for such an electronic component.
  • These semiconductor components often consist of doped silicon elements in order to realize the circuits.
  • transistor circuits can be arranged in such semiconductor components and linked to form a logic circuit.
  • these semiconductor components can now be produced with ever more extreme compactness.
  • This compactness has reached its physical limits.
  • Both the density of the circuits and the temperature often lead to problems in such semiconductor components.
  • optimizations can be achieved through several layer models, higher switching clocks or the choice of semiconductor material.
  • the computing power is often insufficient for many applications, e.g. in cryptographic technology or when calculating weather or climate models due to the enormous amount of data.
  • a quantum mechanical system with two states is the smallest Unit for storing information is referred to as a “qubit”.
  • a qubit is defined, for example, by the quantum mechanical state spin “up” and spin “down”.
  • a semiconductor heterostructure serves as the substrate.
  • the semiconductor heterostructure contains a two-dimensional electron gas (2DEG).
  • Semiconductor heterostructures are monocrystalline layers of semiconductors with different compositions grown on top of one another. These layer structures provide numerous technically relevant quantization effects with regard to their electronic and optical properties. They are therefore particularly suitable for the production of microelectronic components.
  • the currently most important combination of materials for the production of semiconductor heterostructures is the GaAs / AlGaAs system.
  • Semiconductor heterostructures form so-called quantum films at the interfaces between different materials. These arise in particular because of the different energy ratios in the two materials.
  • the predetermined energy distribution has the consequence that charge carriers from the environment collect in the quantum film. There they are largely restricted in their freedom of movement to the layer and form the two-dimensional electron gas (2DEG).
  • a nanoscopic material structure is called a quantum dot.
  • Semiconductor materials are particularly suitable for this.
  • Charge carriers, both electrons and holes, are so limited in their mobility in a quantum dot that their energy can no longer assume continuous, but only discrete values.
  • 2DEG two-dimensional electron gas
  • a quantum dot device which comprises at least three conductive layers and at least two insulating layers.
  • the three conductive layers are electrically isolated from one another. It is described there that a conductive layer consists of a different material than the other two conductive layers.
  • the conductive layers can for example consist entirely and / or partially of aluminum, gold, copper or polysilicon.
  • the insulating layers consist, for example, of silicon oxide, silicon nitride and / or aluminum oxide. The connections between the conductive layers and the insulating layers have the effect, among other things, that individual electrons are channeled through quantum dots of the device using voltage pulses.
  • quantum dot device an electron is quasi trapped in a potential well. Through quantum mechanical tunneling, an electron is moved from quantum dot to quantum dot. This can lead to inaccuracies or falsifications of the information content about the quantum mechanical state when an electron moves over longer distances.
  • WO 2017/020095 A1 discloses a scalable architecture for a processing device for performing quantum processing.
  • the architecture is based on an all-silicon CMOS manufacturing technology.
  • Transistor-based control circuits are used in conjunction with floating gates to drive a two-dimensional array of qubits.
  • the qubits are defined by the spin states of a single electron that is enclosed in a quantum dot.
  • a higher level is described here, ie how individual qubits can be controlled electrically, for example via transistors etc., including qubit operation and readout. It is true that a “scalable architecture” is used, but the array shown does not allow any real scaling, that is to say omits other integration of cryogenic electronics, since no space can be created between the qubits.
  • US Pat. No. 8,164,082 B2 describes a spin bus quantum computer architecture which comprises a spin bus which consists of several strongly coupled qubits which are always based on qubits and which define a chain of spin qubits. A large number of information-carrying qubits are arranged next to a qubit of the spin bus. Electrodes are formed around the information-carrying qubits and the spinbus qubits to enable control of the establishment and disruption of the coupling between qubits to enable control of the establishment and disruption of the coupling between each information-bearing qubit and the adjacent spinbus qubit.
  • the spin-bus architecture enables qubits to be coupled quickly and reliably over long distances.
  • EP 3 016 035 B1 describes a processing device and method for operating it, in particular, but not exclusively, the invention relates to a quantum processing device which can be controlled in order to carry out adiabatic quantum calculations.
  • a quantum processor has the following features: a plurality of qubit elements and a control structure which has a plurality of control components, each control component being arranged to control a plurality of qubit elements.
  • the control structure is controllable to perform a quantum calculation using the qubit elements, a quantum state of the qubit elements being encoded in the nuclear or electron spin of one or more donor atoms.
  • the donor atoms are arranged in a plane that is embedded in a semiconductor structure.
  • a first set of donor atoms is arranged to encode quantum information related to quantum computation.
  • a second set of donor atoms is arranged to enable electromagnetic coupling between one or more of the first set of donor atoms.
  • the donor atoms of the first set are in a two-dimensional one Arranged matrix arrangement.
  • the plurality of control members include a first set of elongate control members disposed in a first plane above the plane containing the donor atoms.
  • a second set of elongate control members are provided which are located in a second level below the level containing the donor atoms.
  • the qubits must be coupled over distances of at least a few micrometers, in particular to create space for local control electronics. Structures and structural elements must be provided that enable a quantum dot to be transported to various destinations in order to be able to set up logic circuits.
  • One or two-dimensional arrays were built from separate quantum dots through which electrons can then be transported. Due to the very large number of gate electrodes required and the voltages to be set with them, a coupling over several micrometers cannot be implemented without considerable effort or even not at all by means of this approach.
  • the object of the invention is therefore to eliminate the disadvantages of the prior art and to create an electronic component which allows logic circuits to be implemented with quantum dots, branches being provided in the logic circuits.
  • the object is achieved in that in an electronic component of the type mentioned, in which f) a second gate electrode arrangement is provided with gate electrodes, which is provided with a different direction at a junction to the first gate electrode arrangement, for generating a second potential well in the Substrate, g) the second gate electrode arrangement running in parallel
  • the electrode fingers are interconnected periodically in alternation, which cause an almost continuous movement of the potential well through the substrate, the quantum dot being movable in the potential well with a changed direction of movement.
  • the object is also achieved by a method for such an electronic component in which the interconnected gate electrodes are subjected to a phase-shifted voltage, which causes an almost continuous movement of the potential well through the substrate, a quantum point being translated with this potential well. Circuits with quantum dots that were previously not possible can be implemented by means of a corresponding crossing or branching. Such an electronic component can now be used to build logic circuits in quantum computers. This component can be used to network a logic circuit.
  • the invention is based on the principle that a quantum mechanical state is set at a quantum dot which can be translated through the substrate over a longer distance.
  • the quantum dot is quasi trapped in the potential well, which is generated in a suitable manner by the gate electrode arrangement.
  • the potential well then moves continuously and directed through the substrate and takes the quantum dot with its quantum mechanical state over the distance.
  • the electrode fingers of the gate electrodes are connected accordingly.
  • the quantum dots are deflected to a potential well of a branching gate electrode arrangement.
  • the quantum dot has to be moved to move into the other or new direction. With the present invention, a quantum mechanical state of a quantum dot can thus be moved and interconnected over a greater distance.
  • a third gate electrode arrangement for generating a switchable potential barrier arrangement is provided in the area of the junction, which is switched on for the transfer of the quantum dot.
  • This potential barrier arrangement prevents the quantum dot from taking a different direction than that given by the junction.
  • the quantum dot with the potential well is directed in one or the other branching direction. In this way, complex circuits with a change of direction can also be implemented.
  • a further advantageous embodiment of the electronic component is achieved in that means for synchronizing the gate electrode arrangements for changing the direction of the quantum dot are provided at the junction.
  • the transfer of the quantum dot at a junction requires a very precise coordination of the gate electrodes so that the potential well actually transfers the quantum dot.
  • the measure presented here is therefore used to provide means for controlling the gate electrodes which interconnect the gate electrode arrangements synchronously with one another, so that a coordinated change of direction is made possible.
  • a gate electrode arrangement consists of two parallel gate electrodes, which one Form channel-like structure. This measure serves to ensure that the potential well can only move on a certain path in the substrate.
  • the substrate contains gallium arsenide (GaAs) and / or silicon germanium (SiGe). These materials are able to generate a two-dimensional electron gas in which quantum dots can be generated and moved. In the case of gallium arsenide, the quantum dots are occupied with electrons. In the case of silicon germanium, the quantum dots are filled with holes that are missing an electron.
  • GaAs gallium arsenide
  • SiGe silicon germanium
  • a further preferred embodiment of the electronic component can be achieved in that the gate electrodes connected in each case are configured to be able to have voltage applied to them periodically and / or out of phase. This measure enables the potential well to be guided continuously through the substrate. A quantum dot located in the potential well can thus be translated with the potential well through the substrate. In doing so, it does not lose its original quantum mechanical state.
  • a preferred embodiment of the electronic component consists in that at least every third electrode finger of a gate electrode is connected together. This is intended to ensure that the potential well is always guaranteed over at least one period over which the potential well is moved. This is the only way to enable continuous movement of the potential well with the quantum dot. In principle, other combinations are also possible when interconnecting gate electrodes, as long as the potential well can be moved with the quantum dot.
  • an advantageous embodiment for the method according to the invention for an electronic component results from the fact that in each case at least every third gate electrode is connected together and a voltage is periodically applied.
  • a further advantageous embodiment of the electronic component according to the invention consists in the fact that means are provided for connecting two qubits of a quantum computer.
  • FIG. 1 shows a schematic top view of a first exemplary embodiment of an electronic component according to the invention, which has a junction.
  • FIG. 2 shows a section of the junction according to FIG. 1 and the course of the movement of a quantum dot at the junction.
  • FIG. 1 shows an exemplary embodiment of an electronic component 10 according to the invention, which is formed from a semiconductor heterostructure.
  • the structures of the component are preferably in a nanoscale dimension.
  • Undoped silicon germanium (SiGe) is used as substrate 12 for electronic component 10.
  • the electronic component 10 is designed in such a way that it contains a two-dimensional electron gas (2DEG).
  • Gate electrode arrangements 16, 18, 20 are provided on a surface 14 of the substrate 12.
  • the gate electrode arrangements 16, 18 each have two gate electrodes 22, 24, 26, 28.
  • the individual gate electrodes 22, 24, 26, 28 are electrically isolated from one another by means of insulating layers 30 in a suitable manner.
  • the gate electrode arrangements 16, 18, 20 are constructed in layers, the insulating layer 24 being provided between each gate electrode 22, 24, 26, 28.
  • the gate electrodes 22, 24, 26, 28 furthermore comprise electrode fingers 32, 34, 36, 38, with those of a gate electrode 22, 24, 26, 28 each being arranged parallel to one another on the surface 14 of the substrate 12.
  • the gate electrode arrangements 16, 18, 20 are supplied with a suitable voltage via electrical connections.
  • a potential well is generated in the substrate 12.
  • a quantum dot trapped in this potential well can thus be translated through the substrate.
  • the potential well is translated longitudinally through the substrate by suitable control of the electrode fingers 32, 34, 36, 38 with sinusoidal voltages.
  • the quantum dot which is more or less trapped in such a potential well, can be overridden with this potential well translate a longer distance in the two-dimensional electron gas of the substrate 12 made of SiGe without experiencing a quantum mechanical change of state.
  • the gate electrode arrangement 18 branches off from the gate electrode arrangement 16 in an intersection area 40.
  • the gate electrode arrangement 20 is arranged in the intersection region 40.
  • the gate electrode arrangement 20 contains two barrier gate electrodes 42, 44. These barrier gate electrodes 42, 44 can be switched on when the moving potential well with the quantum dot is located in the intersection area 40. By connecting the barrier gate electrodes 42, 44, the potential well with the quantum dot is held in the intersection area 40.
  • a pump gate electrode 46 of the gate electrode arrangement 20 causes the potential well with the quantum dot to change direction towards the gate electrode arrangement 18.
  • a barrier gate electrode 48 is connected to the gate electrode arrangement 20.
  • the other two barrier gate electrodes 42, 44, however, are switched off.
  • the barrier gate electrode 48 blocks access to the gate electrode arrangement 18.
  • the quantum dot in the moving potential well thus has no cause for a change in direction.
  • FIG. 2 schematically shows a section through such an electronic component 10.
  • a progression sequence A to C of a movable potential well 50 with a quantum dot 52 is shown below the section of component 10.
  • the electrode fingers 36, 38, the barrier gate electrodes 48 and the pump gate electrodes 46 are visible in section.
  • sequences from A to C of the courses of potential wells 50 in the substrate 12 are shown.
  • the electrode fingers 36, 38 of the gate electrode arrangements 18 form the movable potential wells 50 through the substrate 12.
  • the movement of the potential wells 50 takes place by means of suitable interconnection of the electrode fingers 26, 28.
  • the electrode fingers 36, 38 of the gate electrode arrangement 16 are for this purpose interconnected periodically in alternation, which cause an almost continuous movement of the potential well 50 through the substrate 12.
  • the present figure illustrates how the potential well 50 with the quantum dot 52 is branched off from the intersection area 40.
  • the movable potential well 50 is located in the direction of the branching gate electrode 18.
  • the arrow 54 here symbolizes the direction of movement that the potential well 50 runs with the quantum dot 52.

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Abstract

The invention relates to an electronic component (10) which is formed by a semiconductor component or a semiconductor-like structure with gate electrode arrangements (16, 18, 20) for the transport of a quantum dot (52). The electronic component (10) contains a substrate (12) comprising a two-dimensional electron gas or electron hole gas. Electrical contacts connect the gate electrode arrangements (16, 18, 20) to voltage sources. A first gate electrode arrangement (16) having gate electrodes (22, 24) is provided on a surface (14) of the electronic component in order to create a potential well (50) in the substrate (12). The gate electrode arrangement (16) has parallel electrode fingers (32, 34), said electrode fingers (32, 34) being alternately connected together at intervals which causes almost continuous transport of the potential well (50) through the substrate (12), a quantum dot (52) being translated together with this potential well (50) in one direction.

Description

Verbindungsbauteil zur Abzweigung für Einzelelektronenbewegung Connection component for branching for single electron movement
Technisches Gebiet Technical area
Die Erfindung betrifft ein elektronisches Bauelement, welches von einem Halbleiterbauelement oder einer halbleiterähnlichen Struktur mit Gatterelektrodenanordnungen zum Bewegen eines Quantenpunkts gebildet wird, umfassend a) ein Substrat mit einem zweidimensionalen Elektronengas oder Elektronenlochgas; b) elektrische Kontakte zum Verbinden der Gatterelektrodenanordnungen mit Spannungsquellen, c) eine erste Gatterelektrodenanordnung mit Gatterelektroden, welche an einer Fläche des elektronischen Bauelements angeordnet ist, zur Erzeugung einer Potentialmulde in dem Substrat; d) die erste Gatterelektrodenanordnung parallel verlaufende Elektrodenfinger aufweist, wobei e) die Elektrodenfinger periodisch alternierend zusammengeschaltet sind, welche eine nahezu kontinuierliche Bewegung der Potentialmulde durch das Substrat bewirken, wobei ein Quantenpunkt mit dieser ersten Potentialmulde in eine Richtung translatiert wird. The invention relates to an electronic component which is formed by a semiconductor component or a semiconductor-like structure with gate electrode arrangements for moving a quantum dot, comprising a) a substrate with a two-dimensional electron gas or electron hole gas; b) electrical contacts for connecting the gate electrode arrangements to voltage sources, c) a first gate electrode arrangement with gate electrodes, which is arranged on a surface of the electronic component, for generating a potential well in the substrate; d) the first gate electrode arrangement has parallel running electrode fingers, wherein e) the electrode fingers are interconnected periodically alternating, which cause an almost continuous movement of the potential well effect the substrate, a quantum dot being translated in one direction with this first potential well.
Weiterhin betrifft die Erfindung ein Verfahren für ein solches elektronisches Bauelement. The invention also relates to a method for such an electronic component.
Beschreibung description
Herkömmliche Computer arbeiten mit Halbleiterbauteilen mit integrierten Schaltkreisen. Diese Schaltkreise arbeiten immer mit Systemen, welche auf einer logischen „0" oder „1" basieren - also Schalter „an" oder „aus". Bei Halbleiterspeichern wird dies dadurch realisiert, dass das Potential entweder oberhalb oder unterhalb eines Schwellwerts liegt. Diese zwei Zustände bilden die kleinste Einheit bei Computern und werden als „Bit" bezeichnet. Conventional computers use semiconductor components with integrated circuits. These circuits always work with systems that are based on a logical "0" or "1" - that is, switches "on" or "off". In the case of semiconductor memories, this is implemented in that the potential is either above or below a threshold value. These two states form the smallest unit in computers and are known as "bits".
Diese Halbleiterbauteile bestehen oft aus dotierten Siliziumelementen, um die Schaltungen zu realisieren. So lassen sich beispielsweise Transistorschaltungen in solchen Halbleiterbauteilen anordnen und zu einem logischen Schaltkreis verknüpfen. Durch immer besser werdende chemische und physikalische Herstellungsverfahren können diese Halbleiterbauteile mittlerweile in immer extremerer Kompaktheit produziert werden. Diese Kompaktheit stößt aber an ihre physikalischen Grenzen. Sowohl die Dichte der Schaltungen, als auch die Temperatur führen häufig zu Problemen in solchen Halbleiterbauteilen. So können insbesondere noch Optimierungen durch mehrere Schichtmodelle, höhere Schalttaktung oder auch bei der Wahl des Halbleitermaterials erzielt werden. Trotzdem reichen die Rechenleistungen für viele Anwendungen, wie z.B. in der kryptographischen Technologie oder bei Berechnung von Wetter- bzw. Klimamodellen wegen der enormen Datenmengen oft nicht aus. These semiconductor components often consist of doped silicon elements in order to realize the circuits. For example, transistor circuits can be arranged in such semiconductor components and linked to form a logic circuit. As chemical and physical manufacturing processes are getting better and better, these semiconductor components can now be produced with ever more extreme compactness. However, this compactness has reached its physical limits. Both the density of the circuits and the temperature often lead to problems in such semiconductor components. In this way, in particular, optimizations can be achieved through several layer models, higher switching clocks or the choice of semiconductor material. Nevertheless, the computing power is often insufficient for many applications, e.g. in cryptographic technology or when calculating weather or climate models due to the enormous amount of data.
Um Rechenleistung erheblich zu erhöhen, sind seit langem Modelle für sogenannte Quantencomputer bekannt. Technisch ließen sie sich aus unterschiedlichen Gründen bislang jedoch noch nicht realisieren. Die Modelle von Quantencomputern sehen vor, dass quantenmechanische Zustände von Teilchen, wie z.B. Elektronen, ausgenutzt werden. Dabei wird ein quantenmechanisches System mit zwei Zuständen als kleinste Einheit zum Speichern von Informationen als „Qubit" bezeichnet. Ein Qubit wird beispielsweise durch den quantenmechanischen Zustand Spin „Up" und Spin „Down" definiert. In order to increase computing power considerably, models for so-called quantum computers have long been known. For various reasons, however, it has not yet been technically possible to implement them. The models of quantum computers provide that quantum mechanical states of particles, such as electrons, are used. A quantum mechanical system with two states is the smallest Unit for storing information is referred to as a “qubit”. A qubit is defined, for example, by the quantum mechanical state spin “up” and spin “down”.
Das Prinzip von Elektronen-Spin-Qubits gleicht sich immer, unabhängig vom jeweils gewählten Materialsystem. Als Substrat dient dabei eine Halbleiter-Heterostruktur. Die Halbleiter-Heterostruktur beinhaltet ein zweidimensionales Elektronengas (2DEG). Halbleiter-Heterostrukturen sind monokristallin aufeinander gewachsene Schichten von Halbleitern mit unterschiedlicher Zusammensetzung. Diese Schichtstrukturen liefern zahlreiche technisch relevante Quantisierungseffekte bezüglich ihrer elektronischen und optischen Eigenschaften. Daher sind sie für die Herstellung mikroelektronischer Bauelemente besonders geeignet. Die derzeit wichtigste Materialkombination für die Herstellung von Halbleiter-Heterostrukturen ist das System GaAs/AIGaAs. The principle of electron spin qubits is always the same, regardless of the material system chosen. A semiconductor heterostructure serves as the substrate. The semiconductor heterostructure contains a two-dimensional electron gas (2DEG). Semiconductor heterostructures are monocrystalline layers of semiconductors with different compositions grown on top of one another. These layer structures provide numerous technically relevant quantization effects with regard to their electronic and optical properties. They are therefore particularly suitable for the production of microelectronic components. The currently most important combination of materials for the production of semiconductor heterostructures is the GaAs / AlGaAs system.
Halbleiter-Heterostrukturen bilden dabei sogenannte Quantenfilme an Grenzflächen verschiedener Materialien aus. Diese entstehen insbesondere wegen unterschiedlicher Energieverhältnisse in den beiden Materialien. Die so vorgegebene Energieverteilung hat zur Folge, dass sich Ladungsträger aus der Umgebung im Quantenfilm sammeln. Dort sind sie dann in ihrer Bewegungsfreiheit weitgehend auf die Schicht eingeschränkt und bilden das zweidimensionale Elektronengas (2DEG). Semiconductor heterostructures form so-called quantum films at the interfaces between different materials. These arise in particular because of the different energy ratios in the two materials. The predetermined energy distribution has the consequence that charge carriers from the environment collect in the quantum film. There they are largely restricted in their freedom of movement to the layer and form the two-dimensional electron gas (2DEG).
Als Quantenpunkt wird eine nanoskopische Materialstruktur bezeichnet. Halbleitermaterialien sind hierfür besonders geeignet. Ladungsträger, sowohl Elektronen, als auch Löcher, werden in einem Quantenpunkt in ihrer Beweglichkeit so weit eingeschränkt, dass ihre Energie nicht mehr kontinuierliche, sondern immer nur noch diskrete Werte annehmen kann. Mittels nanoskaliger Gatterelektroden (sog. gates), die auf die Oberfläche des Bauelements aufgebracht werden, wird die Potentiallandschaft innerhalb des zweidimensionalen Elektronengases (2DEG) derart geformt, dass einzelne Elektronen in den Quantenpunkten eingefangen werden können. Anschließend dient der Spin dieser Elektronen als Basis, um ein logisches Qubit zu formen. Stand der Technik A nanoscopic material structure is called a quantum dot. Semiconductor materials are particularly suitable for this. Charge carriers, both electrons and holes, are so limited in their mobility in a quantum dot that their energy can no longer assume continuous, but only discrete values. Using nanoscale gate electrodes (so-called gates), which are applied to the surface of the component, the potential landscape within the two-dimensional electron gas (2DEG) is shaped in such a way that individual electrons can be captured in the quantum dots. The spin of these electrons then serves as the basis to form a logical qubit. State of the art
Aus der US 2017/0317203 Al ist eine Quantenpunktvorrichtung bekannt, die mindestens drei leitende Schichten und mindestens zwei isolierende Schichten umfasst. Dabei sind die drei leitenden Schichten voneinander elektrisch isoliert. Es wird dort beschrieben, dass eine leitende Schicht aus einem anderen Material besteht, als die jeweils beiden anderen leitenden Schichten. Die leitenden Schichten können z.B. vollständig und/oder teilweise aus Aluminium, Gold, Kupfer oder PolySulizium bestehen. Die Isolierschichten bestehen hingegen z.B. aus Siliziumoxid, Siliziumnitrid und/oder Aluminiumoxid. Dabei bewirken die Verbindungen zwischen den leitenden Schichten und den isolierenden Schichten u.a., dass einzelne Elektronen unter Verwendung von Spannungsimpulsen durch Quantenpunkte der Vorrichtung geschleust werden. From US 2017/0317203 A1 a quantum dot device is known which comprises at least three conductive layers and at least two insulating layers. The three conductive layers are electrically isolated from one another. It is described there that a conductive layer consists of a different material than the other two conductive layers. The conductive layers can for example consist entirely and / or partially of aluminum, gold, copper or polysilicon. The insulating layers, on the other hand, consist, for example, of silicon oxide, silicon nitride and / or aluminum oxide. The connections between the conductive layers and the insulating layers have the effect, among other things, that individual electrons are channeled through quantum dots of the device using voltage pulses.
In dieser Quantenpunktvorrichtung ist ein Elektron in einer Potentialmulde quasi gefangen. Durch quantenmechanisches Tunneln wird dabei ein Elektron hier von Quantenpunkt zu Quantenpunkt bewegt. Dies kann zu Ungenauigkeiten bzw. Verfälschungen des Informationsgehalts über den quantenmechanischen Zustand bei der Bewegung eines Elektrons über längere Distanzen führen. In this quantum dot device, an electron is quasi trapped in a potential well. Through quantum mechanical tunneling, an electron is moved from quantum dot to quantum dot. This can lead to inaccuracies or falsifications of the information content about the quantum mechanical state when an electron moves over longer distances.
Die WO 2017/020095 Al offenbart eine skalierbare Architektur für ein Verarbeitungsgerät zur Durchführung von Quantenverarbeitung. Die Architektur basiert auf einer Voll-Silizium-CMOS-Fertigungstechnologie. Transistor-basierte Steuerschaltungen werden zusammen mit potentialfreien Gates verwendet, um ein zweidimensionales Array von Qubits zu betreiben. Die Qubits werden durch die Spinzustände eines einzelnen Elektrons definiert, das in einem Quantenpunkt eingeschlossen ist. Hier wird eine übergeordnete Ebene beschrieben, d.h. wie einzelne Qubits elektrisch angesteuert werden können, zum Beispiel via Transistoren etc., inkl. Qubit-Operation und Readout. Es wird zwar von einer „skalierbaren Architektur" gesprochen, jedoch lässt das gezeigte Array keine wirkliche Skalierung, d.h. unter anderem Integration von tiefkalter Elektronik zu, da kein Platz zwischen den Qubits geschaffen werden kann. WO 2017/020095 A1 discloses a scalable architecture for a processing device for performing quantum processing. The architecture is based on an all-silicon CMOS manufacturing technology. Transistor-based control circuits are used in conjunction with floating gates to drive a two-dimensional array of qubits. The qubits are defined by the spin states of a single electron that is enclosed in a quantum dot. A higher level is described here, ie how individual qubits can be controlled electrically, for example via transistors etc., including qubit operation and readout. It is true that a “scalable architecture” is used, but the array shown does not allow any real scaling, that is to say omits other integration of cryogenic electronics, since no space can be created between the qubits.
Die US 8,164,082 B2 beschreibt eine Spinbus-Quantencomputerarchitektur, die einen Spinbus umfasst, der aus mehreren stark gekoppelten und immer auf Qubits basierenden Qubits besteht, die eine Kette von Spin-Qubits definieren. Eine Vielzahl von informationstragenden Qubits sind neben einem Qubit des Spinbusses angeordnet. Zu den informationstragenden Qubits und den Spinbus-Qubits werden Elektroden gebildet, um die Steuerung der Herstellung und Unterbrechung der Kopplung zwischen Qubits zu ermöglichen, um die Steuerung der Herstellung und Unterbrechung der Kopplung zwischen jedem informationstragenden Qubit und dem angrenzenden Spinbus-Qubit zu ermöglichen. Die Spin-Bus-Architektur ermöglicht eine schnelle und zuverlässige Kopplung von Qubits über große Entfernungen. US Pat. No. 8,164,082 B2 describes a spin bus quantum computer architecture which comprises a spin bus which consists of several strongly coupled qubits which are always based on qubits and which define a chain of spin qubits. A large number of information-carrying qubits are arranged next to a qubit of the spin bus. Electrodes are formed around the information-carrying qubits and the spinbus qubits to enable control of the establishment and disruption of the coupling between qubits to enable control of the establishment and disruption of the coupling between each information-bearing qubit and the adjacent spinbus qubit. The spin-bus architecture enables qubits to be coupled quickly and reliably over long distances.
In der EP 3 016 035 Bl wird eine Verarbeitungsvorrichtung und Verfahren beschrieben, um diese zu betreiben, insbesondere, aber nicht ausschließlich, bezieht sich die Erfindung auf eine Quantenverarbeitungsvorrichtung, die steuerbar ist, um adiabatische Quantenberechnungen durchzuführen. EP 3 016 035 B1 describes a processing device and method for operating it, in particular, but not exclusively, the invention relates to a quantum processing device which can be controlled in order to carry out adiabatic quantum calculations.
Ein Quantenprozessor weist dazu folgende Merkmale auf: eine Mehrzahl von Qubit- Elementen und eine Steuerstruktur, die eine Mehrzahl von Steuerbauteilen aufweist, wobei jedes Steuerbauteil angeordnet ist, um eine Mehrzahl von Qubit-Elementen zu steuern. Die Steuerstruktur ist steuerbar, um eine Quantenberechnung unter Verwendung der Qubit-Elemente durchzuführen, wobei ein Quantenzustand der Qubit- Elemente in dem Kern- oder Elektronenspin eines oder mehrerer Donatoratome codiert ist. Die Donatoratome sind in einer Ebene angeordnet, die in einer Halbleiterstruktur eingebettet ist. Dabei ist eine erste Menge von Donatoratomen so angeordnet, um Quanteninformationen in Bezug auf die Quantenberechnung zu codieren. Eine zweite Menge von Donatoratomen ist so angeordnet, dass sie eine elektromagnetische Kopplung zwischen einem oder mehreren der ersten Menge von Donatoratomen ermöglichen. Die Donatoratome der ersten Menge sind in einer zweidimensionalen Matrixanordnung angeordnet. Die Mehrzahl von Steuerbauteilen weist eine erste Menge länglicher Steuerbauteile auf, die in einer ersten Ebene oberhalb der Ebene angeordnet sind, die die Donatoratome enthalten. Eine zweite Menge länglicher Steuerbauteile sind vorgesehen, die in einer zweiten Ebene unterhalb der Ebene angeordnet sind, die die Donatoratome aufweisen. For this purpose, a quantum processor has the following features: a plurality of qubit elements and a control structure which has a plurality of control components, each control component being arranged to control a plurality of qubit elements. The control structure is controllable to perform a quantum calculation using the qubit elements, a quantum state of the qubit elements being encoded in the nuclear or electron spin of one or more donor atoms. The donor atoms are arranged in a plane that is embedded in a semiconductor structure. A first set of donor atoms is arranged to encode quantum information related to quantum computation. A second set of donor atoms is arranged to enable electromagnetic coupling between one or more of the first set of donor atoms. The donor atoms of the first set are in a two-dimensional one Arranged matrix arrangement. The plurality of control members include a first set of elongate control members disposed in a first plane above the plane containing the donor atoms. A second set of elongate control members are provided which are located in a second level below the level containing the donor atoms.
Zur Realisierung eines universellen Quantencomputers muss eine Kopplung der Qubits über Distanzen von mindestens einigen Mikrometern ermöglicht werden, um insbesondere Platz für lokale Kontrollelektronik zu schaffen. Es müssen Strukturen und Strukturelemente vorgesehen sein, die es ermöglichen einen Quantenpunkt an verschiedene Ziele zu transportieren, um logische Schaltungen aufbauen zu können. Es gibt bereits Ansätze im Stand der Technik, bei denen ein- oder zweidimensionale Arrays aus separaten Quantenpunkten gebaut wurden, durch die dann Elektronen transportiert werden können. Aufgrund der sehr großen Anzahl an benötigten Gatterelektroden und damit einzustellenden Spannungen ist mittels dieses Ansatzes eine Kopplung über mehrere Mikrometer nicht ohne bedeutenden Aufwand oder sogar gar nicht zu realisieren. To implement a universal quantum computer, the qubits must be coupled over distances of at least a few micrometers, in particular to create space for local control electronics. Structures and structural elements must be provided that enable a quantum dot to be transported to various destinations in order to be able to set up logic circuits. There are already approaches in the prior art in which one or two-dimensional arrays were built from separate quantum dots through which electrons can then be transported. Due to the very large number of gate electrodes required and the voltages to be set with them, a coupling over several micrometers cannot be implemented without considerable effort or even not at all by means of this approach.
Während die Operationen an einzelnen Qubits bereits in zufriedenstellendem Maße kontrolliert und ausgewertet werden können, ist die Kopplung von Qubits das möglicherweise zentrale ungelöste Problem, um komplexe logische Schaltungen zu verwirklichen damit ein universeller Quantencomputer realisiert werden kann. While the operations on individual qubits can already be controlled and evaluated to a satisfactory extent, the coupling of qubits is the possibly central unsolved problem in order to realize complex logic circuits so that a universal quantum computer can be realized.
Offenbarung der Erfindung Disclosure of the invention
Aufgabe der Erfindung ist es daher, die Nachteile des Standes der Technik zu beseitigen und ein elektronisches Bauelement zu schaffen, welches logische Schaltungen mit Quantenpunkten zu realisieren erlaubt, wobei Abzweigungen in den logischen Schaltungen vorgesehen sind. Erfindungsgemäß wird die Aufgabe dadurch gelöst, dass bei einem elektronischen Bauteil der eingangs genannten Art gelöst, bei dem f) eine zweite Gatterelektrodenanordnung mit Gatterelektroden vorgesehen ist, welche mit anderer Richtung an einer Abzweigung zur ersten Gatterelektrodenanordnung vorgesehen ist, zur Erzeugung einer zweiten Potentialmulde in dem Substrat, g) die zweite Gatterelektrodenanordnung parallel verlaufendeThe object of the invention is therefore to eliminate the disadvantages of the prior art and to create an electronic component which allows logic circuits to be implemented with quantum dots, branches being provided in the logic circuits. According to the invention, the object is achieved in that in an electronic component of the type mentioned, in which f) a second gate electrode arrangement is provided with gate electrodes, which is provided with a different direction at a junction to the first gate electrode arrangement, for generating a second potential well in the Substrate, g) the second gate electrode arrangement running in parallel
Elektrodenfinger aufweist, wobei h) die Elektrodenfinger periodisch alternierend zusammengeschaltet sind, welche eine nahezu kontinuierliche Bewegung der Potentialmulde durch das Substrat bewirken, wobei der Quantenpunkt in der Potentialmulde mit geänderter Fortbewegungsrichtung bewegbar ist. Having electrode fingers, wherein h) the electrode fingers are interconnected periodically in alternation, which cause an almost continuous movement of the potential well through the substrate, the quantum dot being movable in the potential well with a changed direction of movement.
Die Aufgabe wird ferner durch ein Verfahren für ein solches elektronisches Bauelement gelöst, bei dem die zusammengeschalteten Gatterelektroden phasenverschoben mit Spannung beaufschlagt werden, welche eine nahezu kontinuierliche Bewegung der Potentialmulde durch das Substrat bewirkt, wobei ein Quantenpunk mit dieser Potentialmulde translatiert wird. Durch eine entsprechende Kreuzung bzw. Abzweigung können Schaltungen mit Quantenpunkten realisiert werden, die zuvor nicht möglich waren. Durch ein solches elektronisches Bauelement lassen sich nun logische Schaltungen bei Quantencomputern aufbauen. Mit diesem Bauelement können Vernetzungen einer logischen Schaltung vorgenommen werden. The object is also achieved by a method for such an electronic component in which the interconnected gate electrodes are subjected to a phase-shifted voltage, which causes an almost continuous movement of the potential well through the substrate, a quantum point being translated with this potential well. Circuits with quantum dots that were previously not possible can be implemented by means of a corresponding crossing or branching. Such an electronic component can now be used to build logic circuits in quantum computers. This component can be used to network a logic circuit.
Die Erfindung beruht auf dem Prinzip, dass ein quantenmechanischer Zustand bei einem Quantenpunkt eingestellt wird, der durch das Substrat über eine längere Distanz translatiert werden kann. Dazu wird der Quantenpunkt in der Potentialmulde, die durch die Gatterelektrodenanordnung in geeigneter Weise erzeugt wird, quasi gefangen. Die Potentialmulde bewegt sich dann kontinuierlich und gerichtet durch das Substrat hindurch und nimmt den Quantenpunkt mit seinem quantenmechanischen Zustand über die Distanz mit. Für die kontinuierliche Bewegung der Potentialmulde werden die Elektrodenfinger der Gatterelektroden entsprechend verschaltet. An der Abzweigung werden die Quantenpunkte an eine Potentialmulde einer abzweigenden Gatterelektrodenanordnung abgelenkt. Der Quantenpunkt muss dazu bewegt werden, in die andere bzw. neue Richtung überzugehen. Mit der vorliegenden Erfindung lässt sich somit ein quantenmechanischer Zustand eines Quantenpunktes über eine größere Distanz bewegen und verschalten. The invention is based on the principle that a quantum mechanical state is set at a quantum dot which can be translated through the substrate over a longer distance. For this purpose, the quantum dot is quasi trapped in the potential well, which is generated in a suitable manner by the gate electrode arrangement. The The potential well then moves continuously and directed through the substrate and takes the quantum dot with its quantum mechanical state over the distance. For the continuous movement of the potential well, the electrode fingers of the gate electrodes are connected accordingly. At the junction, the quantum dots are deflected to a potential well of a branching gate electrode arrangement. The quantum dot has to be moved to move into the other or new direction. With the present invention, a quantum mechanical state of a quantum dot can thus be moved and interconnected over a greater distance.
In einer vorteilhaften Ausgestaltung eines solchen erfindungsgemäßen elektronischen Bauelements ist eine dritte Gatterelektrodenanordnung zum Erzeugen einer zuschaltbaren Potentialbarrieren-Anordnung im Bereich der Abzweigung vorgesehen, welche für die Übergabe des Quantenpunkts zugeschaltet wird. Diese Potenzialbarrieren- Anordnung verhindert, dass der Quantenpunkt eine andere Richtung einschlägt, als die, die durch die Abzweigung vorgegeben ist. Je nachdem, wie die Potenzialbarrieren- Anordnung geschaltet ist, wird der Quantenpunkt mit der Potenzialmulde in die eine oder die andere abzweigende Richtung gelenkt. Hierdurch lassen sich besonders auch komplexe Schaltungen mit Richtungswechsel realisieren. In an advantageous embodiment of such an electronic component according to the invention, a third gate electrode arrangement for generating a switchable potential barrier arrangement is provided in the area of the junction, which is switched on for the transfer of the quantum dot. This potential barrier arrangement prevents the quantum dot from taking a different direction than that given by the junction. Depending on how the potential barrier arrangement is connected, the quantum dot with the potential well is directed in one or the other branching direction. In this way, complex circuits with a change of direction can also be implemented.
Eine weitere vorteilhafte Ausbildung des elektronischen Bauelements wird dadurch erzielt, dass Mittel zur Synchronisation der Gatterelektrodenanordnungen zum Richtungswechsel des Quantenpunkts an der Abzweigung vorgesehen sind. Die Übergabe des Quantenpunkts an einer Abzweigung bedarf einer sehr genauen Abstimmung der Gatterelektroden, damit die Potentialmulde den Quantenpunkt auch tatsächlich übergibt. Die hier vorgestellte Maßnahme dient somit dazu, dass Mittel zum Steuern der Gatterelektroden vorgesehen sind, die die Gatterelektrodenanordnungen synchron miteinander verschaltet, sodass ein abgestimmter Richtungswechsel ermöglicht wird. A further advantageous embodiment of the electronic component is achieved in that means for synchronizing the gate electrode arrangements for changing the direction of the quantum dot are provided at the junction. The transfer of the quantum dot at a junction requires a very precise coordination of the gate electrodes so that the potential well actually transfers the quantum dot. The measure presented here is therefore used to provide means for controlling the gate electrodes which interconnect the gate electrode arrangements synchronously with one another, so that a coordinated change of direction is made possible.
In einer bevorzugten Ausgestaltung des elektronischen Bauelements besteht eine Gatterelektrodenanordnung aus zwei parallelen Gatterelektroden, welche eine kanalartige Struktur bilden. Diese Maßnahme dient dazu, dass die Potentialmulde sich nur auf einer bestimmten Bahn in dem Substrat bewegen kann. In a preferred embodiment of the electronic component, a gate electrode arrangement consists of two parallel gate electrodes, which one Form channel-like structure. This measure serves to ensure that the potential well can only move on a certain path in the substrate.
In einer vorteilhaften Ausgestaltung eines solchen elektronischen Bauelements enthält das Substrat Galliumarsenid (GaAs) und/oder Silizumgermanium (SiGe). Diese Materialien sind in der Lage ein zweidimensionales Elektronengas zu erzeugen, in welchem sich Quantenpunkte erzeugen und bewegen lassen. Bei Galliumarsenid werden die Quantenpunkte mit Elektronen besetzt. Bei Siliziumgermanium werden die Quantenpunkte mit Löchern, bei denen ein Elektron fehlt, besetzt. In an advantageous embodiment of such an electronic component, the substrate contains gallium arsenide (GaAs) and / or silicon germanium (SiGe). These materials are able to generate a two-dimensional electron gas in which quantum dots can be generated and moved. In the case of gallium arsenide, the quantum dots are occupied with electrons. In the case of silicon germanium, the quantum dots are filled with holes that are missing an electron.
Eine weitere bevorzugte Ausbildung des elektronischen Bauelements lässt sich damit erreichen, dass die jeweils zusammengeschalteten Gatterelektroden periodisch und/oder phasenverschoben mit Spannung beaufschlagbar ausgebildet sind. Diese Maßnahme ermöglicht es die Potentialmulde kontinuierlich durch das Substrat zu führen. Damit kann ein Quantenpunkt, der sich in der Potentialmulde befindet, mit der Potentialmulde durch das Substrat translatiert werden. Dabei verliert er nicht seinen ursprünglichen quantenmechanischen Zustand. A further preferred embodiment of the electronic component can be achieved in that the gate electrodes connected in each case are configured to be able to have voltage applied to them periodically and / or out of phase. This measure enables the potential well to be guided continuously through the substrate. A quantum dot located in the potential well can thus be translated with the potential well through the substrate. In doing so, it does not lose its original quantum mechanical state.
Eine bevorzugte Ausgestaltung des elektronischen Bauelements besteht darin, dass jeweils mindestens jeder dritte Elektrodenfinger einer Gatterelektrode zusammengeschaltet ist. Damit soll erreicht werden, dass die Potentialmulde immer über wenigstens eine Periode gewährleistet ist, über welche die Potentialmulde bewegt wird. Nur so wird eine kontinuierliche Bewegung der Potentialmulde mit dem Quantenpunkt ermöglicht. Grundsätzlich sind auch andere Kombinationen bei der Zusammenschaltung von Gatterelektroden möglich, solange eine Bewegung der Potentialmulde mit dem Quantenpunkt durchgeführt werden kann. Entsprechend ergibt sich eine vorteilhafte Ausgestaltung für das erfindungsgemäße Verfahren für ein elektronisches Bauteil dadurch, dass jeweils zumindest jede dritte Gatterelektrode zusammengeschaltet und periodisch mit Spannung beaufschlagt wird. Eine weitere vorteilhafte Ausgestaltung des erfindungsgemäßen elektronischen Bauelements besteht darin, dass Mittel zum Verbinden zweier Qubits eines Quantencomputers vorgesehen sind. Die Zustände von Quantenpunkten über eine größere Distanz zu translatieren eignet sich besonders bei Quantencomputern. Hier gilt es Qubits miteinander zu verschalten. Daher muss das elektronische Bauelement Kontaktmöglichkeiten haben um wenigstens zwei Qubits zu verschalten, um die Quantenzustände der Quantenpunkte von einem Qubit zum anderen Qubit zu übergeben. A preferred embodiment of the electronic component consists in that at least every third electrode finger of a gate electrode is connected together. This is intended to ensure that the potential well is always guaranteed over at least one period over which the potential well is moved. This is the only way to enable continuous movement of the potential well with the quantum dot. In principle, other combinations are also possible when interconnecting gate electrodes, as long as the potential well can be moved with the quantum dot. Correspondingly, an advantageous embodiment for the method according to the invention for an electronic component results from the fact that in each case at least every third gate electrode is connected together and a voltage is periodically applied. A further advantageous embodiment of the electronic component according to the invention consists in the fact that means are provided for connecting two qubits of a quantum computer. Translating the states of quantum dots over a greater distance is particularly suitable for quantum computers. Here it is necessary to interconnect qubits with one another. The electronic component must therefore have contact options in order to interconnect at least two qubits in order to transfer the quantum states of the quantum dots from one qubit to the other qubit.
Weitere Ausgestaltungen und Vorteile ergeben sich aus dem Gegenstand der Unteransprüche sowie den Zeichnungen mit den dazugehörigen Beschreibungen. Ausführungsbeispiele sind nachstehend unter Bezugnahme auf die beigefügten Zeichnungen näher erläutert. Die Erfindung soll nicht alleine auf diese aufgeführten Ausführungsbeispiele beschränkt werden. Die vorliegende Erfindung soll sich auf alle Gegenstände beziehen, die jetzt und zukünftig der Fachmann als naheliegend zur Realisierung der Erfindung heranziehen würde. Die folgende ausführliche Beschreibung bezieht sich auf die derzeit besten möglichen Ausführungsarten der Offenbarung. Sie dienen lediglich zur näheren Erläuterung der Erfindung. Die Beschreibung ist daher nicht in einem einschränkenden Sinn zu verstehen, sondern dient lediglich der Veranschaulichung der allgemeinen Prinzipien der Erfindung, da der Umfang der Erfindung am besten durch die beigefügten Ansprüche definiert wird. Dabei gilt der zitierte Stand der Technik als Teil der zur Erfindung gehörigen Offenbarung. Further refinements and advantages emerge from the subject matter of the subclaims and the drawings with the associated descriptions. Exemplary embodiments are explained in more detail below with reference to the accompanying drawings. The invention is not intended to be restricted solely to these exemplary embodiments listed. The present invention is intended to relate to all subjects which a person skilled in the art would now and in the future use as obvious for realizing the invention. The following detailed description is of the best mode currently practicing the disclosure. They only serve to explain the invention in more detail. Therefore, the description is not to be taken in a limiting sense, but is merely intended to illustrate the general principles of the invention, as the scope of the invention is best defined by the appended claims. The cited prior art is considered part of the disclosure pertaining to the invention.
Kurze Beschreibung der Zeichnungen Brief description of the drawings
Fig. 1 zeigt in schematischer Draufsicht ein erstes Ausführungsbeispiel eines erfindungsgemäßen elektronischen Bauelements, welches eine Abzweigung aufweist. Fig. 2 zeigt einen Schnitt der Abzweigung gemäß Fig. 1 und den Verlauf der Bewegung eines Quantenpunkts bei der Abzweigung. 1 shows a schematic top view of a first exemplary embodiment of an electronic component according to the invention, which has a junction. FIG. 2 shows a section of the junction according to FIG. 1 and the course of the movement of a quantum dot at the junction.
Bevorzugtes Ausführungsbeispiel Preferred embodiment
In Fig. 1 wird ein Ausführungsbeispiel für ein erfindungsgemäßes elektronisches Bauelement 10 dargestellt, welches aus einer Halbleiter-Heterostruktur gebildet ist. Die Strukturen des Bauelements liegen vorzugsweise in einer nanoskaligen Dimension. Als Substrat 12 für das elektronische Bauelement 10 wird undotiertes Siliziumgermanium (SiGe) eingesetzt. Das elektronische Bauelement 10 ist so ausgestaltet, dass es ein zweidimensionales Elektronengas (2DEG) enthält. Auf einer Fläche 14 des Substrats 12 sind Gatterelektrodenanordnungen 16, 18, 20 vorgesehen. 1 shows an exemplary embodiment of an electronic component 10 according to the invention, which is formed from a semiconductor heterostructure. The structures of the component are preferably in a nanoscale dimension. Undoped silicon germanium (SiGe) is used as substrate 12 for electronic component 10. The electronic component 10 is designed in such a way that it contains a two-dimensional electron gas (2DEG). Gate electrode arrangements 16, 18, 20 are provided on a surface 14 of the substrate 12.
Die Gatterelektrodenanordnungen 16, 18 weisen jeweils zwei Gatterelektroden 22, 24, 26, 28 auf. Die einzelnen Gatterelektroden 22, 24, 26, 28 sind in geeigneter Weise mit Isolierschichten 30 elektrisch voneinander getrennt. Die Gatterelektrodenanordnungen 16, 18, 20 sind dazu schichtweise aufgebaut, wobei zwischen jeder Gatterelektrode 22, 24, 26, 28 jeweils die Isolierschicht 24 vorgesehen ist. Die Gatterelektroden 22, 24, 26, 28 umfassen weiterhin Elektrodenfinger 32, 34, 36, 38, wobei die einer Gatterelektrode 22, 24, 26, 28 jeweils parallel zueinander auf der Fläche 14 des Substrats 12 angeordnet sind. The gate electrode arrangements 16, 18 each have two gate electrodes 22, 24, 26, 28. The individual gate electrodes 22, 24, 26, 28 are electrically isolated from one another by means of insulating layers 30 in a suitable manner. For this purpose, the gate electrode arrangements 16, 18, 20 are constructed in layers, the insulating layer 24 being provided between each gate electrode 22, 24, 26, 28. The gate electrodes 22, 24, 26, 28 furthermore comprise electrode fingers 32, 34, 36, 38, with those of a gate electrode 22, 24, 26, 28 each being arranged parallel to one another on the surface 14 of the substrate 12.
Die Gatterelektrodenanordnungen 16, 18, 20 werden über elektrische Anschlüsse mit geeigneter Spannung versorgt. Durch geeignetes Anlegen von sinusförmig verlaufenden Spannungen an die Gatterelektroden 22, 24, 26, 28 der Gatterelektrodenanordnungen 16, 18 wird eine Potentialmulde in dem Substrat 12 erzeugt. Ein in dieser Potentialmulde gefangener Quantenpunkt lässt sich so durch das Substrat translatieren. Die Potentialmulde wird durch die geeignete Ansteuerung der Elektrodenfinger 32, 34, 36, 38 mit Sinusspannungen längs durch das Substrat translatiert. Der Quantenpunkt, der in einer solchen Potentialmulde quasi gefangen ist, lässt sich mit dieser Potentialmulde über eine längere Distanz in dem zweidimensionalen Elektronengas des Substrats 12 aus SiGe translatieren, ohne eine quantenmechanische Zustandsänderung zu erfahren. The gate electrode arrangements 16, 18, 20 are supplied with a suitable voltage via electrical connections. By suitably applying sinusoidal voltages to the gate electrodes 22, 24, 26, 28 of the gate electrode arrangements 16, 18, a potential well is generated in the substrate 12. A quantum dot trapped in this potential well can thus be translated through the substrate. The potential well is translated longitudinally through the substrate by suitable control of the electrode fingers 32, 34, 36, 38 with sinusoidal voltages. The quantum dot, which is more or less trapped in such a potential well, can be overridden with this potential well translate a longer distance in the two-dimensional electron gas of the substrate 12 made of SiGe without experiencing a quantum mechanical change of state.
Die Gatterelektrodenanordnung 18 zweigt von der Gatterelektrodenanordnung 16 in einem Kreuzungsbereich 40 ab. In dem Kreuzungsbereich 40 ist die Gatterelektrodenanordnung 20 angeordnet. Die Gatterelektrodenanordnung 20 enthält im vorliegenden Ausführungsbeispiel zwei Barriere-Gatterelektroden 42, 44. Diese Barriere-Gatterelektroden 42, 44 können zugeschaltet werden, wenn sich die bewegte Potentialmulde mit dem Quantenpunkt in dem Kreuzungsbereich 40 befindet. Durch das Zuschalten der Barriere-Gatterelektroden 42, 44 wird die Potentialmulde mit dem Quantenpunkt in dem Kreuzungsbereich 40 festgehalten. Eine Pump-Gatterelektrode 46 der Gatterelektrodenanordnung 20 veranlasst die Potentialmulde mit dem Quantenpunkt zu einem Richtungswechsel hin zu der Gatterelektrodenanordnung 18. The gate electrode arrangement 18 branches off from the gate electrode arrangement 16 in an intersection area 40. The gate electrode arrangement 20 is arranged in the intersection region 40. In the present exemplary embodiment, the gate electrode arrangement 20 contains two barrier gate electrodes 42, 44. These barrier gate electrodes 42, 44 can be switched on when the moving potential well with the quantum dot is located in the intersection area 40. By connecting the barrier gate electrodes 42, 44, the potential well with the quantum dot is held in the intersection area 40. A pump gate electrode 46 of the gate electrode arrangement 20 causes the potential well with the quantum dot to change direction towards the gate electrode arrangement 18.
Sofern kein Richtungswechsel durch die Potentialmulde mit dem Quantenpunkt vorgenommen werden soll, wird eine Barriere-Gatterelektrode 48 der Gatterelektrodenanordnung 20 zugeschaltet. Die beiden anderen Barriere- Gatterelektroden 42, 44 werden hingegen ausgeschaltet. Die Barriere-Gatterelektrode 48 sperrt den Zugang zur Gatterelektrodenanordnung 18. Der Quantenpunkt in der bewegten Potentialmulde hat somit keine Veranlassung für einen Richtungswechsel. If no change of direction is to be made through the potential well with the quantum dot, a barrier gate electrode 48 is connected to the gate electrode arrangement 20. The other two barrier gate electrodes 42, 44, however, are switched off. The barrier gate electrode 48 blocks access to the gate electrode arrangement 18. The quantum dot in the moving potential well thus has no cause for a change in direction.
Die Fig. 2 stellt schematisch einen Schnitt durch ein solches elektronisches Bauteil 10 dar. Unter dem Schnitt des Bauteils 10 ist eine Verlaufsfolge A bis C einer beweglichen Potentialmulde 50 mit einem Quantenpunkt 52 dargestellt. In der Abbildung des elektronischen Bauelements 10 sind nur die Elektrodenfinger 36, 38 die Barriere- Gatterelektroden 48 und die Pump-Gatterelektroden 46 im Schnitt sichtbar. Darunter sind Abfolgen von A bis C der Verläufe von Potentialmulden 50 in dem Substrat 12 dargestellt. Die Elektrodenfinger 36, 38 der Gatterelektrodenanordnungen 18 bildet durch das Substrat 12 die bewegliche Potentialmulden 50 aus. Die Bewegung der Potentialmulden 50 erfolgt dabei durch die geeignete Verschaltung der Elektrodenfinger 26, 28. Die Elektrodenfinger 36, 38 der Gatterelektrodenanordnung 16 sind dazu periodisch alternierend zusammengeschaltet, welche eine nahezu kontinuierliche Bewegung der Potentialmulde 50 durch das Substrat 12 bewirken. Bei der vorliegenden Abbildung wird veranschaulicht, wie die Potentialmulde 50 mit dem Quantenpunkt 52 aus dem Kreuzungsbereich 40 abgezweigt wird. Die bewegliche Potentialmulde 50 befindet sich in Richtung der abzweigenden Gatterelektrode 18. Der Pfeil 54 symbolisiert hierbei die Bewegungsrichtung, die die Potentialmulde 50 mit dem Quantenpunkt 52 läuft. 2 schematically shows a section through such an electronic component 10. Below the section of component 10, a progression sequence A to C of a movable potential well 50 with a quantum dot 52 is shown. In the illustration of the electronic component 10, only the electrode fingers 36, 38, the barrier gate electrodes 48 and the pump gate electrodes 46 are visible in section. Below that, sequences from A to C of the courses of potential wells 50 in the substrate 12 are shown. The electrode fingers 36, 38 of the gate electrode arrangements 18 form the movable potential wells 50 through the substrate 12. The movement of the potential wells 50 takes place by means of suitable interconnection of the electrode fingers 26, 28. The electrode fingers 36, 38 of the gate electrode arrangement 16 are for this purpose interconnected periodically in alternation, which cause an almost continuous movement of the potential well 50 through the substrate 12. The present figure illustrates how the potential well 50 with the quantum dot 52 is branched off from the intersection area 40. The movable potential well 50 is located in the direction of the branching gate electrode 18. The arrow 54 here symbolizes the direction of movement that the potential well 50 runs with the quantum dot 52.
Bezugszeichenliste Elektronisches Bauelement Substrat Fläche Gatterelektrodenanordnung Gatterelektrodenanordnung Gatterelektrodenanordnung Gatterelektroden Gatterelektroden Gatterelektroden Gatterelektroden Isolierschichten Elektrodenfinger Elektrodenfinger Elektrodenfinger Elektrodenfinger Kreuzungsbereich Barriere-Gatterelektrode Barriere-Gatterelektrode Pump-Gatterelektrode Barriere-Gatterelektrode Bewegliche Potentialmulde Quantenpunkt Pfeil LIST OF REFERENCE NUMERALS Electronic component substrate area Gate electrode arrangement Gate electrode arrangement Gate electrode arrangement Gate electrodes Gate electrodes Gate electrodes Gate electrodes Insulating layers Electrode finger Electrode finger Electrode finger Electrode finger Crossing area Barrier-gate electrode Barrier-gate electrode Pump-gate electrode Barrier-gate electrode Movable potential well Quantum dot arrow

Claims

Patentansprüche Claims
1. Elektronisches Bauelement (10), welches von einem Halbleiterbauelement oder einer halbleiterähnlichen Struktur mit Gatterelektrodenanordnungen (16, 18, 20) zum Bewegen eines Quantenpunkts (52) gebildet wird, umfassend a) ein Substrat (12) mit einem zweidimensionalen Elektronengas oder Elektronenlochgas; b) elektrische Kontakte zum Verbinden der Gatterelektrodenanordnungen (16, 18, 20) mit Spannungsquellen, c) eine erste Gatterelektrodenanordnung (16) mit Gatterelektroden (22,24), welche an einer Fläche (14) des elektronischen Bauelements angeordnet ist, zur Erzeugung einer Potentialmulde (50) in dem Substrat (12); d) die erste Gatterelektrodenanordnung (16) parallel verlaufendeAn electronic component (10) which is formed by a semiconductor component or a semiconductor-like structure with gate electrode arrangements (16, 18, 20) for moving a quantum dot (52), comprising a) a substrate (12) with a two-dimensional electron gas or electron hole gas; b) electrical contacts for connecting the gate electrode arrangements (16, 18, 20) with voltage sources, c) a first gate electrode arrangement (16) with gate electrodes (22,24), which is arranged on a surface (14) of the electronic component, for generating a Potential well (50) in the substrate (12); d) the first gate electrode arrangement (16) extending in parallel
Elektrodenfinger (32, 34) aufweist, wobei e) die Elektrodenfinger (32, 34) periodisch alternierend zusammengeschaltet sind, welche eine nahezu kontinuierliche Bewegung der Potentialmulde (50) durch das Substrat (12) bewirken, wobei ein Quantenpunkt (52) mit dieser Potentialmulde (50) in eine Richtung translatiert wird, dadurch gekennzeichnet, dass f) eine zweite Gatterelektrodenanordnung (18) mit Gatterelektroden (26, 28) vorgesehen ist, welche mit anderer Richtung an einer Abzweigung (40) zur ersten Gatterelektrodenanordnung (16) vorgesehen ist; g) die zweite Gatterelektrodenanordnung (18) parallel verlaufendeElectrode fingers (32, 34), wherein e) the electrode fingers (32, 34) are periodically alternately interconnected, which cause an almost continuous movement of the potential well (50) through the substrate (12), a quantum dot (52) with this potential well (50) is translated in one direction, characterized in that f) a second gate electrode arrangement (18) with gate electrodes (26, 28) is provided, which is provided with a different direction at a junction (40) to the first gate electrode arrangement (16); g) the second gate electrode arrangement (18) extending in parallel
Elektrodenfinger (36, 38) aufweist, wobei h) die Elektrodenfinger (36, 38) periodisch alternierend zusammengeschaltet sind, welche eine nahezu kontinuierliche Bewegung der Potentialmulde (50) durch das Substrat (12) bewirken, wobei der Quantenpunkt (52) in der Potentialmulde (50) mit geänderter Fortbewegungsrichtung bewegbar ist. Having electrode fingers (36, 38), wherein h) the electrode fingers (36, 38) are interconnected periodically in alternation, which cause an almost continuous movement of the potential well (50) through the substrate (12), the quantum dot (52) being movable in the potential well (50) with a changed direction of movement.
2. Elektronisches Bauelement (10) nach Anspruch 1, dadurch gekennzeichnet, dass eine dritte Gatterelektrodenanordnung (20) zum Erzeugen einer zuschaltbaren Potentialbarrieren-Anordnung (42, 44, 48) im Bereich der Abzweigung (40) vorgesehen ist, welche zum Abzweigen des Quantenpunkts (52) zugeschaltet wird. 2. Electronic component (10) according to claim 1, characterized in that a third gate electrode arrangement (20) for generating a switchable potential barrier arrangement (42, 44, 48) is provided in the region of the junction (40) which is used to branch off the quantum dot (52) is switched on.
3. Elektronisches Bauelement (10) nach einem der Ansprüche 1 oder 2, dadurch gekennzeichnet, dass Mittel zur Synchronisation der3. Electronic component (10) according to one of claims 1 or 2, characterized in that means for synchronizing the
Gatterelektrodenanordnungen (16, 18, 20) zur Übergabe des Quantenpunkts an der Abzweigung vorgesehen sind. Gate electrode arrangements (16, 18, 20) are provided for transferring the quantum dot at the junction.
4. Elektronisches Bauelement (10) nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, dass eine Gatterelektrodenanordnung (16, 18) jeweils aus zwei parallelen Gatterelektroden (22, 24, 26, 28) besteht, welche eine kanalartige Struktur bilden. 4. Electronic component (10) according to one of claims 1 to 3, characterized in that a gate electrode arrangement (16, 18) each consists of two parallel gate electrodes (22, 24, 26, 28) which form a channel-like structure.
5. Elektronisches Bauelement (10) nach einem der Ansprüche 1 bis 4, dadurch gekennzeichnet, dass das Substrat (12) des elektronischen Bauelements (10) Galliumarsenid (GaAs) und/oder Silizumgermanium (SiGe) enthält. 5. Electronic component (10) according to one of claims 1 to 4, characterized in that the substrate (12) of the electronic component (10) contains gallium arsenide (GaAs) and / or silicon germanium (SiGe).
6. Elektronisches Bauelement (10) nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, dass die jeweils zusammengeschalteten Gatterelektroden (22, 24, 26, 28) periodisch und/oder phasenverschoben mit Spannung beaufschlagbar ausgebildet sind. 6. Electronic component (10) according to one of claims 1 to 5, characterized in that the respectively interconnected gate electrodes (22, 24, 26, 28) are designed such that voltage can be applied periodically and / or out of phase.
7. Elektronisches Bauelement (10) nach einem der Ansprüche 1 bis 6, dadurch gekennzeichnet, dass jeweils jeder dritte Elektrodenfinger (32, 34, 36, 38) einer Gatterelektrode (22, 24, 26, 28) zusammengeschaltet ist. 7. Electronic component (10) according to one of claims 1 to 6, characterized in that in each case every third electrode finger (32, 34, 36, 38) of a gate electrode (22, 24, 26, 28) is interconnected.
8. Elektronisches Bauelement (10) nach einem der Ansprüche 1 bis 7, dadurch gekennzeichnet, dass Mittel zum Verbinden zweier Qubits eines Quantencomputers vorgesehen sind. 8. Electronic component (10) according to one of claims 1 to 7, characterized in that means are provided for connecting two qubits of a quantum computer.
9. Elektronisches Bauelement (10) nach einem der Ansprüche 1 bis 8, dadurch gekennzeichnet, dass die zweite Gatterelektrodenanordnung (18) mit9. Electronic component (10) according to one of claims 1 to 8, characterized in that the second gate electrode arrangement (18) with
Gatterelektroden vorgesehen ist, welche eine zweite bewegliche Potentialmulde (50) in dem Substrat (12) erzeugen. Gate electrodes are provided which generate a second movable potential well (50) in the substrate (12).
10. Elektronisches Bauelement (10) nach einem der Ansprüche 1 bis 9, dadurch gekennzeichnet, dass ein Magnetfeldgenerator für ein zuschaltbares Magnetfeld und/oder ein Gradientenmagnetfeld vorgesehen ist. 10. Electronic component (10) according to one of claims 1 to 9, characterized in that a magnetic field generator is provided for a switchable magnetic field and / or a gradient magnetic field.
11. Verfahren für ein elektronisches Bauelement (10) nach einem der vorherigen Ansprüche, dadurch gekennzeichnet, dass die zusammengeschalteten Gatterelektroden (22, 24, 26, 28) phasenverschoben mit Spannung beaufschlagt werden, welche eine nahezu kontinuierliche Bewegung der Potentialmulde (50) durch das Substrat (12) bewirkt, wobei ein Quantenpunkt (52) mit dieser11. The method for an electronic component (10) according to any one of the preceding claims, characterized in that the interconnected gate electrodes (22, 24, 26, 28) are applied phase-shifted with voltage, which causes an almost continuous movement of the potential well (50) through the Substrate (12) causes a quantum dot (52) with this
Potentialmulde (50) translatiert wird. Potential well (50) is translated.
12. Verfahren für ein elektronisches Bauelement (10) nach Anspruch 11, dadurch gekennzeichnet, dass jeweils jede vierte Gatterelektrode (22, 24, 26, 28) zusammengeschaltet und periodisch mit Spannung beaufschlagt wird. 12. The method for an electronic component (10) according to claim 11, characterized in that in each case every fourth gate electrode (22, 24, 26, 28) is interconnected and periodically applied with voltage.
13. Verfahren für ein elektronisches Bauelement (10) nach einem der Ansprüche 11 oder 12, dadurch gekennzeichnet, dass die Potentialbarriere zum Abzweigen des Quantenpunkts an der Abzweigung zugeschaltet wird. 13. The method for an electronic component (10) according to any one of claims 11 or 12, characterized in that the potential barrier for branching off the quantum dot is switched on at the junction.
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