EP4005089A2 - Amplificateur à commande de gain continue - Google Patents

Amplificateur à commande de gain continue

Info

Publication number
EP4005089A2
EP4005089A2 EP20775961.4A EP20775961A EP4005089A2 EP 4005089 A2 EP4005089 A2 EP 4005089A2 EP 20775961 A EP20775961 A EP 20775961A EP 4005089 A2 EP4005089 A2 EP 4005089A2
Authority
EP
European Patent Office
Prior art keywords
current
amplifier
variable gain
circuit
fbn
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP20775961.4A
Other languages
German (de)
English (en)
Inventor
Michiel Antonius Petrus Pertijs
Eunchul Kang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SONOSILICON CO.,LTD.
Original Assignee
Technische Universiteit Delft
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Technische Universiteit Delft filed Critical Technische Universiteit Delft
Publication of EP4005089A2 publication Critical patent/EP4005089A2/fr
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0035—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G1/00—Details of arrangements for controlling amplification
    • H03G1/0005—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0035—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements
    • H03G1/007—Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using continuously variable impedance elements using FET type devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3084—Automatic control in amplifiers having semiconductor devices in receivers or transmitters for electromagnetic waves other than radiowaves, e.g. lightwaves
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45514—Indexing scheme relating to differential amplifiers the FBC comprising one or more switched capacitors, and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45522—Indexing scheme relating to differential amplifiers the FBC comprising one or more potentiometers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45524—Indexing scheme relating to differential amplifiers the FBC comprising one or more active resistors and being coupled between the LC and the IC
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45528—Indexing scheme relating to differential amplifiers the FBC comprising one or more passive resistors and being coupled between the LC and the IC

Definitions

  • the present invention relates to a variable gain amplifier in a first aspect, in a second aspect to an ultrasound imaging device, and in a third aspect to a method of operating a variable gain amplifier.
  • US patent publication US2004/0090269 discloses a variable gain amplifier using interpolation between discrete gain steps, exploiting the characteristics of a differential pair of transistors as smooth current steering device.
  • a differential pair at the output of an amplifier directs a fraction of the output current back to the input, and a fraction towards the output.
  • the current gain of this amplifier can be continuously controlled through the voltage applied to the differential pair.
  • US patent publication US2018/262169 discloses a time gain compensation circuit including an impedance network and a differential amplifier coupled to the impedance network.
  • the impedance network provides a fixed impedance to the differential amplifier when a gain of the time gain compensation circuit is changed from a maximum value to a minimum value.
  • Japanese patent publication JP-H03-232310 discloses a variable gain amplifier having high linearity, using a ladder resistance network in a current feedback loop.
  • the resistors in the ladder network are switched on or off in the feedback loop using discrete switches, under control of a digital control signal.
  • US patent publication US2018/3671 1 1 discloses an amplifier with built in time gain compensation for ultrasound applications.
  • a feedback loop in an amplifier circuit uses a combination of resistors and capacitors forming a variable impedance feedback circuit, wherein inclusion of the individual resistors and capacitors is controlled by switching on or off NMOS transistors under control of a digital control signal.
  • the present invention seeks to provide a variable gain amplifier which is particularly suited for applications requiring a continuous and smooth gain control over a wide range, and requiring a time dependent control, e.g. for implementing a time-gain control (TGC) amplifier scheme.
  • TGC time-gain control
  • variable gain amplifier is provided as defined in claim 1 .
  • an ultrasound imaging device is provided as defined in claim 12, and in an even further aspect, a method is provided as defined in claim 15.
  • the present invention embodiments allow to provide a variable gain amplifier, that is particularly suited for time-gain control (TGC) amplifier schemes.
  • TGC time-gain control
  • the present invention embodiments allow to provide continuous, smooth gain control, without introducing gain-switching artefacts (in contrast with prior-art TGC implementation schemes based on discrete gain steps).
  • the present invention embodiments do not rely on the process, supply and temperature dependent properties of transistors, but defines the gain based on well-defined ratios of discrete components (resistors or capacitors). This in contrast with prior-art TGC implementation schemes that approximate an exponential gain by means of non-linear device characteristics.
  • the present invention embodiments do not require a preceding low-noise amplifier (LNA) in the signal path as it can provide low input referred noise in a power-efficient manner, in contrast with prior-art TGC implementation schemes that employ an attenuator at their input, which needs to be driven by a power-hungry high-dynamic-range LNA.
  • LNA low-noise amplifier
  • Fig. 1 shows a circuit diagram of an exemplary embodiment of a variable gain amplifier according to the present invention
  • Fig. 2 shows a timing diagram of current-steering fractions as applied in the embodiment of
  • Fig. 3 shows a circuit diagram of a further embodiment of the variable gain amplifier according to the present invention.
  • Fig. 4 shows an exemplary example of a timing diagram of control input parameters as used in the embodiment of Fig. 3;
  • Fig. 5 shows a circuit diagram of an exemplary embodiment of a gain-control circuit in accordance with the present invention
  • Fig. 6 shows a circuit diagram of a further embodiment a variable gain amplifier according to the present invention.
  • Fig. 7 shows a circuit diagram of an even further embodiment a variable gain amplifier according to the present invention.
  • Fig. 8 shows a circuit diagram of yet a further embodiment a variable gain amplifier according to the present invention.
  • Fig. 9 shows a schematic diagram of an ultrasound imaging device including a variable gain amplifier according to one of the present invention embodiments.
  • VGAs variable-gain amplifiers
  • DR dynamic range
  • a specific example of interest is ultrasound imaging, in which a transducer is used to transmit an acoustic pulse into a medium and record the echoes resulting from backscattering of this pulse. Due to absorption and scattering, the acoustic signal is attenuated as it travels through the medium. Echo signals from scatterers close to the transducer arrive first and are attenuated less than subsequent echo signals originating from scatterers further away. This results in a signal received by the transducer of which the amplitude decreases exponentially with time (linearly in decibels).
  • TGC time-gain compensation
  • Amplifiers with discrete gain steps approximate the ideal exponentially-varying gain by a number of discrete gain steps that are sequentially applied. They are also referred to as programmable-gain amplifiers (PGAs).
  • PGAs programmable-gain amplifiers
  • An important advantage of this approach is that the gain steps can be accurately defined by means of a digitally-programmable resistive feedback network, a digitally-programmable capacitive feedback network, or a digitally-programmable current-steering feedback network.
  • the gain steps can be divided among multiple amplifier stages, with course gain steps realized in the low-noise amplifier (LNA) at the input of the receive signal path, which enables the realization of highly power-efficient amplifiers.
  • LNA low-noise amplifier
  • Switching from one discrete gain step to the next is typically associated with a switching transient that can lead to artefacts in the ultrasound image at a depth that corresponds to the gain-switching moment.
  • artefacts can be made negligible by making the gain steps small, but this requires a large number of gain steps to cover the gain range, leading to a complex circuit that requires substantial die area.
  • VGAs variable-gain amplifiers
  • Amplifiers with continuous gain control are also referred to as variable-gain amplifiers (VGAs) and typically have a gain that can be set by an analogue control input, typically a control voltage.
  • the gain tends to depend (approximately) exponentially on the control voltage, giving a linear-in-dB gain control.
  • a variable gain amplifier 1 comprising an amplifier A, a currentsteering circuit CSC, a feedback network FBN, and a gain control circuit GCC.
  • the current-steering circuit CSC is connected to an output of the amplifier A, and to a plurality of inputs of the feedback network FBN.
  • the feedback network FBN is connected to an input of the amplifier A which is connected to receive an input current (I IN) in operation, the feedback network (FBN) being arranged to provide a feedback current 1®.
  • the current-steering circuit CSC is arranged to divide an output current lout of the amplifier A into a plurality of control currents l ⁇ , 1 ⁇ / ⁇ N, N being an integer larger than or equal to 2.
  • the output current lout is divided using associated current-steering fractions a, the current-steering fractions a being determined using a control input from the gain control circuit GCC to have a value of 0 ⁇ a £ 1 .
  • ⁇ 3 ⁇ 4 1.
  • This embodiment allows a precise control of the feedback current 1® by dividing the output current lout towards the feedback network FBN, e.g. by having two steering fractions a, to be non-zero, while the other steering fractions a, are substantially zero.
  • amplifier A in the embodiments described herein is implemented as an error amplifier that receives the difference between the input current IIN and feedback current I® and provides gain so as to null this difference.
  • the FBN defines a number of N discrete gain steps, while the CSC enables smooth interpolation between those gain steps.
  • Each gain step is associated with a current applied to the FBN, 1 £ i £ N.
  • the FBN provides a weighted sum of these currents to the input of the amplifier in the form of a feedback current /3 ⁇ 4:
  • b are the feedback factors, which are defined by ratios of passive components (resistors, capacitors, or direct connections), and as a result are attenuating: 0 ⁇ b ⁇ £ 1.
  • the CSC steers the loop amplifier’s output current lout to one or more of the FBN’s inputs, in such a way that the total output current lout is divided among the FBN’s inputs:
  • a is the fraction of lout that is steered to l ⁇ .
  • the fractions a can be changed by means of the control input (e.g. a control voltage) to the CSC.
  • the loop amplifier senses the voltage at its input and, ideally, provides an output current lout such that its input voltage is nulled.
  • the amplifier shown has two outputs, which provide the same current lout, so that this current can both flow into CSC and be delivered to a load (e.g. the next stage in the signal path).
  • the loop amplifier’s input voltage can only be nulled if the feedback current 1® equals the input current L, and thus lout will satisfy
  • the CSC is arranged such that lout can be smoothly steered from one input of the FBN to another.
  • the gain becomes
  • Fig. 2 shows, as an example, how the fractions a, can be changed as a function of time to sweep the gain of the variable gain amplifier 1 smoothly from 1/bi to 1 //?N.
  • the exemplary embodiment of the variable gain amplifier 1 shown as a general block diagram in Fig. 1 is a current amplifier, with a current input and a current output.
  • Other input and output configurations are possible, and intended to be within the scope of the present invention embodiments.
  • By adding a resistor or a capacitor at the input of the amplifier A of Fig. 1 an input voltage can be converted into a current, which is then amplified.
  • the variable gain amplifier 1 becomes a transconductance amplifier.
  • the output current lout can be converted into a voltage, making the variable gain amplifier 1 a transimpedance amplifier.
  • variable gain amplifier 1 in which the current-steering circuit CSC comprises a plurality oftransistors TI-TN, ofwhich source terminals are commonly connected to the output of the amplifier A, and the control input is provided as gate voltages V g ,i- V 9 ,N to each of the plurality of transistors TI-TN.
  • Fig. 3 shows a circuit diagram of a further embodiment wherein the CSC is implemented using source-coupled PMOS transistors TI-TN, in more generic words the plurality of transistors (TI- TN) comprise MOS transistors.
  • the output current lout of the (loop) amplifier A in this example flows into the common-sources of the transistors TI-TN at the top.
  • the path that the current takes towards the outputs /i to 7N depends on the voltages V g,i to & N applied to the gates of the PMOS transistors TI-TN, with a lower voltage causing more of the current to flow to the corresponding output.
  • the fractions ⁇ 3 ⁇ 4 can be set by applying appropriate gate voltages V g,i .
  • Fig. 4 shows, again as an example, how the time-varying fractions ⁇ 3 ⁇ 4 shown in Fig. 2 can be realized with time-varying gate voltages applied to the circuit in Fig. 3.
  • a feedback network FBN is shown that realizes exponentially-spaced gain steps by means of a network consisting of capacitors Cj.
  • the capacitor values in this example can be chosen to obtain a desired set of gain steps, and that the ladder topology allows the realization of a wide gain range without requiring a large ratio between the smallest and largest capacitor Cj in the network.
  • the feedback network FBN comprises a ladder network of capacitors Cj.
  • the DC biasing of the network is not well defined.
  • the feedback network FBN further comprises a resistor in parallel to one or more of the capacitors in the ladder network of capacitors (Cj).
  • the resistors (not shown) in parallel to the capacitors Cj, with sufficiently high values to ensure that within the frequency range of interest, the transfer function of the network is determined by the capacitors Cj.
  • the embodiments of the present invention described herein can be used as a time-gain compensation amplifier with an approximately linear-in-dB gain control, e.g. in ultrasound imaging transducer circuits.
  • the present invention in a further aspect relates to an ultrasound imaging device 5, an exemplary embodiment of which is shown in the schematic diagram shown in Fig. 9.
  • the ultrasound imaging device 5 comprises a transducer 6 to transmit an acoustic signal (e.g. a pulse type signal) into a medium and to receive echo signals, the transducer 6 being connected to a variable gain amplifier 1 according to any one of the embodiments described herein.
  • the ultrasound imaging device further comprises an imaging device control unit 8, the imaging device control unit 8 being connected to the variable gain amplifier 1 and arranged to implement a time-gain compensation (TGC) scheme using the control input of the variable gain amplifier 1.
  • TGC time-gain compensation
  • the transducer 6 and the variable gain amplifier 1 are part of an in-probe receiver circuit 7.
  • variable gain amplifier 1 may be implemented as a single integrated circuit device, it can be easily miniaturized and included together with the transducer 6 in the probe of an ultrasound imaging apparatus 5.
  • Fig. 9 shows a simplified block diagram, in actual implementations further components would be present, such as analog-to-digital converters (ADC), beamforming circuitry, etc.
  • ADC analog-to-digital converters
  • a plurality of these in-probe receiver circuits 7 are present in a parallel operating manner to serve elements of a transducer array.
  • the time-gain compensation scheme can be obtained using an even further aspect of the present invention, relating to a method of operating a variable gain amplifier 1 according to any one of the embodiments described herein, comprising receiving an input signal IIN at the input of the variable gain amplifier 1 , and controlling the control input of the variable gain amplifier 1 to implement a time-gain compensation TGC scheme for signal processing of the input signal I IN.
  • Fig. 5 shows an example implementation of the gain control circuit GCC that generates the gate voltages Vg,i from a single control voltage ⁇ co ntrol .
  • This control voltage ⁇ co ntrol can optionally be shared by multiple (variable gain) amplifiers, for instance by an array of variable gain amplifiers 1 associated with an array of ultrasound transducer elements, the echo signals of which can be compressed by the same time-varying gain.
  • the gain control circuit GCC comprises a plurality of stacked MOS (e.g. NMOS) differential pair connected transistors TDI-TDN-I , the gates of each differential pair connected transistors TDI being connected to a control input voltage Vcontroi and an associated reference voltage V re n, respectively.
  • a bias current source IB is connected to the plurality of stacked MOS differential pair connected transistors TDI-TDN-I .
  • a plurality of diode- connected MOS (e.g. PMOS) transistors MPi is present, each connected to an associated one of the plurality of stacked MOS (e.g. NMOS) differential pair connected transistors TDI-TDN-I .
  • the gate voltages V g, i of the plurality of diode connected MOS (e.g. PMOS) transistors MPi are provided as control input to the current-steering circuit CSC.
  • a bias current h is steered to one of a set of N diode-connected PMOS transistors MPi - MPN, the gate voltages of which are the required voltages V g,i .
  • Each NMOS differential pair TDI-TDN-I compares
  • Vreti ⁇ controi ⁇ Vref,2, / B is steered to MP2.
  • h is gradually steered from MPi to MP2 etc. until it finally fully flows to MPN if Vcontroi > V ref,N -i. If Vcontroi increases linearly with time, this leads to gate voltages V g,i in accordance with e.g. the timing diagram shown Fig. 4.
  • the reference voltages V re ti can be generated, for instance, by passing an appropriate bias current through a string of resistors.
  • the circuit of Fig. 5 can be shared by multiple amplifiers, e.g. multiple variable gain amplifiers 1 according to one of the present invention embodiment. Note that the circuit in Fig. 5 is just an example of how the voltages can be generated. A similar complementary circuit with diode-connected NMOS transistors and PMOS differential pairs can also be used. Also, current mirrors can be employed to allow the circuit to operate with smaller voltage headroom.
  • the control voltage Vco ntroi can be an externally-generated analog control signal, but it can also be generated on-chip, for instance by an digital-to-analog converter (DAC) to enable digital gain control, or by an integrator-type circuit that generates a voltage that ramps as a function of time.
  • DAC digital-to-analog converter
  • variable gain amplifier 1 such as the embodiment shown in Fig. 1
  • this amplifier A provides an output current lout such that its input voltage is nulled. This, however, would require infinite loop gain.
  • the gain of the loop amplifier A is made dependent on the control input in a further embodiment, so as to obtain a more constant loop gain.
  • This control can also be employed to ensure that the feedback loop is stable across the range of gain values.
  • a possible way to implement this is to make the biasing of the transistors in the loop amplifier A dependent on the control input.
  • a suitable control-dependent bias current for the loop amplifier A can be derived from a control voltage using a circuit similar to that shown in Fig. 5, in which current is steered based on the level of the control voltage relative to a set of reference voltages.
  • the amplifier A has a finite loop gain, which finite loop gain is dependent on an amplifier gain control input.
  • FIG. 6 An alternative implementation of an amplifier 1 with continuous gain control according to the present invention is shown in Fig. 6.
  • the feedback network FBN is implemented using a string of resistors Rj ratherthan a capacitive network, so that the feedback factors are set by resistor ratios.
  • This embodiment has the feature that the feedback network FBN comprises a circuit of resistors Rj, e.g. a series circuit.
  • the CSC comprises a cascade of K several differential transistor pairs T Daj , T Dbj , each of which steers a fraction g ⁇ towards the input.
  • the fraction of / out that is fed back to the input is thus the product of the fractions g ⁇ , resulting in a transfer function
  • This embodiment has the feature that the feedback network FBN and current-source circuit CSC are combined in a cascaded circuit of K differential transistor pairs T Daj , T Dbj , K being an integer larger than or equal to 2, and 1 ⁇ i ⁇ K.
  • Each differential transistor pair T Daj , T Dbj provides a fraction y, of the output current lout as feedback current I® to the input of the amplifier A, as function of the control input.
  • the first differential pair To a,i , T Db,i provides a fraction gi of lout.
  • the further differential transistor pairs then provide a fraction y, of the output current of the previous differential transistor pairs T Daj - 1 , T Db,i -i .
  • the control input comprises gate voltages of individual transistors in the cascaded circuit of K differential transistor pairs T Da , T Db to set the associated fractions g,.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)
  • Control Of Amplification And Gain Control (AREA)
  • Steering Control In Accordance With Driving Conditions (AREA)

Abstract

Un amplificateur à gain variable comprend un amplificateur (A), un circuit de direction de courant (CSC), un réseau de rétroaction (FBN) et un circuit de commande de gain (GCC). Le circuit de direction de courant (CSC) divise un courant de sortie (Iout) de l'amplificateur (A) en une pluralité de courants de commande (Ii), le courant de sortie (Iout) est divisé à l'aide de fractions de direction de courant associées (αi), les fractions de direction de courant αi étant déterminées à l'aide d'une entrée de commande provenant du circuit de commande de gain (GCC). Le réseau de rétroaction (FBN) comprend un réseau de composants et est agencé pour fournir le courant de rétroaction (Ifb) en tant que somme pondérée des courants de commande (Ii), conformément à I fb <sb />= ΣN i =1 β i I ι , où βi sont des facteurs de rétroaction, 0≤ βi≤ 1, déterminés par les composants présents dans le réseau de rétroaction (FBN) Le circuit de commande de gain (GCC) est agencé pour commander les fractions de direction de courant associées (αi) de manière continue et variable dans le temps, à tout moment ΣN α=1 <sb />α i <sb />= 1.
EP20775961.4A 2019-07-23 2020-07-22 Amplificateur à commande de gain continue Pending EP4005089A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL2023557A NL2023557B1 (en) 2019-07-23 2019-07-23 Amplifier with continuous gain control
PCT/NL2020/050481 WO2021015618A2 (fr) 2019-07-23 2020-07-22 Amplificateur à commande de gain continue

Publications (1)

Publication Number Publication Date
EP4005089A2 true EP4005089A2 (fr) 2022-06-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP20775961.4A Pending EP4005089A2 (fr) 2019-07-23 2020-07-22 Amplificateur à commande de gain continue

Country Status (3)

Country Link
EP (1) EP4005089A2 (fr)
NL (1) NL2023557B1 (fr)
WO (1) WO2021015618A2 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115347876A (zh) * 2022-10-17 2022-11-15 电子科技大学 一种超声回声信号接收的模拟前端电路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03232310A (ja) * 1989-11-02 1991-10-16 Kokusai Syst Kk 可変利得増幅器、ケーブル線路等化器および疑似ケーブル線路
GB2288499A (en) * 1994-03-08 1995-10-18 Stewart Hughes Ltd Gain control and capacitance correction for photodiode signal amplifier
US5880618A (en) * 1997-10-02 1999-03-09 Burr-Brown Corporation CMOS differential voltage controlled logarithmic attenuator and method
US6798291B2 (en) 2002-11-12 2004-09-28 Koninklijke Philips Electronics N.V. Variable gain current amplifier with a feedback loop including a differential pair
US20150280662A1 (en) 2014-03-27 2015-10-01 Texas Instruments Incorporated Time gain compensation circuit in an ultrasound receiver
US10348409B2 (en) * 2017-03-22 2019-07-09 Maxlinear, Inc. Method and system for continuous gain control in a feedback transimpedance amplifier
EP3641656A4 (fr) * 2017-06-20 2021-03-17 Butterfly Network, Inc. Amplificateur doté d'une compensation de gain en temps intégrée destiné à des applications ultrasonores

Also Published As

Publication number Publication date
WO2021015618A3 (fr) 2021-04-15
WO2021015618A2 (fr) 2021-01-28
NL2023557B1 (en) 2021-02-10

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