EP3920475A4 - Verfahren und vorrichtung zur speicherverwaltung - Google Patents
Verfahren und vorrichtung zur speicherverwaltung Download PDFInfo
- Publication number
- EP3920475A4 EP3920475A4 EP19915801.5A EP19915801A EP3920475A4 EP 3920475 A4 EP3920475 A4 EP 3920475A4 EP 19915801 A EP19915801 A EP 19915801A EP 3920475 A4 EP3920475 A4 EP 3920475A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- management method
- memory management
- memory
- management
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007726 management method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9063—Intermediate storage in different physical parts of a node or terminal
- H04L49/9078—Intermediate storage in different physical parts of a node or terminal using an external memory or storage device
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9084—Reactions to storage capacity overflow
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
- H04L43/0805—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters by checking availability
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L43/00—Arrangements for monitoring or testing data switching networks
- H04L43/16—Threshold monitoring
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/10—Flow control; Congestion control
- H04L47/32—Flow control; Congestion control by discarding or delaying data units, e.g. packets or frames
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/56—Queue scheduling implementing delay-aware scheduling
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/56—Queue scheduling implementing delay-aware scheduling
- H04L47/562—Attaching a time tag to queues
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/109—Integrated on microchip, e.g. switch-on-chip
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/50—Overload detection or protection within a single switching element
- H04L49/501—Overload detection
- H04L49/503—Policing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/901—Buffering arrangements using storage descriptor, e.g. read or write pointers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9021—Plurality of buffers per packet
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9036—Common buffer combined with individual queues
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9084—Reactions to storage capacity overflow
- H04L49/9089—Reactions to storage capacity overflow replacing packets in a storage arrangement, e.g. pushout
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Environmental & Geological Engineering (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2019/075935 WO2020168563A1 (zh) | 2019-02-22 | 2019-02-22 | 一种存储器的管理方法及装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3920475A1 EP3920475A1 (de) | 2021-12-08 |
EP3920475A4 true EP3920475A4 (de) | 2022-02-16 |
Family
ID=72144041
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP19915801.5A Pending EP3920475A4 (de) | 2019-02-22 | 2019-02-22 | Verfahren und vorrichtung zur speicherverwaltung |
Country Status (6)
Country | Link |
---|---|
US (1) | US11695710B2 (de) |
EP (1) | EP3920475A4 (de) |
JP (1) | JP7241194B2 (de) |
KR (1) | KR20210130766A (de) |
CN (1) | CN113454957B (de) |
WO (1) | WO2020168563A1 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11381515B2 (en) * | 2019-06-28 | 2022-07-05 | Intel Corporation | On-demand packet queuing in a network device |
CN114257559B (zh) * | 2021-12-20 | 2023-08-18 | 锐捷网络股份有限公司 | 一种数据报文的转发方法及装置 |
WO2023130997A1 (zh) * | 2022-01-07 | 2023-07-13 | 华为技术有限公司 | 管理流量管理tm控制信息的方法、tm模块和网络转发设备 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020071387A1 (en) * | 2000-12-11 | 2002-06-13 | Kabushiki Kaisha Toshiba | Inter-network relay unit and transfer scheduling method in the same |
US20050240745A1 (en) * | 2003-12-18 | 2005-10-27 | Sundar Iyer | High speed memory control and I/O processor system |
US20170134282A1 (en) * | 2015-11-10 | 2017-05-11 | Ciena Corporation | Per queue per service differentiation for dropping packets in weighted random early detection |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060031565A1 (en) * | 2004-07-16 | 2006-02-09 | Sundar Iyer | High speed packet-buffering system |
KR100875739B1 (ko) * | 2007-02-12 | 2008-12-26 | 삼성전자주식회사 | Ip 네트워크 시스템에서의 패킷 버퍼 관리 장치 및 방법 |
WO2010089886A1 (ja) | 2009-02-06 | 2010-08-12 | 富士通株式会社 | パケットバッファ装置及びパケット廃棄方法 |
US8441927B2 (en) | 2011-01-13 | 2013-05-14 | Alcatel Lucent | System and method for implementing periodic early discard in on-chip buffer memories of network elements |
CN102223675B (zh) * | 2011-06-08 | 2014-06-04 | 大唐移动通信设备有限公司 | 拥塞告警及处理方法、系统和设备 |
CN102957629B (zh) * | 2011-08-30 | 2015-07-08 | 华为技术有限公司 | 队列管理的方法和装置 |
CN102404206A (zh) * | 2011-11-04 | 2012-04-04 | 深圳市海思半导体有限公司 | 入队处理方法及设备 |
CN102595512B (zh) * | 2012-03-19 | 2014-08-27 | 福建星网锐捷网络有限公司 | 一种报文缓存方法及接入点 |
CN102789336B (zh) * | 2012-07-04 | 2015-12-16 | 广东威创视讯科技股份有限公司 | 多屏拼接触控方法和系统 |
CN103647726B (zh) * | 2013-12-11 | 2017-01-11 | 华为技术有限公司 | 一种报文调度方法及装置 |
EP2884707B1 (de) * | 2013-12-16 | 2016-04-27 | Alcatel Lucent | Verfahren zur Steuerung der Pufferung von Paketen in einem Kommunikationsnetzwerk |
CN106325758B (zh) * | 2015-06-17 | 2019-10-22 | 深圳市中兴微电子技术有限公司 | 一种队列存储空间管理方法及装置 |
CN106330760A (zh) * | 2015-06-30 | 2017-01-11 | 深圳市中兴微电子技术有限公司 | 一种缓存管理的方法和装置 |
CN105978821B (zh) * | 2016-07-21 | 2019-09-06 | 杭州迪普科技股份有限公司 | 网络拥塞避免的方法及装置 |
CN106598495A (zh) * | 2016-12-07 | 2017-04-26 | 深圳市深信服电子科技有限公司 | 一种混合存储服务质量的控制方法及控制装置 |
CN108234348B (zh) * | 2016-12-13 | 2020-09-25 | 深圳市中兴微电子技术有限公司 | 一种队列操作中的处理方法及装置 |
CN106789729B (zh) * | 2016-12-13 | 2020-01-21 | 华为技术有限公司 | 一种网络设备中的缓存管理方法及装置 |
CN109343790B (zh) * | 2018-08-06 | 2021-07-13 | 百富计算机技术(深圳)有限公司 | 一种基于nand flash的数据存储方法、终端设备及存储介质 |
-
2019
- 2019-02-22 CN CN201980092378.XA patent/CN113454957B/zh active Active
- 2019-02-22 WO PCT/CN2019/075935 patent/WO2020168563A1/zh unknown
- 2019-02-22 EP EP19915801.5A patent/EP3920475A4/de active Pending
- 2019-02-22 KR KR1020217030182A patent/KR20210130766A/ko active IP Right Grant
- 2019-02-22 JP JP2021549288A patent/JP7241194B2/ja active Active
-
2021
- 2021-08-20 US US17/408,057 patent/US11695710B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020071387A1 (en) * | 2000-12-11 | 2002-06-13 | Kabushiki Kaisha Toshiba | Inter-network relay unit and transfer scheduling method in the same |
US20050240745A1 (en) * | 2003-12-18 | 2005-10-27 | Sundar Iyer | High speed memory control and I/O processor system |
US20170134282A1 (en) * | 2015-11-10 | 2017-05-11 | Ciena Corporation | Per queue per service differentiation for dropping packets in weighted random early detection |
Non-Patent Citations (1)
Title |
---|
See also references of WO2020168563A1 * |
Also Published As
Publication number | Publication date |
---|---|
JP2022523195A (ja) | 2022-04-21 |
US11695710B2 (en) | 2023-07-04 |
WO2020168563A1 (zh) | 2020-08-27 |
CN113454957B (zh) | 2023-04-25 |
CN113454957A (zh) | 2021-09-28 |
KR20210130766A (ko) | 2021-11-01 |
EP3920475A1 (de) | 2021-12-08 |
JP7241194B2 (ja) | 2023-03-16 |
US20210392092A1 (en) | 2021-12-16 |
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Legal Events
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STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE |
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PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
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A4 | Supplementary search report drawn up and despatched |
Effective date: 20220119 |
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RIC1 | Information provided on ipc code assigned before grant |
Ipc: H04L 49/901 20220101ALI20220113BHEP Ipc: H04L 49/90 20220101ALI20220113BHEP Ipc: H04L 49/50 20220101ALI20220113BHEP Ipc: H04L 47/56 20220101ALI20220113BHEP Ipc: H04L 47/32 20220101ALI20220113BHEP Ipc: G06F 3/06 20060101AFI20220113BHEP |
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STAA | Information on the status of an ep patent application or granted ep patent |
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RIC1 | Information provided on ipc code assigned before grant |
Ipc: H04L 49/901 20220101ALI20240301BHEP Ipc: H04L 49/90 20220101ALI20240301BHEP Ipc: H04L 49/50 20220101ALI20240301BHEP Ipc: H04L 47/56 20220101ALI20240301BHEP Ipc: H04L 47/32 20220101ALI20240301BHEP Ipc: G06F 3/06 20060101AFI20240301BHEP |
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INTG | Intention to grant announced |
Effective date: 20240402 |