EP3893607B1 - Procédé d'adressage local précis des utilisateurs de bus dans un système de bus de données différentiel bifilaire et système de bus de données différentiel bifilaire - Google Patents
Procédé d'adressage local précis des utilisateurs de bus dans un système de bus de données différentiel bifilaire et système de bus de données différentiel bifilaire Download PDFInfo
- Publication number
- EP3893607B1 EP3893607B1 EP20185496.5A EP20185496A EP3893607B1 EP 3893607 B1 EP3893607 B1 EP 3893607B1 EP 20185496 A EP20185496 A EP 20185496A EP 3893607 B1 EP3893607 B1 EP 3893607B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- bus
- wire data
- data bus
- subscribers
- supply line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims description 77
- 230000003071 parasitic effect Effects 0.000 claims description 14
- 238000013507 mapping Methods 0.000 claims description 4
- 230000011664 signaling Effects 0.000 claims description 3
- 238000004891 communication Methods 0.000 description 18
- 230000002457 bidirectional effect Effects 0.000 description 6
- 238000005259 measurement Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 3
- 238000001514 detection method Methods 0.000 description 3
- 230000001419 dependent effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000004870 electrical engineering Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000012163 sequencing technique Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
- H05B47/10—Controlling the light source
- H05B47/175—Controlling the light source by remote control
- H05B47/18—Controlling the light source by remote control via data-bus transmission
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
- H05B47/10—Controlling the light source
- H05B47/175—Controlling the light source by remote control
- H05B47/198—Grouping of control procedures or address assignation to light sources
- H05B47/199—Commissioning of light sources
- H05B47/1995—Auto-commissioning
Definitions
- the present invention relates to the field of electrical engineering and electronics and relates to a method for location-specific automatic addressing of bus users in a differential two-wire data bus system and a differential two-wire data bus system.
- the proposed method and differential two-wire data bus system can be used, for example, to control intelligent LED chains in vehicles or in other technical facilities.
- An intelligent LED chain is a series of LEDs (light emitting diodes) that are each controlled by an LED driver circuit, i.e. an LED controller.
- An LED controller can control one or more LEDs as a participant in the LED chain.
- a central control unit in the LED chain makes it possible, for example, to control and set the emission intensity (trimming), color, etc. of individual LEDs or LED groups in the chain individually via the LED driver circuits.
- data e.g. B. can be easily sent from one participant to the next via a shift chain (daisy chain).
- a return channel from the last LED controller, which controls the last LED or LEDs in the chain, to the central control unit is required for a response. So in order to get the answer at the central control unit, the whole chain has to be pushed through one round.
- a participant can be addressed directly and report back an answer directly. Similarly, requests can be sent to all participants (broadcast). In order for these systems to work, each participant needs an address, which must be assigned to it depending on its location in the chain.
- WO 2018/114937 A2 discloses a concatenated two-wire differential data bus system and a method for initializing such a two-wire differential data bus.
- a method for addressing/sequencing at least one control component from a group of a plurality of control components linearly linked via a daisy-chain selection line is specified.
- the individual control components are each connected to their predecessors, with data being transmitted from one participant to the next and then via an additional return line back to a central control unit (daisy chain).
- the CA02717450C discloses a method for addressing devices (slaves) connected to a control unit (master).
- a coding is carried out by means of sent and received pulses of a communication processor, which makes it possible to determine the number of devices that are connected to the control unit.
- the devices are connected in series in a communication chain, with communication between the devices and the control unit being via a communication loop.
- the communication loop is closed via an end-of-line (EOL) connector that allows the responses of the devices to be sent back to the central control unit.
- EOL end-of-line
- An additional return line or address line is required to control the individual devices, which increases the system costs.
- Another disadvantage is that the number of connected devices is limited and the performance is therefore not sufficient for many applications, especially with regard to the bandwidth and the data rate to be transmitted, e.g. B. to be able to control long LED chains with just one control unit. Each participant in the communication chain receives data, which it evaluates and then forwards to the control unit, which means that the system works very slowly.
- EP 3 070 999 A1 discloses a system for controlling interconnected LED strips, the system comprising control modules, microcontrollers, electronic drivers and LED strips.
- the control modules and LED strips can be interconnected in different topologies that form a network infrastructure. Each LED on an LED strip can be addressed via this network infrastructure.
- Unidirectional communication requires a return channel to the master, which increases system costs. The disadvantage of this system is therefore the very high hardware complexity and the associated costs.
- the US 8,492,983 B1 discloses a method for addressing and controlling individual LEDs or groups of LEDs (LED units) interconnected by a serial data bus and controlled by data packets transmitted over the bus by a master controller.
- the data packets transmitted over the bus by the master controller contain an address field that identifies the LED unit for which the packet is intended.
- Each LED unit upon receipt of a packet, tests the address field to determine if it belongs to the set of one or more addresses to which the LED unit is authorized to reply. If so, the LED unit will respond to the command encoded in the packet.
- Each LED unit sends all packets to the next LED unit further away from the master controller.
- the LED units When packets are retransmitted, the LED units typically change the address field, so the address field changes at each node as the packet traverses the bus.
- the address at which the packet begins transmission on the bus is chosen by the master controller so that when the packet arrives at the intended LED unit, its address has been changed by the intermediate LED units to match with matches the set of addresses to which the intended LED unit responds.
- each LED unit can be addressed without having to pre-assign its address via switches or other means, since each LED unit's address is automatically determined by its position on the serial data bus. It is necessary for the disclosed method that the LEDs must be pre-programmed in such a way that they only react to a set of one or more addresses.
- Each LED unit evaluates the previously received data and then forwards it in the direction of the master controller. This makes the system very slow/sluggish.
- a method for addressing bus nodes of a serial, bidirectional, differential two-wire communication bus is known with a bus master, a serial, bidirectional, differential two-wire communication bus emanating from the bus master and with a plurality of addressable bus nodes which are connected to the serial, bidirectional, differential two-wire communication bus are connected, whereby the serial, bidirectional, differential, two-wire communication bus consists of a first single-wire bus and a second single-wire bus, and in the method each bus node of the bus nodes not yet addressed feeds an addressing current into at least one single-wire bus of the single-wire buses to identify it. All other bus nodes that have not yet been addressed also feed an addressing current into the addressing single-wire bus.
- All addressing currents flow through the two-wire serial, bidirectional, differential communication bus (DB) towards the bus master, with each bus node that has not yet been addressed detecting the current flowing through the addressing single-wire bus of the two-wire serial, bidirectional, differential communication bus and only that one unaddressed bus node that does not detect any current or only detects a current that is less than a predefinable first threshold value in terms of amount, is identified as a bus node that has not yet been addressed and the bus node identified in this way is assigned an address as a valid bus node address for the purpose of addressing.
- the aforementioned steps are carried out without the last bus node addressed in each case, until all bus nodes that have not yet been addressed have been addressed.
- the present invention is therefore based on the object of specifying a method for location-specific automatic addressing of bus users in a differential two-wire data bus system and a differential two-wire data bus system, with which location-specific automatic addressing of bus users or the detection of a physical sequence of the same can be carried out flexibly are interconnected in a chain via a differential bus system and each have only a single differential bus interface without requiring an additional address line and/or other interfaces and thus in particular avoiding the disadvantages of the prior art.
- the reference potential is ground or the reference potential is a second continuous voltage drop measured at the same time as the first voltage drop Voltage drop along the second single-wire data bus or along the second supply line.
- bus master repeats the method steps according to the invention until a valid bus node address has been assigned to all bus users.
- the bus master terminates the method for location-specific automatic addressing with a termination signal as soon as a valid bus node address has been assigned to all bus users.
- the bus users transmit a provisional address from the differential voltage value by means of a monotonous mapping of the differential voltage values to an available discrete address space and generate this when requested by the bus master the bus master.
- the method is carried out with a second addressing current that is higher than the first addressing current.
- bus users use a differential interface for communication with the bus master.
- the continuous voltage drop along the first single-wire data bus or along the first supply line is generated by parasitic resistances in the first single-wire data bus or in the first supply line.
- the continuous voltage drop along the second single-wire data bus or along the second supply line is advantageously generated by parasitic resistances in the second single-wire data bus or in the second supply line.
- the continuous voltage drop along the first single-wire data bus or along the first supply line is also advantageously compensated for by additionally introduced line resistances between the respective first terminals of two consecutive bus participants generated in the first single-wire data bus or in the first supply line.
- the continuous voltage drop along the second single-wire data bus or along the second supply line is generated by additionally introduced line resistances between the respective second terminals of two consecutive bus users in the second single-wire data bus or in the second supply line.
- the last 20% of the bus users are supplied via a physically narrower bus line.
- the differential two-wire data bus system is also advantageously a CAN bus.
- the bus users are LED driver circuits that control one or more LEDs.
- a differential two-wire data bus system for location-specific automatic addressing of bus users is specified, the bus users being arranged linearly along a two-wire data bus and each having a first connection with a first single-wire data bus of the two-wire data bus or with a first supply line and with a second connection a second single-wire data bus of the two-wire data bus which is connected to a second supply line and a bus master is arranged at the start of the two-wire data bus and a terminating resistor is arranged at least at the end of the two-wire data bus, the bus master and the terminating resistor terminating the first single-wire data bus and the second single-wire data bus, respectively connect to each other, wherein the bus participants have a differential interface via which each bus participant is connected to the bus master via a CAN bus to communicate, being parasitic e line resistances in the first and second single-wire data bus or the first and second supply line between the respective terminals of two consecutive bus participants are used to a continuous Measure the voltage drop along the first
- the method according to the invention it is possible for the first time to specify a method for the location-specific automatic addressing of bus users in a differential two-wire data bus system and a differential two-wire data bus system, with which location-specific automatic addressing of bus users or the detection of a physical sequence of the same can be flexibly carried out are interconnected in a chain via a differential bus system and each have only a single differential bus interface without requiring an additional address line and/or other interfaces.
- the bus participants are arranged linearly along a two-wire data bus of a two-wire data bus system and each have a first connection with a first single-wire data bus or a first supply line and a second connection with a second single-wire data bus of the two-wire data bus or a second supply line are connected.
- the order in which the first connections of the bus users are connected to the first single-wire data bus along the two-wire data bus from a bus master to a terminating resistor is the same as the order in which the second connections of the bus users are connected to the second single-wire data bus along the two-wire data bus from the bus master. Master towards termination resistance. The same applies to the connection to the first and second supply lines.
- a two-wire data bus system includes, among other things, a first single-wire data bus and a second single-wire data bus, with the first single-wire data bus being at a high (e.g. VDD) potential and the second single-wire data bus being at a low (e.g. GND) potential. potential may lie.
- the first supply line can be at a high (eg VDD) potential and the second supply line can be at a low (eg GND) potential.
- a bus master is arranged at the beginning of the two-wire data bus and a terminating resistor at least at the end of the two-wire data bus system, the bus master and the terminating resistor connecting the first single-wire data bus and the second single-wire data bus to one another.
- the method according to the invention has the following steps: In a first step, the bus master signals all bus participants (bus slaves) that auto-addressing is taking place, whereupon the bus participants set an auto-addressing mode, i.e. the auto-addressing is initialized in each bus user and the job for measuring the differential voltage described below is carried out by each bus user.
- the bus master signals all bus participants (bus slaves) that auto-addressing is taking place, whereupon the bus participants set an auto-addressing mode, i.e. the auto-addressing is initialized in each bus user and the job for measuring the differential voltage described below is carried out by each bus user.
- a first electrical addressing current is then fed into the first single-wire data bus (high potential, eg CAN high) or into the first supply line.
- a first continuous voltage drop is then measured along the first single-wire data bus or along the first supply line from the bus master to the terminating resistor. This first continuous voltage drop is generated by the parasitic resistances in the first single-wire data bus or in the first supply line up to the terminating resistor at the end of the single-wire data bus due to the addressing current.
- a terminating resistor is located at least at the end of the differential two-wire data bus, which is formed from the first and the second single-wire data bus.
- the bus master is located at the beginning of the differential two-wire data bus.
- the assignment of the beginning and the end of the two-wire data bus is linguistically chosen in such a way that it marks the beginning and the end of a linearly extending bus system, whereby it is crucial that the bus master initiates an addressing current in the two-wire data bus and the terminating resistor at the location located furthest from the bus master and completes the circuit back to the bus master.
- a differential voltage value is then recorded/determined locally at the location of the bus user by the respective bus user.
- the bus user measures the differential voltage between the potential at the first connection of the bus user, which is connected to the first single-wire data bus or the first supply line, and the reference potential.
- the reference potential can either be ground (GND) or the potential at the second connection of the bus user, which is connected to the second single-wire data bus or the second supply line. It is important to determine the differential voltage value, the size of which is a measure of the physical position or sequence of the respective bus participants in the bus system.
- This differential voltage value is transmitted to the bus master, with the differential voltage value being used to determine the local positioning of the bus users along the two-wire data bus.
- the differential voltage values are used as a temporary address in order to address the bus users and to assign them an address via the bus communication in a subsequent step.
- a respective bus node address is assigned by the bus master to the respective bus users.
- the inventive method differs significantly z.
- B. LIN auto-addressing method where only one participant can be addressed per measurement.
- the reference potential is ground (GND);
- the reference potential can also be a second continuous voltage drop along the second single-wire data bus or along the second supply line measured at the same time as the first voltage drop.
- Either a differential voltage value is determined from the first voltage drop along the first single-wire data bus relative to ground or relative to a second voltage drop along the second single-wire data bus, or the differential voltage value is determined from the first voltage drop along the first Supply line determined against ground or against a second voltage drop along the second supply line.
- the bus master it is also possible for the bus master to repeat the method described above until a valid bus node address has been assigned to all bus users. If a bus user has reported in a previous step and the bus master has not learned from another source that all bus users have received a valid bus node address, the bus master repeats the inventive method from the beginning. All bus users who have then already received a valid bus node address no longer take part in the further runs and remain silent until the bus master receives a termination signal.
- the bus master terminates the method with a termination signal as soon as a valid bus node address has been assigned to all bus users. From this moment on, all bus participants use the received and valid bus node address for the normal operation of the two-wire data bus system.
- the bus users generate a provisional address from the differential voltage value by means of a monotonous mapping of the differential voltage values to an available discrete address space and transmit this to the bus master when requested by the bus master.
- the mapping function is freely selectable.
- the bus master signals to all bus participants that they should transmit their differential voltage value, ergo the provisional address. If lower-ranking bus participants detect a bus collision when transmitting to the bus master, they interrupt the transmission. Therefore, the highest-ranking bus user with the highest-ranking, provisional address generated by the differential voltage measurement prevails.
- the bus master can issue a valid bus node address by signaling the validity.
- the address assigned by the bus master may differ from the provisional bus node address.
- the method described is carried out with a second addressing current which is higher than the first addressing current.
- a second addressing current which is higher than the first addressing current.
- the bus users use a differential interface for communication with the bus master.
- Most bus participants have a differential interface. With the method according to the invention, this interface alone can be used for addressing the bus users, without changes having to be made to the hardware.
- the continuous voltage drop along the first single-wire data bus or along the first supply line is generated by parasitic resistances in the first single-wire data bus or in the first supply line.
- the continuous voltage drop along the second single-wire data bus or along the second supply line is generated by parasitic resistances in the second single-wire data bus or in the second supply line.
- the parasitic line resistances between the individual bus participants generate different differential voltages, which differ depending on the distance between the bus participants and the bus master, so that a physical order of the bus participants in the chain/the linear two-wire data bus can be derived .
- the differential voltage values are determined at a fixed, defined point in time. This can prevent any deviations in the reference potentials (e.g. GND) from having a negative impact on the addressing.
- the continuous voltage drop along the first single-wire data bus or along the first Supply line generated by additionally introduced line resistances between the respective first connections of two consecutive bus users in the first single-wire data bus or in the first supply line.
- the continuous voltage drop along the second single-wire data bus or along the second supply line is generated by additionally introduced line resistances between the respective second connections of two consecutive bus users in the second single-wire data bus or in the second supply line.
- the differential voltage values which differ depending on the distance between the bus participants and the bus master, are artificially increased so that a physical order of the bus participants in the chain/the linear two-wire data bus can be safely derived from this leaves.
- the line resistances introduced can be of different magnitudes, i. H. have different resistance values.
- the differential two-wire data bus system is a CAN bus system or a FLEXRAY bus system.
- the use of the method according to the invention in these bus systems is advantageous because no additional lines are required, so that the system costs are low.
- the cost within the circuit is also low since all the required components are included in typical systems and thus little/no additional area is required.
- the bus users are LED driver circuits that control one or more LEDs.
- the method according to the invention enables LED chains to be addressed using the voltage drop in the supply lines of the LED driver circuits. This solution is independent of the selected bus system and does not require any additional components such as lines, pins, external components, etc. This means that fast bus systems without auto-addressing can also be used for this application/this method. You don't need an address line or pre-programming in order to be able to assign an address to the participants in the LED chain. The only requirement is bus communication.
- the object of the invention is also achieved by a differential two-wire data bus system for location-specific automatic addressing of bus users according to the independent claim.
- the bus participants are arranged linearly along a two-wire data bus and are each connected to a first connection to a first single-wire data bus of the two-wire data bus or to a first supply line and with a second connection to a second single-wire data bus of the two-wire data bus or to a second supply line and a Bus master is arranged at the beginning of the two-wire data bus and a terminating resistor is arranged at least at the end of the two-wire data bus, the bus master and the terminating resistor connecting the first single-wire data bus and the second single-wire data bus to one another, respectively.
- the bus participants have a differential interface via which each bus participant is connected to the bus master via a CAN bus so that they can communicate, with parasitic line resistances in the first and second single-wire data bus or the first and second supply line between the respective connections of two consecutive bus users to measure a continuous voltage drop along the first and second single-wire data bus or the first and second supply line, in order to use a differential voltage value generated on each bus user to determine the respective bus users with a valid bus node address through the Assign bus master.
- At least one additional line resistance is arranged between two first and/or two second connections of two consecutive bus users.
- an additional line resistance can be arranged between two first connections and/or two second connections of two consecutive bus users, regardless of the physical position of the two consecutive bus users along the first and second single-wire data bus.
- An additional line resistance can also be arranged between each first and/or second connection of all consecutive bus users. It is also possible only between the first and second terminals of the last, e.g. B. 20%, to arrange an additional line resistance in the chain/of the two-wire data bus.
- the figure 1 shows a two-wire data bus system 1 which comprises a two-wire data bus 2 which is formed from a first single-wire data bus 3 and a second single-wire data bus 4 .
- the bus users 5 are arranged linearly along the two-wire data bus 2 and are each connected to a first connection 15 to the first single-wire data bus 3 and to a second connection 16 to the second single-wire data bus 4 of the two-wire data bus 2.
- the order in which the first connections 15 of the bus users are connected to the first single-wire data bus 3 along the two-wire data bus 2 from a bus master 10 to a terminating resistor 11 is the same as the order in which the second connections 16 of the bus users 5 are connected to the second Single-wire data bus 4 along the two-wire data bus 2 from the bus master 10 to the terminating resistor 11.
- the first single-wire data bus 3 is at a high (e.g. VDD) potential and the second single-wire data bus 4 is at a low (e.g. GND) potential .
- a bus master 10 at the beginning of the two-wire data bus 2 and a Terminating resistor 11 are arranged at least at the end of the two-wire data bus 2, with the bus master 10 and the terminating resistor 11 connecting the first single-wire data bus 3 and the second single-wire data bus 4 to one another.
- the inside figure 1 The second terminating resistor R TL shown is irrelevant for the method according to the invention.
- the bus master 10 feeds an electrical addressing current into the first single-wire data bus 3 with its high-side driver 17 . Due to the parasitic resistors 12 in the first single-wire data bus 3, this addressing current generates a continuous voltage drop along the first single-wire data bus 3 up to the terminating resistor 11 at the end of the first single-wire data bus 3.
- the bus master 10 draws the electrical addressing current with its low-side driver 18 the second single-wire data bus 4. Due to the parasitic resistors 12 in the second single-wire data bus 4, this addressing current generates a continuous voltage drop along the second single-wire data bus 4 from the terminating resistor 11 at the end of the second single-wire data bus 4 to the bus master 10.
- a differential voltage value is detected locally at the location of the bus user 5 by the respective bus user 5 .
- the bus user 5 measures the differential voltage between the potential at its first terminal 15, which is connected to the first single-wire data bus 3, and a reference potential, e.g. B. the potential at its second terminal 16, which is connected to the second single-wire data bus 4.
- the differential voltage values measured in this way are used as a temporary address in order to address the bus users 5 and assign them the desired address via the bus communication. This addressing and addressing takes place sequentially from the highest-ranking bus participant 5 to the lowest-ranking bus participant 5 until all bus participants 5 have one have been assigned a bus node address. All bus users 5 can be addressed with a single voltage measurement.
- the method is repeated in a preferred exemplary embodiment with an increased addressing current in order to also be able to reliably assign an address to the bus participants 5 at the end of the chain/of the linear two-wire data bus system 1 .
- FIG. 3 shows an example LED string with a CAN bus as an embodiment that uses the method according to the invention.
- the bus participants 5 are LED controllers that control one or more LEDs.
- the LED controllers are arranged parallel to one another between the first CAN high bus as the first single-wire data bus 3 and the second CAN low bus as the second single-wire data bus 4 .
- the example includes 25 LED controllers, each driving four LEDs. With an addressing current of 40 mA, the voltage drop shown in FIG. 5a results with a 6V supply voltage for the individual LED controllers.
- FIG. 5b shows the generated digital values which result from the measured voltage values from the analog/digital converter used.
- the voltage drop is sufficient to enable addressing.
- the first LED controllers that are close to the bus master 10 are easily distinguishable.
- the method according to the invention is carried out in a second stage. This means that in a first stage a significantly lower first addressing current is used to address the LED controllers and in a second stage a high second addressing current, which is higher than the first addressing current, is used to address the remaining LED controllers in address the chain.
- the LED controllers that have already been addressed no longer generate any current load and thus keep the overall voltage drop low.
- the last 20% of the LED controller ie in the embodiment of the Figures 3 and 4 the last five LED controllers, to be provided with a narrower bus line in order to slightly increase the rise in the last area of the LED strand.
Landscapes
- Small-Scale Networks (AREA)
- Measurement Of Resistance Or Impedance (AREA)
- Dc Digital Transmission (AREA)
Claims (17)
- Procédé d'adressage automatique avec localisation précise de périphériques de bus dans un système de bus de données bifilaire (1) différentiel, les périphériques de bus (5) étant disposés linéairement le long d'un bus de données bifilaire (2) et respectivement reliés par une première borne (15) à un premier bus de données unifilaire (3) ou une première ligne d'alimentation (22) et par une deuxième borne (16) à un deuxième bus de données unifilaire (4) du bus de données bifilaire (2) ou une deuxième ligne d'alimentation (23) et un maître de bus (10) étant disposé au début du bus de données bifilaire (2) et une résistance de terminaison (11) au moins à l'extrémité du bus de données bifilaire (2), le maître de bus (10) et la résistance de terminaison (11) reliant respectivement l'un à l'autre le premier bus de données unifilaire (3) et le deuxième bus de données unifilaire (4), le procédé comprenant les étapes suivantes :- signalisation d'un mode d'adressage automatique par le maître de bus (10) aux périphériques de bus (5) qui règlent le mode d'adressage automatique ;- injection d'un premier courant d'adressage dans le premier bus de données unifilaire (3) ou la première ligne d'alimentation (22) ;- mesure d'une première chute de tension continuelle le long du premier bus de données unifilaire (3) ou le long de la première ligne d'alimentation (22) entre le maître de bus (10) et la résistance de terminaison (11) ;- acquisition d'une valeur de tension différentielle (19) résultant de la première chute de tension par rapport à un potentiel de référence localement à l'endroit du périphérique de bus (5) par le périphérique de bus respectif ; et- communication de la valeur de tension différentielle (19) au maître de bus (10), une position du périphérique de bus (5) localement le long du bus de données bifilaire (2) étant déterminée au moyen de la valeur de tension différentielle (19) et une attribution respectivement d'une adresse de nœud de bus au périphérique de bus (5) respectif étant effectuée par le maître de bus (10).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 1, le potentiel de référence étant la masse ou le potentiel de référence étant une deuxième chute de tension continuelle, mesurée simultanément avec la première chute de tension, le long du deuxième bus de données unifilaire (4) ou le long de la deuxième ligne d'alimentation (23).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 1, le maître de bus (10) répétant les étapes du procédé selon la revendication 1 jusqu'à ce qu'une adresse de nœud de bus valide soit attribuée à tous les périphériques de bus (5).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 3, le maître de bus (10) cessant le procédé d'adressage automatique avec localisation précise avec un signal de cessation dès qu'une adresse de nœud de bus valide a été attribuée à tous les périphériques de bus (5) .
- Procédé d'adressage automatique avec localisation précise de périphériques de bus selon la revendication 1, les périphériques de bus (5) générant, à partir de la valeur de tension différentielle (19), une adresse provisoire au moyen d'une représentation monotone des valeurs de tension différentielle sur un espace d'adresses discret disponible et communiquant celle-ci au maître de bus (10) après demande par le maître de bus (10) .
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon l'une des revendications précédentes, le procédé étant mis en œuvre avec un deuxième courant d'adressage qui est plus élevé que le premier courant d'adressage.
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 1, les périphériques de bus (5) utilisant une interface différentielle (9) pour la communication avec le maître de bus (10).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 1, la chute de tension continuelle le long du premier bus de données unifilaire (3) ou le long de la première ligne d'alimentation (22) étant générée par des résistances parasites (12) dans le premier bus de données unifilaire (3) ou dans la première ligne d'alimentation (22).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 2, la chute de tension continuelle le long du deuxième bus de données unifilaire (4) ou le long de la deuxième ligne d'alimentation (23) étant générée par des résistances parasites (12) dans le deuxième bus de données unifilaire (4) ou dans la deuxième ligne d'alimentation (23).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 1, la chute de tension continuelle le long du premier bus de données unifilaire (3) ou le long de la première ligne d'alimentation (22) étant générée par des résistances de ligne (13) supplémentaire introduites entre les premières bornes (15) respectives de deux périphériques de bus (5) successifs dans le premier bus de données unifilaire (3) ou dans la première ligne d'alimentation (22).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 2, la chute de tension continuelle le long du deuxième bus de données unifilaire (4) ou le long de la deuxième ligne d'alimentation (23) étant générée par des résistances de ligne (13) supplémentaire introduites entre les deuxièmes bornes (16) respectives de deux périphériques de bus (5) successifs dans le deuxième bus de données unifilaire (4) ou dans la deuxième ligne d'alimentation (23).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon l'une des revendications 10 ou 11, les résistances de ligne (13) supplémentaire introduites étant configurées avec des tailles différentes.
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 1, les derniers 20 % des périphériques de bus (5) étant alimentés par le biais d'une ligne de bus physiquement plus étroite.
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon l'une des revendications précédentes, le système de bus de données bifilaire différentiel étant un bus CAN (21).
- Procédé d'adressage automatique avec localisation précise de périphériques de bus (5) selon l'une des revendications précédentes, les périphériques de bus (5) étant des circuits de pilotage de LED qui commandent une ou plusieurs LED (6).
- Système de bus de données bifilaire (1) différentiel pour l'adressage automatique avec localisation précise de périphériques de bus (5), les périphériques de bus (5) étant disposés linéairement le long d'un bus de données bifilaire (2) et respectivement reliés par une première borne (15) à un premier bus de données unifilaire (3) du bus de données bifilaire (2) ou à une première ligne d'alimentation (22) et par une deuxième borne (16) à un deuxième bus de données unifilaire (4) du bus de données bifilaire (2) ou à une deuxième ligne d'alimentation (23) et un maître de bus (10) étant disposé au début du bus de données bifilaire (2) et une résistance de terminaison (11) étant disposée au moins à l'extrémité du bus de données bifilaire (2), le maître de bus (10) et la résistance de terminaison (11) reliant respectivement l'un à l'autre le premier bus de données unifilaire (3) et le deuxième bus de données unifilaire (4), les périphériques de bus (5) possédant une interface différentielle (9) par le biais de laquelle chaque périphérique de bus (5) est relié en communication avec le maître de bus (10) par le biais d'un bus CAN (21), des résistances de ligne parasites (12) étant utilisées dans le premier (3) et le deuxième (4) bus de données unifilaire ou la première (22) et la deuxième (23) ligne d'alimentation entre les bornes respectives de deux périphériques de bus (5) successifs afin de mesurer une chute de tension continuelle le long du premier (3) et du deuxième (4) bus de données unifilaire ou de la première (22) et de la deuxième (23) ligne d'alimentation et, à partir de celle-ci, au moyen d'une valeur de tension différentielle (19) générée à chaque périphérique de bus (5), attribuer aux périphériques de bus (5) respectifs une adresse de nœud de bus valide par le maître de bus (10) .
- Système de bus de données bifilaire (1) différentiel pour l'adressage automatique avec localisation précise de périphériques de bus (5) selon la revendication 16, au moins une résistance de ligne (13) supplémentaire étant disposée entre deux premières (15) et/ou deux deuxièmes (16) bornes de deux périphériques de bus (5) successifs.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102020109717.4A DE102020109717A1 (de) | 2020-04-07 | 2020-04-07 | Verfahren zur Autoadressierung eines bidirektionalen Zweidrahtbusses |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3893607A1 EP3893607A1 (fr) | 2021-10-13 |
EP3893607B1 true EP3893607B1 (fr) | 2022-06-22 |
Family
ID=71607791
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP20185496.5A Active EP3893607B1 (fr) | 2020-04-07 | 2020-07-13 | Procédé d'adressage local précis des utilisateurs de bus dans un système de bus de données différentiel bifilaire et système de bus de données différentiel bifilaire |
EP20185504.6A Active EP3893608B1 (fr) | 2020-04-07 | 2020-07-13 | Procédé d'étalonnage automatique applicatif du dispositif de mesure requis pour l'adressage automatique d'un système de bus différentiel, ainsi qu'amplificateurs de mesure associés |
EP21182457.8A Active EP3920667B1 (fr) | 2020-04-07 | 2020-07-13 | Procédé d'adressage avec précision automatique des abonnés de bus à étalonnage automatique applicatif dans un système différentiel can-bus |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP20185504.6A Active EP3893608B1 (fr) | 2020-04-07 | 2020-07-13 | Procédé d'étalonnage automatique applicatif du dispositif de mesure requis pour l'adressage automatique d'un système de bus différentiel, ainsi qu'amplificateurs de mesure associés |
EP21182457.8A Active EP3920667B1 (fr) | 2020-04-07 | 2020-07-13 | Procédé d'adressage avec précision automatique des abonnés de bus à étalonnage automatique applicatif dans un système différentiel can-bus |
Country Status (2)
Country | Link |
---|---|
EP (3) | EP3893607B1 (fr) |
DE (1) | DE102020109717A1 (fr) |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10349600B4 (de) * | 2002-10-25 | 2011-03-03 | Infineon Technologies Ag | Verfahren zur Überprüfung von Leitungsfehlern in einem Bussystem und Bussystem |
US8060658B2 (en) | 2008-03-06 | 2011-11-15 | Siemens Industry, Inc. | Auto addressing devices on a common power and communication bus structure and method therefor |
US8492983B1 (en) | 2010-05-11 | 2013-07-23 | Analog Technologies Corporation | System and method to address and control serially connected LEDs |
DE102010032760A1 (de) | 2010-07-29 | 2012-02-02 | E:Cue Control Gmbh | Steuervorrichtung zur Ansteuerung einer Leuchte und Leuchte |
AT514999B1 (de) | 2013-11-06 | 2015-11-15 | Tgw Mechanics Gmbh | Verfahren zum Adressieren/Reihen linear verketteter Steuerkomponenten einer Förderanlage |
CN104345176A (zh) * | 2014-11-19 | 2015-02-11 | 中北大学 | 一种自校准数字加速度传感器 |
EP3070999A1 (fr) | 2015-03-20 | 2016-09-21 | Université d'Aix-Marseille | Contrôle de bandes de del adressables pixelisées |
DE102015004455B3 (de) * | 2015-03-31 | 2016-03-24 | Elmos Semiconductor Aktiengesellschaft | Vorrichtung und Verfahren zur Unterdrückung von Common-Mode-Störungen in Zweidrahtbussen |
DE102016123400B3 (de) * | 2016-01-19 | 2017-04-06 | Elmos Semiconductor Aktiengesellschaft | Eindrahtlichtsteuerbus mit mehreren Pegeln |
DE102018104852A1 (de) | 2018-03-02 | 2019-09-05 | Elmos Semiconductor Aktiengesellschaft | Verfahren zur Ansteuerung elektrischer und/oder elektronischer Komponenten eines Kfz-Moduls und ein derartiges Kfz-Modul mit automatischer Moduladressierung mittels Bus-Shunt-Widerständen in einem differenziellen Bus |
DE102018110252A1 (de) * | 2018-04-27 | 2019-10-31 | Infineon Technologies Ag | Transceiver, System mit Transceivern und Signal |
-
2020
- 2020-04-07 DE DE102020109717.4A patent/DE102020109717A1/de active Pending
- 2020-07-13 EP EP20185496.5A patent/EP3893607B1/fr active Active
- 2020-07-13 EP EP20185504.6A patent/EP3893608B1/fr active Active
- 2020-07-13 EP EP21182457.8A patent/EP3920667B1/fr active Active
Also Published As
Publication number | Publication date |
---|---|
EP3893608A1 (fr) | 2021-10-13 |
EP3893608B1 (fr) | 2024-05-29 |
DE102020109717A1 (de) | 2021-10-07 |
EP3893607A1 (fr) | 2021-10-13 |
EP3920667A1 (fr) | 2021-12-08 |
EP3920667B1 (fr) | 2022-06-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1490772B1 (fr) | Procede d'adressage de dispositifs utilisateurs d'un systeme a bus au moyen de courants d'identification | |
EP3114801B1 (fr) | Station d'abonné pour un système de bus et procédé de réduction d'émissions liées à une ligne dans un système de bus | |
DE102017122365B3 (de) | Selbsttestfähiges Bussystem und Verwendung dieser Selbsttestfähigkeit zur Vergabe von Busknotenadressen | |
EP3493479B1 (fr) | Procédé d'alimentation de flux d'adressage au moyen des n uds de bus d'un système de bus de données série et n uds de bus pour un tel système de bus de données | |
EP3461068B1 (fr) | Procédé d'attribution d'adresses dans un système de bus de données série et noeuds de bus pour un tel système de bus de données série | |
EP1455278B1 (fr) | Méthode pour l'identification d'un dispositif électronique | |
DE10147512A1 (de) | Verfahren zur Adressierung der Teilnehmer eines Bussystems | |
EP3496341B1 (fr) | Procédé de commande d'un système de base de données série et noeuds de bus pour un tel système de base de données | |
DE102018104489A1 (de) | Selbsttestfähiges Bussystem und Verwendung dieser Selbsttestfähigkeit zur Vergabe von Busknotenadressen mit Mischverbaumöglichkeit | |
EP2542946A1 (fr) | Équipement de contrôle d'une armoire électrique | |
EP3219055B1 (fr) | Système de communication pour la commande de plusieurs participants dans un véhicule automobile, application du système de communication, ainsi que bus de données correspondant | |
DE202018006079U1 (de) | Busknoten der zur Ausführung eines Verfahrens zur Vergabe von logischen Busknotenadressen geeignet ist, das für beliebige Datenbus-Topologien geeignet ist | |
DE102018104865B3 (de) | Vorrichtung zur Ansteuerung elektrischer und/oder elektronischer Komponenten eines Kfz-Moduls und ein derartiges Kfz-Modul mit automatischer Moduladressierung mit Taktsynchronisation | |
EP1603282B1 (fr) | Procédé d'adressage des abonnés d'un système de bus | |
DE102018104873A1 (de) | Vorrichtung zur Ansteuerung elektrischer und/oder elektronischer Komponenten eines Kfz-Moduls und ein derartiges Kfz-Modul mit automatischer Moduladressierung über Powerline | |
EP3893607B1 (fr) | Procédé d'adressage local précis des utilisateurs de bus dans un système de bus de données différentiel bifilaire et système de bus de données différentiel bifilaire | |
EP4018600B1 (fr) | Procédé de reconnaissance de la position d'un abonné au bus | |
DE102018104852A1 (de) | Verfahren zur Ansteuerung elektrischer und/oder elektronischer Komponenten eines Kfz-Moduls und ein derartiges Kfz-Modul mit automatischer Moduladressierung mittels Bus-Shunt-Widerständen in einem differenziellen Bus | |
EP4018603B1 (fr) | Procédé de détection de la position d'au moins un abonné d'un bus | |
EP3626973B1 (fr) | Système à vide et procédé d'identification de modules électroniques dans un tel système à vide | |
DE102018104866B3 (de) | Vorrichtung zur Ansteuerung elektrischer und/oder elektronischer Komponenten eines Kfz-Moduls und ein derartiges Kfz-Modul mit automatischer Moduladressierung | |
WO2010048987A1 (fr) | Appareil pour application à lampe, procédé de communication entre les appareils | |
DE102015013442A1 (de) | Automatisches Ermitteln von Verbaupositionen elektrischer Fahrzeugkomponenten in einem Kraftfahrzeug | |
DE102018104862A1 (de) | Vorrichtung zur Ansteuerung elektrischer und/oder elektronischer Komponenten eines Kfz-Moduls und ein derartiges Kfz-Modul mit automatischer Moduladressierung und Bus-Shunt-Überbrückungsschaltern | |
DE102018104872A1 (de) | Verfahren zur Ansteuerung elektrischer und/oder elektronischer Komponenten eines Kfz-Moduls und ein derartiges Kfz-Modul mit automatischer Moduladressierung über Powerline |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
|
17P | Request for examination filed |
Effective date: 20200717 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: GRANT OF PATENT IS INTENDED |
|
INTG | Intention to grant announced |
Effective date: 20220216 |
|
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE PATENT HAS BEEN GRANTED |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: FG4D Free format text: NOT ENGLISH |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: EP |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R096 Ref document number: 502020001258 Country of ref document: DE |
|
REG | Reference to a national code |
Ref country code: AT Ref legal event code: REF Ref document number: 1500653 Country of ref document: AT Kind code of ref document: T Effective date: 20220715 |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: FG4D Free format text: LANGUAGE OF EP DOCUMENT: GERMAN |
|
REG | Reference to a national code |
Ref country code: LT Ref legal event code: MG9D |
|
REG | Reference to a national code |
Ref country code: NL Ref legal event code: MP Effective date: 20220622 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: NO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220922 Ref country code: LT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: HR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: GR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220923 Ref country code: FI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: BG Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220922 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: RS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: LV Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SM Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: SK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: RO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: PT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20221024 Ref country code: ES Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: EE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: CZ Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: PL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: IS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20221022 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R097 Ref document number: 502020001258 Country of ref document: DE |
|
REG | Reference to a national code |
Ref country code: BE Ref legal event code: MM Effective date: 20220731 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: MC Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: AL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LU Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20220713 Ref country code: DK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
26N | No opposition filed |
Effective date: 20230323 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: BE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20220731 |
|
P01 | Opt-out of the competence of the unified patent court (upc) registered |
Effective date: 20230530 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20220713 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20230731 Year of fee payment: 4 Ref country code: DE Payment date: 20230726 Year of fee payment: 4 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PL |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: MK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: CY Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20220622 Ref country code: CH Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20230731 |