EP3662515A1 - Josephson junctions for improved qubits - Google Patents
Josephson junctions for improved qubitsInfo
- Publication number
- EP3662515A1 EP3662515A1 EP17808074.3A EP17808074A EP3662515A1 EP 3662515 A1 EP3662515 A1 EP 3662515A1 EP 17808074 A EP17808074 A EP 17808074A EP 3662515 A1 EP3662515 A1 EP 3662515A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- superconducting
- superconductor
- qubit
- metal
- josephson junction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/44—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using super-conductive elements, e.g. cryotron
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
- H03K19/1952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with electro-magnetic coupling of the control current
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/01—Manufacture or treatment
- H10N60/0912—Manufacture or treatment of Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/10—Junction-based devices
- H10N60/12—Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/805—Constructional details for Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
- H10N60/81—Containers; Mountings
- H10N60/815—Containers; Mountings for Josephson-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N69/00—Integrated devices, or assemblies of multiple devices, comprising at least one superconducting element covered by group H10N60/00
Definitions
- Embodiments of the present invention are directed to a superconducting qubit.
- a non-limiting example of the superconducting qubit includes a Josephson junction including a first superconductor and a second superconductor formed on a non- superconducting metal, and a capacitor in parallel with the Josephson junction.
- Embodiments of the present invention are directed to method of fabricating a superconducting qubit.
- a non-limiting example of the method includes providing a Josephson junction, the Josephson junction including a first superconductor and a second superconductor formed on a non-superconducting metal, and coupling a capacitor in parallel with the Josephson junction.
- Embodiments of the present invention are directed to a method of forming a microwave device.
- a non-limiting example of the method includes providing a superconducting qubit, the superconducting qubit including a Josephson junction having a first superconductor, a second superconductor, and a non-superconducting metal, and coupling a readout resonator to the superconducting qubit.
- FIG. 2 depicts a cross-sectional view of FIG. 1 according to embodiments of the present invention
- FIG. 3 depicts a top view of fabricating a superconducting qubit according to embodiments of the present invention
- FIG. 9 depicts a top view of fabricating the superconducting qubit according to embodiments of the present invention.
- FIG. 10 depicts a cross-sectional view of FIG. 9 according to embodiments of the present invention.
- FIG. 11 depicts a top view of fabricating a superconducting qubit according to embodiments of the present invention.
- FIG. 12 depicts a cross-sectional view of FIG. 1 1 according to embodiments of the present invention.
- FIG. 13 depicts a top view of fabricating a superconducting qubit according to embodiments of the present invention.
- FIG. 17 depicts a flow chart of a method of fabricating a superconducting qubit according to embodiments of the present invention.
- FIG. 18 depicts a flow chart of forming a microwave device according to embodiments of the present invention.
- the normal metal is not superconducting metal, which means the normal metal (non-superconducting metal) does not become superconducting at low temperatures (such as at or below 9 Kelvin (K), 4K, etc.).
- the normal metal is utilized as the tunneling metal in place of the dielectric material such as an oxide layer.
- Nominally identical superconducting qubits having Josephson junctions made with superconducting normal metal superconducting junctions have a smaller spread of critical current I c (which means the critical current I c is about the same (i.e., tightly distributed)) than for nominally identical superconducting qubits having Josephson junctions made with superconducting insulator superconducting junctions.
- FIGS. 1 -8 depict fabrication of a superconducting qubit 100 according to embodiments of the present invention.
- FIG. 1 depicts a top view of fabricating the superconducting qubit 100 according to embodiments of the present invention.
- FIG. 2 depicts a cross-sectional view of FIG. 1 according to embodiments of the present invention.
- Fabrication of superconducting qubit 100 uses a contacts first process, in which the contacts (i.e., superconducting electrodes) are deposited before the tunnel barrier material which is a non-superconducting material.
- a superconducting material 102 is formed on top of a substrate 202.
- Non- limiting examples of the superconducting material 102 include material such as niobium (Nb), aluminum (Al), titanium nitride (TiN), and other suitable superconductors.
- Non-limiting examples of suitable materials for the substrate 202 include Si (silicon), strained Si, SiC (silicon carbide), Ge (germanium), SiGe (silicon germanium), SiGeC (silicon-germanium-carbon), Si alloys, Ge alloys, III-V materials (e.g., GaAs (gallium arsenide), InAs (indium arsenide), InP (indium phosphide), or aluminum arsenide (AlAs)), II- VI materials (e.g., CdSe (cadmium selenide), CdS (cadmium sulfide), CdTe (cadmium telluride), ZnO (zinc oxide), ZnSe (zinc selenide), ZnS (zinc sulfide), or ZnTe (zinc telluride)), or any combination thereof.
- III-V materials e.g., GaAs (gallium arsenide), InAs (indium arsenide
- III-V materials can include at least one "III element,” such as aluminum (Al), boron (B), gallium (Ga), indium (In), and at least one "V element,” such as nitrogen (N), phosphorous (P), arsenic (As), antimony (Sb).
- III element such as aluminum (Al), boron (B), gallium (Ga), indium (In)
- V element such as nitrogen (N), phosphorous (P), arsenic (As), antimony (Sb).
- FIG. 3 depicts a top view of fabricating the superconducting qubit 100 according to embodiments of the present invention.
- FIG. 4 depicts a cross-sectional view of FIG. 3 according to embodiments of the present invention.
- the superconducting material 102 of the superconducting qubit 100 is patterned.
- each element associated with the superconducting qubit 100 is not shown so as not to obscure the figure, the fabrication process patterns readout resonators, ground plane, capacitors, and/or junction contacts with a single-step lithography and subsequent etching.
- lithography can be performed to deposit and pattern a resist layer (which can be positive photoresist or negative photoresist) in the desired pattern on top of
- the etching of the superconducting material 102 can be accomplished with Cb or BCb etchants during reactive ion etching (RIE). Etch of the TiN can also be accomplished with a wet-etch such as "Standard Clean 1 " (NH4OH + H2O2).
- RIE reactive ion etching
- Etch of the TiN can also be accomplished with a wet-etch such as "Standard Clean 1 " (NH4OH + H2O2).
- the patterning of the superconducting material 102 results in a space 302 between superconducting electrodes 304A and 304B.
- the space 302 is in preparation for depositing the non-superconducting material (i.e., normal metal).
- the distance of the space 302 i.e., gap
- the distance of the space 302 can range from about 0.1 -10 microns ( ⁇ ).
- capacitor 310 CI and capacitor 312 C2 are the shunt capacitor for the superconducting qubit 100.
- both capacitors 310 CI and 312 C2 can be utilized.
- only one of the capacitors 310 CI or 312 C2 can be utilized such that only one capacitor is patterned.
- FIG. 5 depicts a top view of fabricating the superconducting qubit 100 according to embodiments of the present invention.
- FIG. 6 depicts a cross-sectional view of FIG. 5 according to embodiments of the present invention.
- a non- superconducting metal 502 is deposited on top of the superconducting material 102 and the substrate 202.
- the non-superconducting metal 502 is deposited in the space 302 to become the tunnel barrier.
- the surface of the superconducting qubit 100 can be cleaned in-situ and then metal deposition of the non-superconducting metal 502 is performed.
- the non-superconducting metal 502 can be copper (Cu), platinum (Pt), etc.
- the non-superconducting metal 502 is patterned to be only in the junction region, thereby forming a Josephson junction 702.
- the junction region is between the two superconducting electrodes 304A and 304B.
- the Josephson junction 702 is formed of the superconducting electrode 304A, the non-superconducting metal 502, and the superconducting electrode 304B.
- a portion of the non-superconducting metal 502 may or may not remain on top of the superconducting electrodes 304A and 304B.
- the non- superconducting metal 502 is removed from other parts of the substrate 202 and the superconducting metal 102.
- lithography is performed (e.g., a photoresist can be deposited and patterned) and the tunneling metal is etched selectively to superconducting metal 102 and silicon (e.g., the substrate 202) in accordance with the pattern formed using lithography. Therefore, the desired part of the non-superconducting metal 502 is removed while leaving (or not etching) the superconducting metal 102 and silicon (e.g., the substrate 202).
- Cu as the non-superconducting metal 502 can be etched selectively to TiN (as the superconducting metal 102) using a number of commercial etchants.
- Example commercial etchants can include a chromium etchant CR-7 by Cyantek Corporation (merged with KMG Electronic Chemicals), an aluminum etchant Etch A from Transene Company, Inc, or a copper etchant from Transene Company, Inc.
- critical current L can flow from the superconducting electrode 304A, into the non- superconducting metal 502, tunnel through the non-superconducting metal 502 in the junction region, and back into the superconducting electrode 304B.
- nominally identical superconducting qubits 100 can be formed with the same or nearly the same value for their respective critical currents I c , thereby having a smaller spread of values for their critical currents I c than critical currents I c for nominally identical state-of- the-art qubits with superconductor insulator superconductor Josephson junctions.
- FIGS. 9-14 depict fabrication of a superconducting qubit 900 according to embodiments of the present invention.
- FIG. 9 depicts a top view of fabricating the superconducting qubit 900 according to embodiments of the present invention.
- FIG. 10 depicts a cross-sectional view of FIG. 9 according to embodiments of the present invention.
- Fabrication of the superconducting qubit 900 uses a bilayer process, in which tunnel barrier material which is a non-superconducting material is deposited before/below the contacts (i.e., superconducting electrodes).
- the non-superconducting metal 502 is deposited on top of the substrate 202.
- the superconducting material 102 is deposited on top of non-superconducting metal 502.
- the non-superconducting metal 502 can be copper (Cu), platinum (Pt), etc.
- Other examples of other suitable tunneling non-superconducting metal 502 can include Au, Ag, Pd, etc.
- Non-limiting examples of the superconducting material 102 include material such as niobium (Nb), aluminum (Al), titanium nitride (TiN), and other suitable superconductors.
- FIG. 1 1 depicts a top view of fabricating the superconducting qubit 100 according to embodiments of the present invention.
- FIG. 1 1 depicts a top view of fabricating the superconducting qubit 100 according to embodiments of the present invention.
- the patterning still leaves a shorted junction, and the junction will be subsequently patterned.
- the junction can be formed at this time. It is noted that this is just an example sequence of patterning for some embodiments of the invention. In other embodiments of the invention, it might be beneficial to only form the junction at some later point in time since the Josephson junction will be protected until final fabrication.
- FIG. 13 depicts a top view of fabricating the superconducting qubit 900 according to embodiments of the present invention.
- FIG. 14 depicts a cross-sectional view of FIG. 13 according to embodiments of the present invention.
- the superconducting metal 102 is patterned in the junction region to form a gap 1402 and to form superconducting electrodes 304A and 304B, thereby forming a Josephson junction 1302.
- the junction region is between but below the two
- the Josephson junction 1302 is formed of the superconducting electrode 304A, the below non-superconducting metal 502, and the superconducting electrode 304B.
- lithography is performed (e.g., using a photoresist) and reactive ion etching is performed to selectively etch the superconductor material 102 and not the tunneling metal beneath (i.e., the non-superconducting metal 502).
- TiN superconductor material 102
- Cu non-superconducting metal 502
- etchants such as DuPontTM CuSolveTM EKCTM 575.
- the height H2 or thickness of the non-superconducting metal 502 can range from about 10-1000 nm, preferably (but not a necessity) 200 nm.
- critical superconducting current I c at superconducting temperatures in FIG. 14 critical current can flow from the superconducting electrode 304A, down to the non- superconducting metal 502 below, tunnel through the non-superconducting metal 502 in the junction region, and back up into the superconducting electrode 304B.
- the critical current travels below the gap 1402 in the non- superconducting metal 502 underneath.
- the portions of the non-superconducting metal 502 underneath the edges of the superconducting electrodes 304A and 304B closest to the gap 1402 act as the tunnel barrier along with the non-superconducting metal 502 underneath the gap 1402.
- quantum computing employs nonlinear superconducting devices (i.e., qubits) to manipulate and store quantum information, and resonators (e.g., as a two-dimensional (2D) planar waveguide or as a three-dimensional (3D) microwave cavity) to read out and/or facilitate interaction among qubits.
- resonators e.g., as a two-dimensional (2D) planar waveguide or as a three-dimensional (3D) microwave cavity
- each superconducting qubit include one or more Josephson junctions shunted by capacitors in parallel with the junctions.
- the qubits are capacitively coupled to 2D or 3D microwave cavities.
- the electromagnetic energy associated with the qubit is stored in the Josephson junctions and in the capacitive and inductive elements forming the qubit.
- the microwave device 1500 includes the qubit 100 or 900 capacitively coupled to the readout resonator 1505 by coupling capacitors 1520A and 1520B.
- the readout resonator 1505 can be representative of a 2D planar waveguide or a 3D microwave cavity.
- the readout resonator 1505 is capacitively coupled to a port 1550 by resonator coupling capacitor 1525.
- FIG. 16 depicts a flow chart 1600 of a method of fabricating a superconducting qubit 900 according to embodiments of the present invention.
- a flow chart 1600 of a method of fabricating a superconducting qubit 900 according to embodiments of the present invention.
- Josephson junction 1302 which includes a first superconductor 304A and a second superconductor 304B formed on a non-superconducting metal 502.
- a shunting capacitor e.g., capacitor CI 310, capacitor C2 312, or both capacitors CI and C2
- the first superconductor 304A and the second superconductor 304B are separated from one another.
- the first superconductor and the second superconductor have a space (e.g., gap 1402) separating one from another.
- the space (gap 1402) is about 0.1-10 ⁇ .
- the non-superconducting metal is formed on a semiconductor.
- the non- superconducting metal is copper.
- the non-superconducting metal is platinum.
- FIG. 17 depicts a flow chart 1700 of a method of fabricating a superconducting qubit 100 according to embodiments of the present invention.
- a flow chart 1700 of a method of fabricating a superconducting qubit 100 according to embodiments of the present invention.
- Josephson junction 702 is provided which includes a non-superconducting metal 502 formed between a first superconductor 304A and a second superconductor 304B.
- a shunting capacitor e.g., capacitor CI 310, capacitor C2 312, or both capacitors CI and C2 is coupled in parallel with the Josephson junction 702.
- the non-superconducting metal 502 is formed on top a part of both the first superconductor 304A and the second superconductor 304B.
- the non-superconducting metal 502, the first superconductor 304A, and the second superconductor 304B are each formed on a portion of a substrate 202.
- the first superconductor 304A and the second superconductor 304B are separated from one another by a gap 302. The distance of the gap 302 can range from about 0.1-10 ⁇ .
- the non-superconducting metal is formed on silicon.
- the non-superconducting metal is copper.
- the non-superconducting metal is platinum.
- FIG. 18 depicts a flow chart 1800 of a method of forming a microwave device 1500 according to embodiments of the present invention.
- a flow chart 1800 of a method of forming a microwave device 1500 according to embodiments of the present invention.
- superconducting qubit 100 or 900 is provided in which the superconducting qubit 100, 900 includes a Josephson junction 702, 1302 having a first superconductor 304A, a second superconductor 304B, and a non-superconducting metal 502.
- a readout resonator 1505 is coupled to the superconducting qubit 100, 900.
- circuit elements of the circuits 100, 702, 1500 can be made of
- the respective resonators and transmission/feed/pump lines are made of superconducting materials.
- superconducting materials at low temperatures typically ranging from 0.1 to 20 kelvin (K)
- K kelvin
- the proximity effect junctions are made of superconducting material
- the tunneling region is made of a non-superconducting metal.
- the capacitors can be made of superconducting material separated by vacuum as opposed to (typically lossy) dielectric.
- the transmission lines (i.e., wires) connecting the various elements are made of a superconducting material.
- a coupling of entities can refer to either a direct or an indirect coupling
- a positional relationship between entities can be a direct or indirect positional relationship.
- references in the present description to forming layer “A" over layer “B” include situations in which one or more intermediate layers (e.g., layer “C") is between layer “A” and layer “B” as long as the relevant characteristics and functionalities of layer “A” and layer “B” are not substantially changed by the intermediate layer(s).
- references in the specification to "one embodiment,” “an embodiment,” “an example embodiment,” etc., indicate that the embodiment described can include a particular feature, structure, or characteristic, but every embodiment may or may not include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described.
- “overlying,” “atop,” “on top,” “positioned on” or “positioned atop” mean that a first element, such as a first structure, is present on a second element, such as a second structure, wherein intervening elements such as an interface structure can be present between the first element and the second element.
- the term "direct contact” means that a first element, such as a first structure, and a second element, such as a second structure, are connected without any intermediary conducting, insulating or semiconductor layers at the interface of the two elements.
- Deposition is any process that grows, coats, or otherwise transfers a material onto the wafer.
- Available technologies include physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE) and more recently, atomic layer deposition (ALD) among others.
- Removal/etching is any process that removes material from the wafer. Examples include etch processes (either wet or dry), and chemical-mechanical planarization (CMP), and the like.
- Semiconductor doping is the modification of electrical properties by doping, for example, transistor sources and drains, generally by diffusion and/or by ion implantation. These doping processes are followed by furnace annealing or by rapid thermal annealing (RTA). Annealing serves to activate the implanted dopants. Films of both conductors (e.g., poly-silicon, aluminum, copper, etc.) and insulators (e.g., various forms of silicon dioxide, silicon nitride, etc.) are used to connect and isolate transistors and their components. Selective doping of various regions of the semiconductor substrate allows the conductivity of the substrate to be changed with the application of voltage.
- RTA rapid thermal annealing
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US15/669,139 US10380494B2 (en) | 2017-08-04 | 2017-08-04 | Josephson junctions for improved qubits |
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