EP3408737A4 - Processor with reconfigurable algorithmic pipelined core and algorithmic matching pipelined compiler - Google Patents

Processor with reconfigurable algorithmic pipelined core and algorithmic matching pipelined compiler Download PDF

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Publication number
EP3408737A4
EP3408737A4 EP17744897.4A EP17744897A EP3408737A4 EP 3408737 A4 EP3408737 A4 EP 3408737A4 EP 17744897 A EP17744897 A EP 17744897A EP 3408737 A4 EP3408737 A4 EP 3408737A4
Authority
EP
European Patent Office
Prior art keywords
algorithmic
pipelined
processor
compiler
reconfigurable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP17744897.4A
Other languages
German (de)
French (fr)
Other versions
EP3408737A1 (en
Inventor
Robert Catiller
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Icat LLC
Original Assignee
Icat LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Icat LLC filed Critical Icat LLC
Publication of EP3408737A1 publication Critical patent/EP3408737A1/en
Publication of EP3408737A4 publication Critical patent/EP3408737A4/en
Pending legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4022Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G06F15/7885Runtime interface, e.g. data exchange, runtime control
    • G06F15/7889Reconfigurable logic implemented as a co-processor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/32Circuit design at the digital level
    • G06F30/33Design verification, e.g. functional simulation or model checking
    • G06F30/3308Design verification, e.g. functional simulation or model checking using simulation
    • G06F30/331Design verification, e.g. functional simulation or model checking using simulation with hardware acceleration, e.g. by using field programmable gate array [FPGA] or emulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/41Compilation
    • G06F8/44Encoding
    • G06F8/447Target code generation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Geometry (AREA)
  • Evolutionary Computation (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Advance Control (AREA)
  • Logic Circuits (AREA)
  • Stored Programmes (AREA)
  • Devices For Executing Special Programs (AREA)
  • Microcomputers (AREA)
EP17744897.4A 2016-01-26 2017-01-26 Processor with reconfigurable algorithmic pipelined core and algorithmic matching pipelined compiler Pending EP3408737A4 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201662287265P 2016-01-26 2016-01-26
PCT/US2017/015143 WO2017132385A1 (en) 2016-01-26 2017-01-26 Processor with reconfigurable algorithmic pipelined core and algorithmic matching pipelined compiler

Publications (2)

Publication Number Publication Date
EP3408737A1 EP3408737A1 (en) 2018-12-05
EP3408737A4 true EP3408737A4 (en) 2019-09-11

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP17744897.4A Pending EP3408737A4 (en) 2016-01-26 2017-01-26 Processor with reconfigurable algorithmic pipelined core and algorithmic matching pipelined compiler

Country Status (17)

Country Link
US (3) US20170212739A1 (en)
EP (1) EP3408737A4 (en)
JP (1) JP7015249B2 (en)
KR (1) KR20180132044A (en)
CN (1) CN108885543A (en)
AU (1) AU2017211781B2 (en)
BR (1) BR112018015276A2 (en)
CA (1) CA3012781C (en)
CL (1) CL2018002025A1 (en)
CO (1) CO2018008835A2 (en)
IL (1) IL279302B2 (en)
MX (1) MX2018009255A (en)
MY (1) MY191841A (en)
PH (1) PH12018501591A1 (en)
RU (1) RU2018130817A (en)
SG (1) SG11201806395SA (en)
WO (1) WO2017132385A1 (en)

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JP7123676B2 (en) * 2018-07-20 2022-08-23 オムロンヘルスケア株式会社 BIOLOGICAL DATA MEASUREMENT SYSTEM AND BIOLOGICAL DATA MEASUREMENT METHOD
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US20220167863A1 (en) * 2019-03-27 2022-06-02 Nec Corporation Blood volume pulse signal detection apparatus, blood volume pulse signal detection apparatus method, and computer-readable storage medium
US11080227B2 (en) * 2019-08-08 2021-08-03 SambaNova Systems, Inc. Compiler flow logic for reconfigurable architectures
US20210076985A1 (en) * 2019-09-13 2021-03-18 DePuy Synthes Products, Inc. Feature-based joint range of motion capturing system and related methods
CN113222126B (en) * 2020-01-21 2022-01-28 上海商汤智能科技有限公司 Data processing device and artificial intelligence chip
CN111444159B (en) * 2020-03-03 2024-05-03 中国平安人寿保险股份有限公司 Refined data processing method, device, electronic equipment and storage medium
KR20210151525A (en) * 2020-06-05 2021-12-14 삼성전자주식회사 Apparatus and method for estimating bio-information
US11809908B2 (en) 2020-07-07 2023-11-07 SambaNova Systems, Inc. Runtime virtualization of reconfigurable data flow resources
CN111813526A (en) * 2020-07-10 2020-10-23 深圳致星科技有限公司 Heterogeneous processing system, processor and task processing method for federal learning
US20220047165A1 (en) * 2020-08-12 2022-02-17 Welch Allyn, Inc. Dermal image capture
US11782729B2 (en) 2020-08-18 2023-10-10 SambaNova Systems, Inc. Runtime patching of configuration files
WO2022087032A1 (en) * 2020-10-19 2022-04-28 Woundmatrix, Inc. Wound measurement
US20220233093A1 (en) * 2021-01-22 2022-07-28 AsthmaTek, Inc. Systems and methods to provide a physician interface that enables a physician to assess asthma of a subject and provide therapeutic feedback
US12051492B2 (en) 2021-01-29 2024-07-30 AsthmaTek, Inc. Systems and methods to determine a therapy regimen to treat asthma of a subject
TWI768818B (en) * 2021-04-08 2022-06-21 緯創資通股份有限公司 Hybrid body temperature measurement system and method thereof
EP4105827B1 (en) * 2021-06-14 2024-03-13 Tata Consultancy Services Limited Method and system for personalized eye blink detection
CN113703843B (en) * 2021-09-24 2024-04-12 中国人民解放军军事科学院军事医学研究院 Register data processing method, device and memory
CN117311247B (en) * 2023-11-30 2024-03-26 山东盛泰矿业科技有限公司 Control device for underground mining
CN118276905B (en) * 2024-06-03 2024-10-01 江苏元信网安科技有限公司 ICAP-based ZYNQ platform reconstruction method and reconstruction system

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Also Published As

Publication number Publication date
AU2017211781A1 (en) 2018-09-13
CL2018002025A1 (en) 2019-02-08
RU2018130817A (en) 2020-02-27
US20170212739A1 (en) 2017-07-27
IL279302B2 (en) 2023-06-01
CO2018008835A2 (en) 2018-11-13
PH12018501591A1 (en) 2019-04-08
US20180246834A1 (en) 2018-08-30
US10970245B2 (en) 2021-04-06
JP2019506695A (en) 2019-03-07
CA3012781A1 (en) 2017-08-03
RU2018130817A3 (en) 2020-04-16
WO2017132385A1 (en) 2017-08-03
US10515041B2 (en) 2019-12-24
AU2017211781B2 (en) 2021-04-22
BR112018015276A2 (en) 2018-12-18
MX2018009255A (en) 2019-03-18
US20200142851A1 (en) 2020-05-07
JP7015249B2 (en) 2022-02-02
CN108885543A (en) 2018-11-23
KR20180132044A (en) 2018-12-11
MY191841A (en) 2022-07-18
SG11201806395SA (en) 2018-08-30
IL279302A (en) 2021-01-31
CA3012781C (en) 2022-08-30
EP3408737A1 (en) 2018-12-05

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