EP3381119B1 - Method for controlling the current of an inductive load - Google Patents

Description

The invention relates to a method for current regulation of a load current of an inductive load according to the preamble of patent claim 1 and an electronic circuit arrangement according to the preamble of patent claim 9.

A large number of electrical or electronic devices with inductive loads, e.g. Valves, electric motors or relays, controlled by means of driver stages, usually switching transistors, with pulse width modulation. The PWM control can thus be used, for example, to operate an electric motor of a starter to start an internal combustion engine or to build up pressure in a brake system. In conventional starting methods, the vehicle battery must provide a comparatively high inrush current, which can lead to a drop in the terminal voltage of the vehicle battery.

The generic problem solves this problem DE 10 2010 063 744 A1 in that a current limiting resistor is connected in series with the inductive load in order to limit the current during the starting phase by means of a FET transistor, so that a base current flows when the FET transistor is in the conductive state. A series circuit comprising a further PWM-controlled FET transistor and a further resistor is connected in parallel with the series circuit comprising the FET transistor and the current limiting resistor. The PWM control of this further FET transistor regulates the current through the load, the path being short-circuited with the current limiting resistor and the maximum current being limited by the second resistor in the conductive state of this further FET transistor. This procedure is disadvantageous when operating the inductive load generates high power loss as a result of the resistors provided to limit the current.

This disadvantage is due to the generic DE 10 2014 208 066.5 overcome, which describes a method for pulse-width modulated current control of a load current of an inductive load, in which a current actual value is determined, a control difference is determined from the current actual value and a current setpoint, the control difference is determined as an input value of a control algorithm for calculating a pulse duty factor of the pulse width modulation, and one Circuit breaker connected in series with the inductive load is controlled with the determined duty cycle. The inductive load is led into an operating mode via a start mode, in that the control algorithm is used to carry out the start mode by using a ramp function to determine the current setpoints, associated duty cycles and a current target value and to regulate the load current up to the current target value in accordance with the ramp function, and to carry out the the operating mode following the start mode, the control algorithm determines the pulse duty factors on the basis of an upper and a lower current setpoint, such that the load current between the upper and lower current setpoint is regulated on the basis of the current target value. However, due to the ramped rise and the associated time delay, this procedure cannot be applied to all applications.

The object of the invention is therefore to provide a method mentioned at the outset by means of which a shortened switch-on time and / or time period for adaptation to a changed desired current value is made possible and at the same time high currents due to this change can be avoided and which is simple to implement.

This object is achieved by a method having the features of claim 1 and an electronic circuit arrangement according to claim 9.

The invention describes methods for pulse-modulated current control of a load current of an inductive load by means of at least one switching element for switching the load current, in which a first operating mode for operating the inductive load is carried out when there is a change in the current setpoint, with an initial duty cycle in the first operating mode the pulse modulation is determined, which is used to operate the inductive load in a second operating mode, and in the first operating mode a switching state of the switching element is determined depending on whether a current setpoint of the load current is higher or lower than a current setpoint of an immediately preceding cycle , wherein the switching state is maintained until a current limit value is reached and is switched when the current limit value is reached, the switching state of the switching element being switched several times to produce a predetermined number of periods, un d the duty cycle of the pulse modulation, which is used as the initial duty cycle for the second operating mode, is determined on the basis of at least part of the predetermined number of periods. The invention thus advantageously enables a shortened switch-on time and / or time period for adaptation to a changed target current value and at the same time enables high currents due to this change and at the same time high currents when switching on the inductive load can be avoided. A comparatively simple implementation is also possible. A current limit value is considered to have been reached in particular when the current actual value detected is greater than or equal to the current limit value when the current increases, for example when the current setpoint is raised, and when the current setpoint falls when the current falls is reduced, the detected current actual value is less than or equal to the current limit value.

On the basis of at least the part of the predetermined number of periods, an average duty cycle is preferably determined, which is used as the initial duty cycle for the second operating mode. As a result, the duty cycle for the second operating mode can be determined and specified comparatively quickly using the simplest means.

After a current limit value has been reached, there is preferably a further change in the switching state of the switching element when a period of a respective period has expired. Depending on the technical implementation of the triggering for switching the switching state, when a period has elapsed it can mean, for example, immediately before, during or after a switchover to a subsequent period.

According to an advantageous development of the invention, the initial duty cycle for use in the second operating mode is calculated using at least one of the switching states of the switching element over an average time period over at least part of the number of periods.

The initial duty cycle for use in the second operating mode is expediently calculated using an average switch-on time of the switching element over at least part of the number of periods.

A period of the periods is preferably specified by means of a timer. The timer is expediently a counter which starts again after a predetermined maximum value has been reached. The maximum value of the counter is preferably one of the frequency of the pulse modulation dependent or changing value.

According to one exemplary embodiment of the invention, starting from an initial duty cycle determined in the first operating mode, the duty cycle is specified during the second operating mode, taking into account at least one current limit value.

On the basis of an initial duty cycle determined in the first operating mode, the duty cycle is specified during the second operating mode in accordance with an exemplary embodiment, taking into account an upper and a lower current limit value, such that the load current is regulated between the upper and lower current limit values.

In the second operating mode, according to a development of the invention, an actual current value is determined, a control deviation from the current actual value and a current setpoint is detected, and the control deviation is used to calculate a pulse duty factor of the pulse width modulation.

According to an advantageous embodiment of the invention, a control pause period is provided after each control loop. After this control pause period, the actual current value is first determined, with which a new control intervention is then carried out. The time of the control intervention is thus coupled with the time of sampling of the current signal.

The method according to the invention is particularly preferably implemented essentially using software and can be implemented, for example, in an FPGA.

Furthermore, the invention describes an electronic circuit arrangement for pulse-modulated current regulation of a load current of an inductive load comprising at least one Switching element for switching the load current and a control circuit for actuating the switching element, the circuit arrangement for operating the inductive load being designed in a first operating mode when a change in the current setpoint has taken place, an initial duty cycle of the pulse modulation being determinable in the first operating mode is provided for operating the inductive load in a second operating mode, and in the first operating mode a switching state of the switching element is determined as a function of whether a current setpoint of the load current is higher or lower than a current setpoint of an immediately preceding cycle, the switching state up to Maintained to achieve a current limit value and switchable when the current limit value is reached, wherein the switching state of the switching element is switched several times to generate a predetermined number of periods, and on the basis of at least part of this period n the duty cycle of the pulse modulation is determined, which is used as the initial duty cycle for the second operating mode.

Further preferred embodiments result from the following description of exemplary embodiments with the aid of figures.

Fig. 1

ein Blockschaltbild einer Schaltungsanordnung zur Stromregelung einer induktiven Last gemäß des erfindungsgemäßen Verfahrens,

Fig. 2

ein Zeit-Strom-Diagramm zur Darstellung des zeitlichen Verlaufes des geregelten Stromes der induktiven Last,

Fig. 3

ein Flussdiagramm zur Erläuterung der Berechnung des Startwerts des Tastgrades der Stromregelung der induktiven Last bei einer Änderung des Stromsollwerts des Stromes während eines Betriebsmodus I und

Fig. 4

ein Flussdiagramm zur Erläuterung der Stromregelung der induktiven Last in einem Betriebsmodus II.

Show in principle:

Fig. 1

2 shows a block diagram of a circuit arrangement for current regulation of an inductive load according to the method according to the invention,

Fig. 2

a time-current diagram to show the time course of the regulated current of the inductive load,

Fig. 3

a flowchart to explain the calculation of the starting value of the duty cycle of the current control of the inductive load in the event of a change in the current setpoint of the current during an operating mode I and

Fig. 4

a flowchart to explain the current control of the inductive load in an operating mode II.

In order to enable a brief and simple description of the exemplary embodiments, the same elements are provided with the same reference symbols.

The Fig. 1 shows a schematic representation of a load circuit 1 with a valve coil for operating an electro-hydraulic or electropneumatic valve of a motor vehicle brake system as an inductive load L and a FET transistor T1 connected in series with load L as a load current switch and a control circuit 2 for controlling the FET transistor T1 and execution the control method according to the invention. For this purpose, a PWM voltage signal U _PWM generated by the control circuit 2 is fed to the gate electrode of the FET transistor T1, the pulse duty factor (ratio of the pulse duration to the period duration) being set in accordance with the current requirement. A measuring resistor R _m arranged in series with load L is provided in the load current path, the _actual current value I _{IST of} the load current I _{L being determined} by means of current measuring amplifier 2.2 and control circuit 2 from the measuring voltage U _{m present} via measuring resistor R _m . The load circuit 1 comprising the series circuit comprising the FET transistor T1, the inductive load L and the measuring resistor R _m is connected to a voltage supply U, for example a vehicle battery, the FET transistor T1 being present, for example, in a low-side arrangement. Parallel to the inductive load L is another FET transistor T2 against the Ground connected, which can be operated by the control circuit 2 as a freewheeling diode.
In accordance with this exemplary embodiment, the control circuit 2 has an A / D converter 2.1, which digitizes the amplified measurement signal output by the current measurement amplifier 2.2 for processing by the control circuit 2.

The method according to the invention for operating a valve coil L is described in the following using the time-current diagram Figure 2 as well as the block and flow diagrams according to the Figures 3 and 4 explained.

bzw. $$\mathit{DC}=\frac{R}{U}I$$

mit $$\mathit{DC}=\frac{t_{\mathit{on}}}{t_{\mathit{on}}+t_{\mathit{off}}}$$

In general: $$I=\frac{U}{R}\mathit{DC}$$

respectively. $$\mathit{DC}=\frac{R}{U}I$$

With $$\mathit{DC}=\frac{t_{\mathit{on}}}{t_{\mathit{on}}+t_{\mathit{off}}}$$

The duty cycle DC is influenced by the supply voltage U and the total resistance R of the load circuit, in particular the resistance of the coil L and the measuring resistance R _m . Since these are variable during operation, for example due to temperature influences, no clear load current I _L (or vice versa) can be derived from a predefined duty cycle.

The energization of valve coil L therefore takes place in at least two phases or operating modes, the load current I _L , upon detection of a change in the current setpoint I _SET , the new current setpoint I _SET in an operating mode I in accordance with Fig. 3 explained method steps is approximated. According to the exemplary representation Fig. 2 is the new current setpoint I _{SHOULD be} higher than a current setpoint I _{Soll, t-1 of} a previous cycle, so that in operating mode I the load current I _{L, I is} increased. When an upper current limit value I _{SOLL, o, I of} the operating mode I is reached or exceeded _, no further activation takes place for a predetermined period of time, so that the load current I _{L, I} drops, the activation then following until the upper current limit value I _{SET, o,} I _I continues, whereupon it is switched off again. Using the average switch-on time over a number N of periods, an average duty cycle DC _{mean is} determined, the period T being predefined by a timer, such as the maximum value of a counter: $${\mathit{DC}}_{\mathit{mean}}=\frac{\frac{{\mathit{\Sigma t}}_{\mathit{on}}}{N}}{\mathrm{T}}$$

Based on the changed current setpoint I _SOLL , the load current I _L for operating mode II is adjusted by using the mean duty cycle DC _mean .

After this start duty factor DC _{mean has been determined} for operating mode II, it follows operating mode I, which follows the method steps Figure 4 is realizable and in which the load current I _{L is} regulated between the upper current limit I _{SET, o, II} and the lower current limit I _{SET, u, II} . For operating mode II is in Fig. 2 only an average load current I _L regulated by the PWM is shown.

The upper current limit value I _{SHOULD, o, I of} the first operating mode I is set higher than the upper current limit value I _{SHOULD, o, II of} the second operating mode II, in particular in order to ensure that the average load current I _L in the operating mode II is approximately midway between the Current limit values run, taking into account that the switch-on and switch-off behavior of the load current I _{L is} exponential Has course and an average current is therefore lower than an average value between the upper I _{SET, o, II} and the lower I _{SET, u, II} current limit. The procedure described can also be used in the event of a reduction in the target current value I _SET , whereby there is preferably no widening of the tolerance band by correspondingly setting the lower current limit value I _{SET, u, I} , in order to avoid an excessively low load current I _L in operating mode I.

A more detailed explanation of the calculation of the starting value of the duty cycle of the current control during operating mode I is given below using the Figure 3 performed. According to the flow chart in Fig. 3 after starting in a first method step S1, a check is first made to determine whether there is a change in the current setpoint I _SET compared to the previous cycle. If no change has taken place, the system switches to operating mode II or maintains it. If a change has taken place instead, a timer is started in accordance with method step S2 and a check is carried out to determine whether the current setpoint I _{SOLL is} greater than the current setpoint I _{SOLL, t-1 of} the previous cycle (S3).

If the current setpoint I _SOLL the comparison in step S3 is not smaller or larger than the current target value I _{set,-1 t} of the previous cycle, should thus the load current I _L to be increased is in method step S4.1 the load circuit 1 by means of FET transistor T1 closed, so that there is an increase in the load current I _L when the valve coil L is energized. At successive sampling times t _Si (i = 1, 2, ...), which differ by a control pause duration Δt of, for example, 200 µs, the _actual current value I ACTUAL is recorded and checked in step S5.1 to determine whether the upper current limit value I _{SHOULD, o, I is} reached or exceeded, with the test being repeated cyclically until an exceeding is recognized and thereupon the load current I _{L is switched off} by means of a corresponding activation of FET transistor T1 in method step S6.1 at least until a time period or period duration determined by means of the timer started in step S2 is exceeded, the counting being carried out after the predetermined time period of the timer has been exceeded starts again so that it is cycled through. After a period of time (S7.1), a check is carried out to determine whether the specified number of PWM periods generated in this way has been reached, and returning to method step S4.1 if further periods are being considered. The number of periods generated in this way is preferably adjustable.

These PWM periods are used to regulate the average load current I _L for operating mode II on the basis of the current setpoint I _SOLL . If the preset number N of periods has been reached, a defined number of switch-on _times t _on1 , t _on2 , ... of the periods is used in method step S9 and the corresponding average duty cycle DC _{mean is} calculated from this using equation (1). This is transferred to the current controller as the start duty cycle for the execution of operating mode II. For example, the time periods of the last two switch-on _phases t _on1 , t _{on2 can be} used to form an average: $${\mathrm{t}}_{\mathrm{on}\_\mathrm{mean}}=\left({\mathrm{t}}_{\mathrm{on}1}+{\mathrm{t}}_{\mathrm{on}2}\right)/2,$$

If the load current I _{L is to be} reduced, the predetermined current setpoint I _{SHOULD is} smaller than the current setpoint I _{SHOULD, t-1 of} the previous cycle when comparing in method step S3, the load circuit 1 is interrupted in method step S4.2 by means of FET transistor T1, whereupon the load current is reduced, and then in S5.2 it is checked whether the lower current limit value I _{SHOULD, u, I has been} undershot, the test being repeated until an undershoot is detected and then the load current I _L by means of corresponding Activation of FET transistor T1 is switched on in method step S6.2 for a predetermined period of time t _on1 , ... (S7.2). If the time period t _{on1 is} exceeded, a check is carried out to determine whether the predetermined number of periods generated in this way has been reached, and a return to method step S4.2 if further periods are provided. If the preset number N of periods has been reached, in step S9 the duty cycle DC _mean to be used for operating mode II is calculated, which is transferred to the current controller for executing operating mode II, as has already been described.

The Fig. 4 shows a flow chart to explain the current control in operating mode II. The manipulated variable with which readjustment is carried out is a fixed value in operating mode II. If the load current I _L moves within the current limits, the duty cycle is not changed. The point in time at which a control intervention is carried out is coupled with the sampling time of the current signal. According to the flow chart in Fig. 4 after the start value of the duty cycle has been transferred, a measurement of the _actual current value I _ACTUAL (S10) and, in method step S11, a check is carried out to determine whether the load current value determined in this way falls within the lower I _{SET, u, II} and upper current limit I _{SET, o, II} des Operating mode II is. If it is within the limits, the process jumps back to step S10 and the _actual current value I ACT is measured again. In the event that the load current I _L or the measured current _actual value I _{ACT is} outside the limits, a check is carried out in step S12 as to whether this is greater than the upper current limit I _{SHOULD, o, II} and if so, the PWM duty cycle (S13). If this is not greater, the duty cycle is increased (S14).

According to a preferred embodiment of the invention, the limit values I _{SHOULD, u} and I _{SHOULD, o} can also be combined to form a single current setpoint in order to control the Realize load current I _{L, II} during operating mode II with respect to this single current setpoint, with a continuous adjustment being made by the control.

Claims (9)

1. Method for the pulse-modulated (PWM) current control of a load current (I_L) of an inductive load (L) by means of at least one switching element (T1) for switching the load current (I_L), in which a first operating mode (I) for operating the inductive load (L) is implemented when a change in the current setpoint value (I_SETPOINT) has been effected, wherein, in the first operating mode (I), an initial duty cycle (DC) of the pulse modulation (PWM) is determined, said duty cycle being used to operate the inductive load (L) in a second operating mode (II), characterized in that, in the first operating mode (I), a switching state of the switching element (T1) is set depending on whether a current setpoint value (I_SETPOINT) of the load current (I_L) is higher or lower than a current setpoint value (I_Setpoint,t-1) of a directly preceding cycle, wherein the switching state is retained until a current limit value (I_SETPOINT,o,I, I_SETPOINT,u,I) is reached and is switched over when the current limit value (I_SETPOINT,o,I, I_SETPOINT,u,I) is reached, wherein the switching state of the switching element (T1) is switched over multiple times to generate a prescribed number (N) of periods, and the duty cycle (DC, DC_mean) of the pulse modulation (PWM) is determined based on at least a portion of the prescribed number (N) of periods, said duty cycle being used as the initial duty cycle (DC) for the second operating mode (II).
2. Method according to Claim 1, characterized in that an average duty cycle (DC, DC_mean) is determined based on at least the portion of the prescribed number (N) of periods, said average duty cycle being used as the initial duty cycle (DC) for the second operating mode.
3. Method according to Claim 1 or 2, characterized in that, after a current limit value (I_SETPOINT,o,I, I_SETPOINT,u,I) has been reached, a further change in the switching state of the switching element (T1) is effected when a period duration of a respective period has elapsed.
4. Method according to at least one of the preceding claims, characterized in that the initial duty cycle (DC) for use in the second operating mode is calculated using an average length of time of at least one of the switching states of the switching element (T1) over at least a portion of the number (N) of periods.
5. Method according to at least one of the preceding claims, characterized in that the initial duty cycle (DC) is calculated using an average switch-on time of the switching element (T1) over at least a portion of the number (N) of periods.
6. Method according to at least one of the preceding claims, characterized in that a period duration (T) of the periods is prescribed by means of a timer.
7. Method according to at least one of the preceding claims, characterized in that, proceeding from an initial duty cycle (DC) identified in the first operating mode (I), the duty cycle during the second operating mode (II) is prescribed taking into account at least one current limit value (I_{SETPOINT,u,II}, I_{SETPOINT,ο,II}).
8. Method according to at least one of the preceding claims, characterized in that, in the second operating mode (II), a current actual value (I_ACTUAL) is determined, a control deviation from the current actual value (I_ACTUAL) and a current setpoint value (I_SETPOINT) is detected and the control deviation is used to calculate a duty factor (DC) of the pulse-width modulation (PWM).
9. Electronic circuit arrangement for the pulse-modulated (PWM) current control of a load current (I_L) of an inductive load (L) comprising at least one switching element (T1) for switching the load current (I_L) and a control circuit (2) for actuating the switching element (T1), wherein the circuit arrangement is configured to operate the inductive load (L) in a first operating mode (I) when a change in the current setpoint value (I_SETPOINT) has been effected, wherein, in the first operating mode (I), an initial duty cycle (DC) of the pulse modulation (PWM) can be determined, said duty cycle being provided to operate the inductive load (L) in a second operating mode (II), characterized in that, in the first operating mode (I), a switching state of the switching element (T1) is set depending on whether a current setpoint value (I_SETPOINT) of the load current (I_L) is higher or lower than a current setpoint value (I_Setpoint,t-1) of a directly preceding cycle, wherein the switching state is retained until a current limit value (I_SETPOINT,o,I, I_SETPOINT,u,I) is reached and can be switched over when the current limit value (I_SETPOINT,o,I, I_SETPOINT,u,I) is reached, wherein the switching state of the switching element (T1) is switched over multiple times to generate a prescribed number (N) of periods, and the duty cycle (DC, DC_mean) of the pulse modulation (PWM) is determined based on at least a portion of said periods, said duty cycle being used as the initial duty cycle (DC) for the second operating mode (II) .

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