EP3238091A4 - Schnelle vektorkonflikterkennung in einem dynamischen speicher - Google Patents

Schnelle vektorkonflikterkennung in einem dynamischen speicher Download PDF

Info

Publication number
EP3238091A4
EP3238091A4 EP15873914.4A EP15873914A EP3238091A4 EP 3238091 A4 EP3238091 A4 EP 3238091A4 EP 15873914 A EP15873914 A EP 15873914A EP 3238091 A4 EP3238091 A4 EP 3238091A4
Authority
EP
European Patent Office
Prior art keywords
dynamic memory
conflict detection
memory conflict
fast vector
vector dynamic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP15873914.4A
Other languages
English (en)
French (fr)
Other versions
EP3238091B1 (de
EP3238091A1 (de
Inventor
Cheng Wang
Albert HARTONO
Sara S. Baghsorkhi
Youfeng Wu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of EP3238091A1 publication Critical patent/EP3238091A1/de
Publication of EP3238091A4 publication Critical patent/EP3238091A4/de
Application granted granted Critical
Publication of EP3238091B1 publication Critical patent/EP3238091B1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30101—Special purpose registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/34—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes
    • G06F9/345—Addressing or accessing the instruction operand or the result ; Formation of operand address; Addressing modes of multiple operands or results
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
EP15873914.4A 2014-12-23 2015-11-16 Schnelle vektorkonflikterkennung in einem dynamischen speicher Active EP3238091B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/581,996 US20160179550A1 (en) 2014-12-23 2014-12-23 Fast vector dynamic memory conflict detection
PCT/US2015/060818 WO2016105691A1 (en) 2014-12-23 2015-11-16 Fast vector dynamic memory conflict detection

Publications (3)

Publication Number Publication Date
EP3238091A1 EP3238091A1 (de) 2017-11-01
EP3238091A4 true EP3238091A4 (de) 2018-07-25
EP3238091B1 EP3238091B1 (de) 2020-05-13

Family

ID=56129486

Family Applications (1)

Application Number Title Priority Date Filing Date
EP15873914.4A Active EP3238091B1 (de) 2014-12-23 2015-11-16 Schnelle vektorkonflikterkennung in einem dynamischen speicher

Country Status (7)

Country Link
US (1) US20160179550A1 (de)
EP (1) EP3238091B1 (de)
JP (1) JP6807073B2 (de)
KR (1) KR20170097628A (de)
CN (1) CN107257955B (de)
TW (2) TW201723883A (de)
WO (1) WO2016105691A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111176608A (zh) * 2016-04-26 2020-05-19 中科寒武纪科技股份有限公司 一种用于执行向量比较运算的装置和方法
CN111506350A (zh) * 2020-04-30 2020-08-07 中科院计算所西部高等技术研究院 具有ooda循环分区机制的流式处理器
US11836527B2 (en) * 2021-08-02 2023-12-05 Nvidia Corporation Accelerating table lookups using a decoupled lookup table accelerator in a system on a chip
US20230214217A1 (en) * 2022-01-06 2023-07-06 Maziar Goudarzi Method and device for providing a vector stream instruction set architecture extension for a cpu
CN117539469B (zh) * 2024-01-10 2024-03-19 睿思芯科(成都)科技有限公司 Risc-v的可视化向量编程方法、系统及相关设备

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080288745A1 (en) * 2007-05-14 2008-11-20 Apple Inc. Generating predicate values during vector processing
US20080288744A1 (en) * 2007-05-14 2008-11-20 Apple Inc. Detecting memory-hazard conflicts during vector processing
US20080288759A1 (en) * 2007-05-14 2008-11-20 Gonion Jeffry E Memory-hazard detection and avoidance instructions for vector processing
US20120166761A1 (en) * 2010-12-22 2012-06-28 Hughes Christopher J Vector conflict instructions
US20130166516A1 (en) * 2011-12-23 2013-06-27 Arm Limited Apparatus and method for comparing a first vector of data elements and a second vector of data elements
US20140089634A1 (en) * 2011-12-23 2014-03-27 Victor W. Lee Apparatus and method for detecting identical elements within a vector register
US20140289498A1 (en) * 2013-03-19 2014-09-25 Apple Inc. Enhanced macroscalar vector operations

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE68927313T2 (de) * 1988-06-27 1997-05-07 Digital Equipment Corp Operandenspezifiererverarbeitung
US7124160B2 (en) * 2000-03-08 2006-10-17 Sun Microsystems, Inc. Processing architecture having parallel arithmetic capability
US7793084B1 (en) * 2002-07-22 2010-09-07 Mimar Tibet Efficient handling of vector high-level language conditional constructs in a SIMD processor
US7502912B2 (en) * 2003-12-30 2009-03-10 Intel Corporation Method and apparatus for rescheduling operations in a processor
US7627735B2 (en) * 2005-10-21 2009-12-01 Intel Corporation Implementing vector memory operations
US20100270671A1 (en) * 2009-04-28 2010-10-28 Lsi Corporation Manipulating fill patterns during routing
US8688957B2 (en) * 2010-12-21 2014-04-01 Intel Corporation Mechanism for conflict detection using SIMD
US20120254589A1 (en) * 2011-04-01 2012-10-04 Jesus Corbal San Adrian System, apparatus, and method for aligning registers
CN104126171B (zh) * 2011-12-27 2018-08-07 英特尔公司 用于基于两个源写掩码寄存器生成依赖向量的系统、装置和方法
US9116686B2 (en) * 2012-04-02 2015-08-25 Apple Inc. Selective suppression of branch prediction in vector partitioning loops until dependency vector is available for predicate generating instruction
US9772854B2 (en) * 2012-06-15 2017-09-26 International Business Machines Corporation Selectively controlling instruction execution in transactional processing
US20130339680A1 (en) * 2012-06-15 2013-12-19 International Business Machines Corporation Nontransactional store instruction
US9842046B2 (en) * 2012-09-28 2017-12-12 Intel Corporation Processing memory access instructions that have duplicate memory indices
US9665368B2 (en) * 2012-09-28 2017-05-30 Intel Corporation Systems, apparatuses, and methods for performing conflict detection and broadcasting contents of a register to data element positions of another register
US9189236B2 (en) * 2012-12-21 2015-11-17 Intel Corporation Speculative non-faulting loads and gathers
US9372692B2 (en) * 2012-12-29 2016-06-21 Intel Corporation Methods, apparatus, instructions, and logic to provide permute controls with leading zero count functionality
US9411584B2 (en) * 2012-12-29 2016-08-09 Intel Corporation Methods, apparatus, instructions, and logic to provide vector address conflict detection functionality
CN104969179B (zh) * 2013-03-15 2019-07-16 英特尔公司 用于将具有循环承载的依赖的标量计算机程序循环向量化的方法和系统
US10241793B2 (en) * 2013-03-15 2019-03-26 Analog Devices Global Paralleizing loops in the presence of possible memory aliases
US9239712B2 (en) * 2013-03-29 2016-01-19 Intel Corporation Software pipelining at runtime
CN103279327B (zh) * 2013-04-28 2015-11-25 中国人民解放军信息工程大学 面向异构simd扩展部件的自动向量化方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080288745A1 (en) * 2007-05-14 2008-11-20 Apple Inc. Generating predicate values during vector processing
US20080288744A1 (en) * 2007-05-14 2008-11-20 Apple Inc. Detecting memory-hazard conflicts during vector processing
US20080288759A1 (en) * 2007-05-14 2008-11-20 Gonion Jeffry E Memory-hazard detection and avoidance instructions for vector processing
US20120166761A1 (en) * 2010-12-22 2012-06-28 Hughes Christopher J Vector conflict instructions
US20130166516A1 (en) * 2011-12-23 2013-06-27 Arm Limited Apparatus and method for comparing a first vector of data elements and a second vector of data elements
US20140089634A1 (en) * 2011-12-23 2014-03-27 Victor W. Lee Apparatus and method for detecting identical elements within a vector register
US20140289498A1 (en) * 2013-03-19 2014-09-25 Apple Inc. Enhanced macroscalar vector operations

Also Published As

Publication number Publication date
KR20170097628A (ko) 2017-08-28
CN107257955A (zh) 2017-10-17
TWI564733B (zh) 2017-01-01
TW201723883A (zh) 2017-07-01
EP3238091B1 (de) 2020-05-13
EP3238091A1 (de) 2017-11-01
US20160179550A1 (en) 2016-06-23
JP2018500659A (ja) 2018-01-11
WO2016105691A1 (en) 2016-06-30
JP6807073B2 (ja) 2021-01-06
CN107257955B (zh) 2021-02-26
TW201640379A (zh) 2016-11-16

Similar Documents

Publication Publication Date Title
EP3314530A4 (de) System zur erkennung von emotionen
EP3199690A4 (de) Trockner
EP3430625A4 (de) Feram-dram-hybridspeicher
EP3297049A4 (de) Magnetspeichervorrichtung
EP3518286A4 (de) Speichervorrichtung
EP3141854A4 (de) Trocknungsvorrichtung
EP3102769A4 (de) Speichersystem
EP3139792A4 (de) Sicherer zugangsspiegel
GB201608425D0 (en) Access point
EP3164777A4 (de) Speicherkarte
EP3182414A4 (de) Speicherschaltung
EP3161577A4 (de) Speicherkarte
EP3127444A4 (de) Künstliche wimpern
EP3108707A4 (de) Näherungsdetektor
EP3248105A4 (de) Objektbasierter speicherstoff
EP3534265A4 (de) Speicherzugriffstechnik
EP3102894A4 (de) Wärmepumpensystem
EP3103304A4 (de) Direktzugriffsverfahren
EP3289464A4 (de) Detektion von node.js-speicherverlusten
EP3342922A4 (de) Trockner
GB2525715B (en) Pipelined ECC-protected memory access
EP3347820A4 (de) Lesekohärenter gruppenspeicher
EP3369191A4 (de) Detektion von ressourcenzugriff
EP3238091A4 (de) Schnelle vektorkonflikterkennung in einem dynamischen speicher
EP3465541A4 (de) Formerkennung

Legal Events

Date Code Title Description
STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE INTERNATIONAL PUBLICATION HAS BEEN MADE

PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE

17P Request for examination filed

Effective date: 20170606

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

DAV Request for validation of the european patent (deleted)
DAX Request for extension of the european patent (deleted)
REG Reference to a national code

Ref country code: DE

Ref legal event code: R079

Ref document number: 602015052900

Country of ref document: DE

Free format text: PREVIOUS MAIN CLASS: G06F0015800000

Ipc: G06F0009300000

A4 Supplementary search report drawn up and despatched

Effective date: 20180622

RIC1 Information provided on ipc code assigned before grant

Ipc: G06F 9/30 20060101AFI20180618BHEP

Ipc: G06F 9/38 20060101ALI20180618BHEP

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: GRANT OF PATENT IS INTENDED

INTG Intention to grant announced

Effective date: 20191219

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE PATENT HAS BEEN GRANTED

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602015052900

Country of ref document: DE

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 1271151

Country of ref document: AT

Kind code of ref document: T

Effective date: 20200615

REG Reference to a national code

Ref country code: NL

Ref legal event code: FP

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: FI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200914

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200913

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200814

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200813

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200813

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 1271151

Country of ref document: AT

Kind code of ref document: T

Effective date: 20200513

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: IT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602015052900

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20210216

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201116

REG Reference to a national code

Ref country code: BE

Ref legal event code: MM

Effective date: 20201130

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201130

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201130

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201116

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20200513

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20201130

P01 Opt-out of the competence of the unified patent court (upc) registered

Effective date: 20230518

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: NL

Payment date: 20230915

Year of fee payment: 9

Ref country code: GB

Payment date: 20230914

Year of fee payment: 9

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20230911

Year of fee payment: 9

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20230919

Year of fee payment: 9