EP3105995A1 - Circuit d'attaque de led - Google Patents
Circuit d'attaque de ledInfo
- Publication number
- EP3105995A1 EP3105995A1 EP15701700.5A EP15701700A EP3105995A1 EP 3105995 A1 EP3105995 A1 EP 3105995A1 EP 15701700 A EP15701700 A EP 15701700A EP 3105995 A1 EP3105995 A1 EP 3105995A1
- Authority
- EP
- European Patent Office
- Prior art keywords
- driver circuit
- circuit
- pwm
- current
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004804 winding Methods 0.000 claims description 61
- 230000004907 flux Effects 0.000 claims description 13
- 230000001276 controlling effect Effects 0.000 claims description 9
- 238000001914 filtration Methods 0.000 claims description 8
- 230000001105 regulatory effect Effects 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 5
- 238000010079 rubber tapping Methods 0.000 claims description 2
- 238000001514 detection method Methods 0.000 description 33
- 239000003990 capacitor Substances 0.000 description 21
- 230000004888 barrier function Effects 0.000 description 9
- 230000033228 biological regulation Effects 0.000 description 6
- 238000005259 measurement Methods 0.000 description 6
- 238000012937 correction Methods 0.000 description 5
- 230000001419 dependent effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000003247 decreasing effect Effects 0.000 description 2
- 238000011156 evaluation Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 240000006829 Ficus sundaica Species 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000005415 magnetization Effects 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
- H05B45/3725—Switched mode power supply [SMPS]
- H05B45/382—Switched mode power supply [SMPS] with galvanic isolation between input and output
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
- H05B45/3725—Switched mode power supply [SMPS]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
- H05B45/3725—Switched mode power supply [SMPS]
- H05B45/39—Circuits containing inverter bridges
Definitions
- the present invention relates in particular to a
- Control circuit and a converter for the operation of at least one light source e.g. a driver circuit for the operation of at least one LED, and a
- a driver circuit for operating LEDs is basically known from the prior art. Such
- Resonant circuit such as an LLC converter, which is responsible, power over a galvanic barrier or galvanic barrier from a primary side to a
- the invention is based on such an LLC topology, e.g. a half-bridge inverter with the following resonant circuit comprises.
- the resonant circuit feeds a transformer, starting from the secondary side in turn an LED track can be supplied. From the prior art, however, it is known for the constant control of the LED current, the current through the
- Secondary microcontroller is sent via the SELV barrier to the microcontroller on the primary side.
- This microcontroller thus corrects the primary current measurement by this correction contribution, the
- the microcontroller controls the frequency of the half-bridge depending on the current and current via an ASIC as manipulated variable
- the invention is based on the technical problem of specifying a control circuit or driver circuit for operating light sources, in particular LEDs, in which a desired value for the brightness is better implemented.
- the driver circuit provided for lighting means, in particular for one or more LEDs.
- the driver circuit comprises a voltage-supplyable circuit which is clocked by means of at least one switch and supplies a resonant circuit for supplying the lighting means with power.
- the driver circuit further comprises a control circuit for controlling the luminous flux, comprising a regulator.
- the controller generates a manipulated variable for the regulation of the luminous flux as a function of a
- the driver circuit comprises a PWM modulator for modulating the manipulated variable with a PWM signal.
- control loop is continuous and
- the modulating of the manipulated variable by the PWM signal causes the control loop
- the control loop has a time constant that is slower than the time duration of a period of the PWM modulation.
- the time constant of the control loop is much slower than the duration of a period of the PWM modulation, e.g. at least 5 times slower,
- the driver circuit preferably has a low-pass filter for filtering the feedback signal.
- the controller adjusts depending on the low-pass filtered
- the time constant of the low-pass filter is slower than the duration of a period of the PWM modulation.
- the time constant of the control loop may be slower than the duration of a period of the PWM modulation that the time constant of the low-pass filtering by the low-pass filter is slower than the duration of a period of the PWM modulation.
- the time constant of the regulator is the time constant of the regulator
- the time constant of the control loop can thereby be slower than the time duration of a period of the PWM modulation that the time constant of the controller
- the PWM modulation due to the slow time constant, in particular due to the slowdown by the low-pass filter, by the control loop is not adjustable.
- the driver circuit comprises a PWM dimming unit for setting a duty ratio for the PWM modulation depending on a dimming command. DB).
- the duty cycle is preferably independent of
- the PWM modulation can be done in particular open-loop. That the PWM signal is only through
- the driver circuit preferably has an amplitude dimming unit for determining the setpoint value for the luminous flux in dependence on the dimming command.
- the setpoint can be set independently of the set value
- the duty cycle for the PWM modulation is 100%. lies.
- the duty cycle is stepped or even
- a cascade control is provided.
- the first control circuit comprising the regulator for regulating the luminous flux is interleaved with a second control circuit having a further regulator.
- the second loop may have a faster time constant than the first loop.
- the second control circuit can in particular serve to regulate a residual ripple of the voltage.
- the driver circuit has a on the
- Resonant circuit following transformer for transmitting electrical energy from a coupled to the resonant circuit primary winding to a secondary winding, starting from which the bulbs can be supplied with power
- the feedback signal indirectly provides the feedback signal
- the driver circuit preferably has a driver for output, based on the PWM-modulated manipulated variable, at least one on / off drive signal for the control of the at least one switch of the clocked circuit.
- the manipulated variable preferably gives the frequency and / or the duty cycle of the control of the at least one
- Control unit for operating a driver circuit for lighting means, in particular for one or more LEDs, Feedback signal.
- the control unit comprises a control circuit for regulating the luminous flux, comprising a regulator.
- the controller generates a manipulated variable for the
- Control unit comprises a PWM modulator for modulating the manipulated variable with a PWM signal.
- the control unit is in the form of a
- ASIC integrated circuit
- Microcontroller or a hybrid version of it.
- Illuminant power reproducing signal becomes a
- Manipulated variable for the regulation of the lamp current generated A PWM signal is applied to the manipulated variable
- the invention thus preferably proposes that the PWM signal does not temporarily switch off the control loop or modulate the entire half-bridge driver, but rather modulate the output signal of the half-bridge control loop.
- a control of the LED current by changing the frequency of the half-bridge drive is present. This control loop runs constantly, so also in the
- This control has a time constant that is significantly slower than the frequency / duration of the PWM modulation.
- the targeted, slowing ⁇ by the low-pass filtering of the feedback signal before the comparator with the desired signal is the targeted, slowing ⁇ by the low-pass filtering of the feedback signal before the comparator with the desired signal.
- this time constant can also be implemented after the comparator or in the control algorithm itself.
- the LED current remains substantially constant over a period of PWM modulation, resulting in improved color consistency of the LED path.
- Fig. 1 shows schematically the structure of a
- Light sources in particular for the supply of LEDs or an LED track,
- Fig. 2 shows an alternative embodiment of the
- Fig. 3 shows an alternative embodiment of the Fig. 4 shows an alternative embodiment of the
- FIG. 5 shows the influence of a dimming value on parameters of the control according to the invention
- Fig. 6 shows another embodiment of a
- Driver circuit 1 for the supply of lighting means shown in particular in the form of an LED converter for the supply of LEDs or an LED track.
- the driver circuit 1 is the input side of a
- the input voltage Vdc is preferably a rectified, and optionally filtered, AC voltage or mains voltage.
- this rectified mains voltage is still applied to a converter in the form of e.g. a power factor correction circuit (not shown) supplied before the
- the input voltage Vdc is in this case an approximately constant bus voltage possibly having a residual ripple.
- the input voltage Vdc has an amplitude of 400V.
- the input voltage can also be called bus voltage or DC link voltage.
- the input voltage Vdc may also be a DC voltage or a constant voltage, such as a battery voltage. is fed.
- the input voltage Vdc supplies in particular a clocked circuit or a
- Inverter e.g. in form of a
- Half-bridge circuit 2 may be configured.
- the inverter 2 has at least one switch.
- a switch e.g. a flyback o converter (not shown) may be provided.
- Half-bridge circuit 2 may be implemented as transistors, e.g. FET or MOSFET be configured.
- the switches LS, HS are 5 of respective control signals S / LS, S / HS starting from
- the switches LS, HS by the control signals S / LS, S / HS or through the
- Half-bridge driver 12 alternately turned on and off. o
- the mean value of the current through the LEDs can be through
- the potential-lower switch LS is connected to a primary-side ground.
- a resonant circuit 3 in o form e.g. connected to a series resonant circuit.
- a parallel resonant circuit Inductance and capacitance elements At the center of the half-bridge circuit 2 according to the invention, a parallel resonant circuit Inductance and capacitance elements.
- a series circuit comprising a first coil Lr, a second coil La and a
- Capacitor Cr The resonant circuit 3 is referred to in this case as the LLC resonant circuit.
- the coil Lr and the capacitor Cr preferably form an LC resonant circuit and are referred to as a resonant coil and a resonant capacitor.
- the second coil La connected in series with the coil Lr and the capacitor Cr is preferably
- the transformer T Primary winding of a transformer T, which serves as a transformer for galvanic isolation.
- the transformer T is an example of a galvanic barrier, which is shown in FIG. 1 as safety extra low voltage barrier (SELV) barrier (Safety Extra Low Voltage).
- SELV safety extra low voltage barrier
- the transformer T forms a total of a galvanic barrier between a primary side having the primary winding La and a secondary side having the secondary winding Lb of the transformer T.
- SELV safety extra low voltage barrier
- the transformer T forms a total of a galvanic barrier between a primary side having the primary winding La and a secondary side having the secondary winding Lb of the transformer T.
- the transformer T is shown as an ideal transformer, wherein the
- the secondary winding Lb of the transformer T has a tapping, in particular a
- this center tap can serve as a secondary mass.
- Detection winding LI ' are preferably identical.
- the respective number of turns nLl_sec, nLl'_sec of the detection windings LI, LI ' are the same.
- a first diode D1 is connected in series with the first detection winding LI.
- a second diode Dl' is connected in series with the second detection winding LI '.
- Detecting windings LI, LI ' are connected to the anode of the diodes D1, D1'.
- Secondary winding Lb of the transistor T preferably flows in operation, an AC current i. an alternating current. Depending on the direction of this alternating current, a current flows through the first diode D1 or through the second diode D1 '. At the output of the rectifier circuit 4, i. at the connection point of the diodes Dl, Dl ', thus flows a rectified current.
- the rectifier is also referred to as the center rectifier.
- the rectifier circuit 4 supplies a storage capacitor C2 on the output side.
- This storage capacitor C2 is preferably connected between the connection point of the diodes D1, D1 'and the center tap of the secondary winding Lb.
- storage capacitor C2 may preferably due to its relatively high capacity LI 'is thus first rectified to operate the LEDs by the rectifier circuit 4 and then preferably filtered or low-pass filtered.
- the lighting means preferably LEDs or an LED track
- the driver circuit 1 has two output terminals Kl, K2 for connecting the LEDs.
- the illustrated LED is intended to be representative of one or more LEDs.
- the LED circuit operated by the driver circuit 1 may comprise a series connection of a plurality of LEDs. Alternatively, you can also do it in parallel
- LEDs or a combination of parallel and series connected LEDs are supplied.
- Storage capacitor C2 can further components for
- Filtering be provided.
- a coil L2 is shown in FIG. This coil L2 may preferably be arranged in series with the LEDs, these
- the coil L2 is preferably between the
- the driver circuit may have a further storage or filter capacitor C3.
- a resistor R3 may be provided between the output terminal K2 and the center tap of the secondary winding Lb.
- the current through the primary-side winding LI' ' gives the current through the secondary-side windings LI, LI', i. also the current through the LEDs, again. At least averaged over time, the current through the primary-side winding LI '' is a representation of the mean value of the current through the LEDs.
- the ratio of the number of turns of the corresponding primary and secondary windings to each other is taken into account.
- the ratio of the number of turns of the corresponding primary and secondary windings to each other is taken into account.
- the secondary winding Lb on the one hand and the detection windings LI, LI 'on the other hand are formed as separate windings. That the secondary winding Lb and the detection windings LI, LI 'form two separate transformers. This results in particular from the requirement that the detection transformer LI, LI ', LI' 'is designed as a current transformer.
- the windings of the detection transformer are in particular designed to enable as loss-free detection of the secondary-side alternating current. By suitable choice of the windings can as
- the alternating current through the detection windings LI, LI ' Evaluation circuit 6 is on the primary side
- Detection winding LI '' connected to generate a measured value Im for the current through the LEDs.
- the control circuit ST generates the control signals S / LS, S / HS for the switches LS, HS. Starting from the actual value Im, the control circuit ST performs a current control to a
- o half-bridge circuit 2 is clocked accordingly.
- the evaluation circuit 6 serves in principle to evaluate or process the information supplied by the detection winding LI '' about the current through the LEDs
- the rectifier 5 may be e.g. in the form of a full-bridge rectifier having four diodes (not shown) configured.
- Resistor or resistor Rshunt connected, the current through the secondary side and through the LEDs
- the actual value signal Im of the LED o current of the control circuit ST is returned.
- the low-pass filter LPF can be configured, for example, as an RC element with a resistor and a capacitor, wherein the capacitor LED power again.
- the analog average actual value Im of the LED current is preferably converted by an analog-to-digital converter ADC into a digital actual value.
- the analog-to-digital converter ADC is preferably designed as a 12-bit converter.
- the measured actual value Im of the LED current is determined by the
- Control unit ST deducted a setpoint for the LED current ILS.
- the control unit ST comprises means such as e.g. a comparator 9 for comparing the set value ILS and the actual value Im or for forming the difference thereof
- the set value ILS for the LED current can be set internally by the control unit ST.
- a dimming command B as shown in Fig. 1 may be externally given.
- the control unit ST can be connected to a line in order to receive the dimming command B via this line and to derive therefrom the current setpoint ILS.
- this line can be a
- Data transmission can be analog or preferably digital by means of a protocol for controlling
- the received dimming command B is converted by an amplitude dimming unit 8 into the desired value ILS or
- the amplitude dimming unit 8 generates The control difference RDF is fed to a controller 10, in which a control algorithm for the regulation of the LED current is implemented.
- the controller 10 is preferably designed as a digital controller and can be configured, for example in the form of a PI controller.
- the controller Depending on the supplied control difference RDF, the controller generates a control variable, by means of which the half-bridge driver 12 is driven.
- a manipulated variable for example, the drive frequency ASF, the switch LS, HS, and / or the duty cycle of
- Control of the switches LS, HS be provided.
- the switches LS, HS of the half-bridge 2 are switched to high-frequency, typically in a frequency range of about 10 kHz.
- the drive frequency ASF is so
- the control unit ST comprises, in parallel with the amplitude dimming unit 8 for determining the set value ILS for the LED current as a function of the dimming command B, a PWM circuit.
- This PWM dimming unit 8 ⁇ serves to convert the received dimming command B in a duty cycle TVH for a PWM modulation (pulse width modulation).
- the frequency of the PWM modulation is opposite to the
- the duty cycle TVH is fed to a PWM modulator 11.
- the PWM modulator 11 receives on the input side, on the one hand, the value of the duty cycle TVH for the PWM modulation and, on the other hand, the manipulated variable ASF or a signal which reproduces this manipulated variable.
- the duty cycle TVH is preferably dependent only on the dimming command B and in particular not on the set value ILS.
- a look-up table may be provided in which a suitable duty cycle TVH is stored for different dimming commands B.
- the duty cycle TVH affects the PWM modulation by the PWM modulator 11, but not the current regulation by the controller 10.
- the controller 10 receives as input only the set value ILS for the LED current and not the duty cycle TVH.
- the controller 10 is also not turned off during a turn-off period of the PWM modulation.
- the PWM dimming being done by modulating the PWM signal through the PWM modulator 11 and the AM dimming or amplitude dimming by controlling the amplitude of the LED Current through the controller 10 takes place.
- the LED current in the turn-on time is higher than a true AM / PWM dimming, where the control is switched off in a AusschaltZeitdauer the PWM modulation.
- the LED current remains essentially constant - except for one
- the control loop of the LED current is selected, for example, between 5 and 10 times slower than the low-frequency PWM modulation of the operation of the inverter 2.
- This PWM modulation becomes dimming
- the signal representing the LED current according to the invention is such low-pass filtered or averaged that the
- Time constant is much slower than the frequency of the PWM signal.
- controller topology according to the invention is now that the control loop with the actual value signal
- Frequency of the half-bridge inverter ⁇ is continuously activated, ie in particular in the
- the PWM signal which stops the operation of the half-bridge in the off-time periods, is the output of the
- the control loop is unable to regulate the PWM modulation due to the slowdown due to the low-pass filtering of the feedback signal.
- the low-pass filter LPF is provided outside the control unit ST.
- the low-pass filter is designed analogously.
- the low-pass filter can also be connected within the control unit ST.
- the low-pass filter LPF may be after the analog-to-digital converter ADC, in which case the low-pass filter is implemented digitally.
- the low-pass filter can either be between the analog-to-digital converter ADC and the
- Comparator 9 be interconnected, or between the
- Comparator 9 and the controller 10. 2 shows an alternative construction of the rectification of the secondary-side current.
- the detection winding LI as in the embodiment of FIG. 1, is connected in series with the secondary winding Lb, which in contrast to the embodiment of FIG. 1 is designed as a single winding without center tap.
- the current through the secondary winding Lb becomes one
- Rectifier circuit 20 is supplied, that is
- Detection winding LI is coupled.
- Rectifier circuit 20 is designed as a bridge rectifier or full-bridge rectifier with four diodes (not shown).
- the circuit at the output of the rectifier circuit 20 again corresponds to the circuit at the output of the rectifier circuit 4 shown in FIG.
- Output terminals of the rectifier circuit 20 are in particular connected to the storage capacitor C2, the terminals Kl, K2, the LEDs are connected.
- Fig. 3 shows a further alternative embodiment for the secondary side of the driver circuit.
- a further alternative construction of the rectification of the secondary-side current is shown.
- the detection winding LI is connected in series with the secondary winding Lb.
- the terminal of the secondary winding Lb which is not connected to the detection winding LI is provided with two diodes 30, 31, respectively connected.
- a first storage capacitor C30 is connected between the cathode of the first diode 30 and the detection winding LI.
- a second storage capacitor C31 is connected between the anode of the second diode 31 and the
- the diodes D30, D31 form a rectifier circuit 30, which is the
- Rectifier circuit 4 of FIG. 1 corresponds. Depending on the direction of flow of the current flowing through the secondary winding Lb current blocks the first or the second diode D30, D31.
- the storage capacitors C30, C31 are preferably the same and corresponding to that shown in FIG.
- Fig. 4 shows an alternative embodiment of the
- a series connected to the LEDs shunt or measuring resistor Rshunt is used here for current measurement.
- a signal is tapped, which reflects the current through the LEDs.
- This signal is preferably low pass filtered, e.g. by an RC element consisting of a capacitor C40 and a
- the tapped signal can be used to charge the capacitor C40, which serves as a
- the charging voltage of the capacitor C40 is supplied to a secondary-side control unit ST2 as a signal provided to the LEDs.
- the secondary-side control unit ST2 that is on the
- Secondary side of the transformer T is arranged, comprises an analog-to-digital converter 40 for converting the
- the analog-to-digital converter 40 is preferably designed as a 12-bit converter.
- This digital data is e.g. returned to the primary side of the transformer 7 via an optocoupler 41 via the SELV barrier.
- an optocoupler 41 e.g. a digital isolator, e.g. ADUM digital isolator.
- the digital isolator e.g. ADUM digital isolator.
- the half-bridge circuit 2 depends on the one hand on these returned actual values of the LED current and on the other hand on the current setpoint ILS or of the
- Dimming command B triggers.
- FIG. 5 shows an exemplary embodiment for dimming by the amplitude dimming unit 8 and the PWM dimming unit 8.
- dimming of the LED line is now carried out as follows:
- Duty cycle TVH to 100%, so that the PWM modulator 11 has no influence on the manipulated variable. From a certain dimming value DWB of, for example, 35%, the duty cycle of the PWM modulation is then set below 100%. In other words, between this threshold value DWB of 35% and a lower threshold value USW of, for example, 1%, the duty cycle TVH is gradually reduced.
- this threshold value DWB of 35% and a lower threshold value USW of, for example, 1% the duty cycle TVH is gradually reduced.
- dimming value B and duty cycle TVH saved.
- the duty cycle TVH remains constant for a specific dimming range.
- dimming range DWB - USW 35% -x%) the duty cycle is the value y% etc. , s. Fig. 5th
- the dimming value specification signal B is thus converted on the one hand into a variable PWM duty cycle, and on the other hand as a steadily decreasing setpoint for the time
- the PWM duty cycle and the setpoint preferably do not affect each other. Both values are rather dependent
- stepwise with the dimming value B preferably from the dimming value DWB, for example, 35%.
- the PWM modulation is thus modulated open loop. Of the set due to the low-pass filtering, for example, the actual value signal.
- FIG. 5 shows how the controller 10 attempts to correct the PWM modulation in which the controller 10 attempts to average the LED current to the value ILED_R.
- the setpoint value ILS for the current controller 10 is continuously reduced.
- the current through the LEDs remains substantially constant in the turn-on durations of the PWM signal, except for a small sawtooth ripple. This ripple is not available over time, but at
- Fig. 6 shows a further embodiment of a
- the driver circuit 60 of FIG. 6 basically is based on the structure of Fig. 1.
- ILED_i the secondary-side LED current is st measured as shown in Fig. 4. Similar to FIG. 1, the actual value is subtracted from the desired value ILS by a comparator 61 and fed to a controller 62, for example in the form of a P, PI or PID controller.
- the output of the regulator 62 is supplied to a second comparator or subtractor 63.
- the feedback topology of FIG. 1 can be used with the detection transformer Tl for measuring the LED current.
- the rectified current value is then lowpass filtered by an RC element 64, i. 5, and from an analog-to-digital converter 65 in FIG
- a digital actual value preferably converted into a 12-bit value.
- the measured actual value of the primary-side current is subtracted from the output of the regulator 62 and the controller 10
- the output of the regulator 10, as in FIG. 1, is the PWM modulator 11 and the half-bridge driver 12
- the input voltage Vdc may be of e.g. 400 V have a residual ripple.
- the second interleaved loop with the controller 64 implements a faster algorithm, e.g. the residual ripple of the input voltage Vdc
- the PWM modulation according to the invention can be used to limit the maximum switching frequency of the LLC resonant circuit.
- the PWM modulation according to the invention can be used in combination or as an alternative to amplitude dimming without the need for additional circuitry.
Landscapes
- Circuit Arrangement For Electric Light Sources In General (AREA)
Abstract
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102014202665.2A DE102014202665A1 (de) | 2014-02-13 | 2014-02-13 | Treiberschaltung für LEDs |
PCT/EP2015/050529 WO2015121011A1 (fr) | 2014-02-13 | 2015-01-14 | Circuit d'attaque de led |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3105995A1 true EP3105995A1 (fr) | 2016-12-21 |
EP3105995B1 EP3105995B1 (fr) | 2019-10-09 |
Family
ID=52434746
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP15701700.5A Active EP3105995B1 (fr) | 2014-02-13 | 2015-01-14 | Circuit d'attaque de led |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP3105995B1 (fr) |
DE (1) | DE102014202665A1 (fr) |
WO (1) | WO2015121011A1 (fr) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102018201878A1 (de) * | 2018-02-07 | 2019-08-08 | Tridonic Gmbh & Co Kg | Synchronkonverter mit Über- und Unterstromschutz |
DE102018114271A1 (de) | 2018-06-14 | 2019-12-19 | Tridonic Gmbh & Co Kg | Betriebsschaltungen für LED-Lasten aufweisend eine Halbbrückenschaltung |
EP3782274B1 (fr) * | 2018-06-14 | 2024-07-31 | Tridonic GmbH & Co. KG | Circuit de fonctionnement pour charges à led, présentant un circuit en demi-pont |
WO2020087199A1 (fr) * | 2018-10-29 | 2020-05-07 | Tridonic Gmbh & Co Kg | Alimentation électrique pour lampe |
EP3890445A1 (fr) * | 2020-03-31 | 2021-10-06 | Tridonic GmbH & Co. KG | Convertisseur à commutation côté primaire pour fournir une tension d'alimentation à une charge de del |
EP3902378A1 (fr) * | 2020-04-23 | 2021-10-27 | Tridonic GmbH & Co. KG | Convertisseur isolé avec détection de courant améliorée |
US11924944B1 (en) * | 2021-10-12 | 2024-03-05 | Fourstar Group Inc. | System and method for voice-activated lighting control |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9000673B2 (en) * | 2010-05-25 | 2015-04-07 | Virginia Tech Intellectual Properties, Inc. | Multi-channel two-stage controllable constant current source and illumination source |
JP2012216766A (ja) * | 2011-03-30 | 2012-11-08 | Sanken Electric Co Ltd | Led駆動装置及びled照明装置 |
TW201249256A (en) * | 2011-05-18 | 2012-12-01 | Delta Electronics Inc | Frequency-variable dimming control apparatus for light-emitting diodes and method for operating the same |
EP2752089B1 (fr) * | 2011-11-14 | 2016-11-30 | Philips Lighting Holding B.V. | Système et procédé pour commander une tension d'attaque de sortie maximale de dispositif d'éclairage à semi-conducteur |
DE102012007449B4 (de) * | 2012-04-13 | 2024-02-22 | Tridonic Gmbh & Co Kg | Verfahren zum Betreiben eines LLC-Resonanzwandlers für ein Leuchtmittel, Wandler und LED-Konverter |
-
2014
- 2014-02-13 DE DE102014202665.2A patent/DE102014202665A1/de not_active Withdrawn
-
2015
- 2015-01-14 WO PCT/EP2015/050529 patent/WO2015121011A1/fr active Application Filing
- 2015-01-14 EP EP15701700.5A patent/EP3105995B1/fr active Active
Also Published As
Publication number | Publication date |
---|---|
WO2015121011A9 (fr) | 2016-09-29 |
WO2015121011A1 (fr) | 2015-08-20 |
DE102014202665A1 (de) | 2015-08-27 |
EP3105995B1 (fr) | 2019-10-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP3105995B1 (fr) | Circuit d'attaque de led | |
EP2829157B1 (fr) | Circuit de commande pour diodes électroluminescentes avec signal de variation de lumière issu d`un signal en trains d'impulsions modulés a haute fréquence, avec des fréquences accordées | |
EP2795998B1 (fr) | Circuit de commande de led avec convertisseur resonant | |
EP3308604B1 (fr) | Circuit de convertisseurs à oscillateur bloqué synchronisés | |
EP2425680B1 (fr) | Circuit pour faire fonctionner des diodes luminescentes | |
WO2013092662A1 (fr) | Convertisseur à del à cfp adaptatif et convertisseur à résonance | |
EP2548410A1 (fr) | Alimentation basse tension pour un système d'éclairage à del | |
WO2011113960A2 (fr) | Circuit de commande de del comprenant un convertisseur cc/cc isolant à transfert d'énergie | |
DE102012111853A1 (de) | Schaltnetzteilvorrichtung und Verwendung einer solchen | |
EP2837265B1 (fr) | Transducteur pour un moyen d'éclairage, convertisseur del et procédé pour faire fonctionner un transducteur résonant llc | |
EP2885863B1 (fr) | Convertisseur de tension à découpage | |
WO2012045475A1 (fr) | Circuit de fonctionnement pour diodes électroluminescentes | |
EP3782274B1 (fr) | Circuit de fonctionnement pour charges à led, présentant un circuit en demi-pont | |
EP2777364B1 (fr) | Procédé de fonctionnement d'au moins une del par vibrations | |
DE102014208169A1 (de) | Treiberschaltung für LEDs mit sekundärseitigem selektiv schaltbarem Überbrückungspfad | |
AT14316U1 (de) | Treiberschaltung für LEDs | |
AT17349U1 (de) | Abwärtswandler für eine Leuchtdiode | |
EP3231253B1 (fr) | Circuit d'attaque à commande de démarrage llc | |
DE102013222892B4 (de) | LED-Konverter und Verfahren zum Steuern einer Wandlerschaltung eines LED-Konverters | |
EP2837260A1 (fr) | Transducteur pour un moyen d'éclairage, convertisseur del et procédé de fonctionnement d'un transducteur résonnant llc | |
AT13981U1 (de) | Betriebsschaltung für Leuchtdioden | |
WO2013067563A2 (fr) | Circuit de commande pour diodes électroluminescentes | |
DE102016202323A1 (de) | Treiberschaltung und Verfahren zum Ansteuern einer LED-Strecke |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: REQUEST FOR EXAMINATION WAS MADE |
|
17P | Request for examination filed |
Effective date: 20160811 |
|
AK | Designated contracting states |
Kind code of ref document: A1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
AX | Request for extension of the european patent |
Extension state: BA ME |
|
DAX | Request for extension of the european patent (deleted) | ||
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: EXAMINATION IS IN PROGRESS |
|
17Q | First examination report despatched |
Effective date: 20171124 |
|
GRAP | Despatch of communication of intention to grant a patent |
Free format text: ORIGINAL CODE: EPIDOSNIGR1 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: GRANT OF PATENT IS INTENDED |
|
INTG | Intention to grant announced |
Effective date: 20190729 |
|
RAP1 | Party data changed (applicant data changed or rights of an application transferred) |
Owner name: TRIDONIC GMBH & CO KG |
|
GRAS | Grant fee paid |
Free format text: ORIGINAL CODE: EPIDOSNIGR3 |
|
GRAA | (expected) grant |
Free format text: ORIGINAL CODE: 0009210 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE PATENT HAS BEEN GRANTED |
|
AK | Designated contracting states |
Kind code of ref document: B1 Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR |
|
REG | Reference to a national code |
Ref country code: GB Ref legal event code: FG4D Free format text: NOT ENGLISH |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: EP |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R096 Ref document number: 502015010592 Country of ref document: DE |
|
REG | Reference to a national code |
Ref country code: IE Ref legal event code: FG4D Free format text: LANGUAGE OF EP DOCUMENT: GERMAN |
|
REG | Reference to a national code |
Ref country code: AT Ref legal event code: REF Ref document number: 1190351 Country of ref document: AT Kind code of ref document: T Effective date: 20191115 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R079 Ref document number: 502015010592 Country of ref document: DE Free format text: PREVIOUS MAIN CLASS: H05B0033080000 Ipc: H05B0045000000 |
|
REG | Reference to a national code |
Ref country code: NL Ref legal event code: MP Effective date: 20191009 |
|
REG | Reference to a national code |
Ref country code: LT Ref legal event code: MG4D |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: PT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20200210 Ref country code: ES Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: PL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: LV Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: SE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: NO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20200109 Ref country code: FI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: BG Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20200109 Ref country code: LT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: GR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20200110 Ref country code: NL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: AT Payment date: 20200123 Year of fee payment: 6 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: RS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: HR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: IS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20200224 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: AL Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R097 Ref document number: 502015010592 Country of ref document: DE |
|
PG2D | Information on lapse in contracting state deleted |
Ref country code: IS |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: CZ Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: RO Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: EE Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: DK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: IS Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20200209 |
|
PLBE | No opposition filed within time limit |
Free format text: ORIGINAL CODE: 0009261 |
|
STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: SK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: SM Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: IT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: MC Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 |
|
REG | Reference to a national code |
Ref country code: CH Ref legal event code: PL |
|
26N | No opposition filed |
Effective date: 20200710 |
|
REG | Reference to a national code |
Ref country code: BE Ref legal event code: MM Effective date: 20200131 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: LU Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20200114 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: BE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20200131 Ref country code: CH Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20200131 Ref country code: SI Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: LI Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20200131 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: IE Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20200114 |
|
REG | Reference to a national code |
Ref country code: AT Ref legal event code: MM01 Ref document number: 1190351 Country of ref document: AT Kind code of ref document: T Effective date: 20210114 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: AT Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES Effective date: 20210114 |
|
REG | Reference to a national code |
Ref country code: DE Ref legal event code: R084 Ref document number: 502015010592 Country of ref document: DE |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: TR Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: MT Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 Ref country code: CY Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 |
|
PG25 | Lapsed in a contracting state [announced via postgrant information from national office to epo] |
Ref country code: MK Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT Effective date: 20191009 |
|
P01 | Opt-out of the competence of the unified patent court (upc) registered |
Effective date: 20230530 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: DE Payment date: 20240129 Year of fee payment: 10 Ref country code: GB Payment date: 20240123 Year of fee payment: 10 |
|
PGFP | Annual fee paid to national office [announced via postgrant information from national office to epo] |
Ref country code: FR Payment date: 20240125 Year of fee payment: 10 |